Graphics processing method for three-dimensional images applied to first buffer for storing right-view contents and second buffer for storing left-view contents and related graphics processing apparatus thereof

This application is a Continuation Application and claims the benefit of U.S. application Ser. No. 13/514,050, which was filed on Jun. 5, 2012 and is entitled “GRAPHICS PROCESSING METHOD FOR THREE-DIMENSIONAL IMAGES APPLIED TO FIRST BUFFER FOR STORING RIGHT-VIEW CONTENTS AND SECOND BUFFER FOR STORING LEFT-VIEW CONTENTS AND RELATED GRAPHICS PROCESSING APPARATUS THEREOF”. In addition, U.S. application Ser. No. 13/514,050 is a national state entry of PCT/CN2010/080131 (filed on Dec. 22, 2010), which claims the benefit of U.S. Provisional Application No. 61/333,785 (filed on May 12, 2010). The entire contents of the related applications are included herein by reference.

The present disclosure relates to three-dimensional image processing, and more particularly, to a graphics processing method for three-dimensional images that is applied to a first buffer for storing right-view contents and a second buffer for storing left-view contents to avoid tearing effects and related graphics processing apparatus thereof.

Recently, three-dimensional topics, such as three-dimensional films or three-dimensional televisions, are getting more and more popular. In three-dimensional specification, right-view frames and left-view frames are interleaved in order to form three-dimensional images.

In general, both the right-view frames and the left-view frames have their own dedicated buffers to store respective contents. For a single-buffer mode in three-dimensional specification, both of the right-view frames and the left-view frames need a buffer served as an on-drawing buffer for drawing their respective contents and an on-screen buffer for displaying their respective contents by turns. That is to say, the right-view frames need a right-view buffer served for drawing and displaying the right-view contents by turns, and the left-view frames need a left-view buffer served for drawing and displaying the left-view contents by turns. However, since only one buffer is adopted to draw and display respective contents for each of the right-view frames and the left-view frames in the single-buffer mode, the unwanted “tearing effect” may be easily perceived by the user. “Tearing effect” is a visual artifact in video where information from two or more different frames is shown on a display device in a single screen draw. The artifact occurs when the video feed sent to the device isn't synchronous with the display's refresh, be it due to non-matching refresh rates, or simply lack of synchronization between the two. During video motion, “tearing effect” creates a torn look as edges of objects (such as a wall or a tree) fail to line up.

Hence, how to improve the viewing experience of the three-dimensional images and how to avoid the tearing effect, especially for single-buffer mode in three-dimensional specification, have become an important issue to be solved by designers in this field.

It is one of the objectives of the claimed disclosure to provide a graphics processing method for three-dimensional images and a related graphics processing apparatus thereof to solve the above-mentioned problems.

According to one aspect of the present disclosure, an exemplary graphics processing method for three-dimensional images applied to a first buffer for storing right-view contents and a second buffer for storing left-view contents is provided. The exemplary method includes the following steps: when a vertical synchronization (Vsync) status indicates that a display engine is not operating within a right Vsync period of a right-view frame, the drawing engine drawing the right-view contents stored in the first buffer; when the Vsync status indicates that the display engine is not operating within a left Vsync period of a left-view frame, the drawing engine drawing the left-view contents stored in the second buffer; during the right Vsync period of the right-view frame, the display engine displaying the right-view contents stored in the first buffer; and during the left Vsync period of the left-view frame, the display engine displaying the left-view contents stored in the second buffer.

According to another aspect of the present disclosure, an exemplary graphics processing apparatus for three-dimensional images is provided. The exemplary graphics processing apparatus includes a first buffer, a second buffer, a display engine, and a display engine. The first buffer is arranged to store right-view contents. The second buffer is arranged to store left-view contents. The display engine is coupled to the first buffer and the second buffer, and is arranged to display the right-view contents stored in the first buffer during a right Vsync period of a right-view frame, and arranged to display the left-view contents stored in the second buffer during a left Vsync period of a left-view frame. The drawing engine is coupled to the first buffer, the second buffer, the processor, and the display engine, and is arranged to draw the right-view contents stored in the first buffer when a Vsync status indicates that the display engine is not operating within the right Vsync period of the right-view frame, and arranged to draw the left-view contents stored in the second buffer when the Vsync status indicates that the display engine is not operating within the left Vsync period of the left-view frame.

By controlling the drawing engine to draw the right-view contents stored in the first buffer when the Vsync status indicates that the display engine is not operating within the right Vsync period of the right-view frame, or by controlling the drawing engine to draw the left-view contents stored in the second buffer when the Vsync status indicates that the display engine is not operating within the left Vsync period of the left-view frame, the unwanted tearing effect can be avoided or mitigated.

FIG. 1 is a timing diagram illustrating a timing sequence for processing a right-view frame and a left-view frame of three-dimensional images.

FIG. 2A is a block diagram illustrating an architecture of a graphics processing apparatus for three-dimensional images according to a first embodiment of the present disclosure.

FIG. 2B is a diagram illustrating a single-buffer procedure for dealing with three-dimensional images according to a first embodiment of the present disclosure.

FIG. 3A is a block diagram illustrating an architecture of a graphics processing apparatus for three-dimensional images according to a second embodiment of the present disclosure.

FIG. 3B is a diagram illustrating a single-buffer procedure for dealing with three-dimensional images according to a second embodiment of the present disclosure.

FIG. 4 is a flowchart illustrating a graphics processing method for three-dimensional images according to an exemplary embodiment of the present disclosure.

FIG. 5 is a flowchart illustrating a graphics processing method for three-dimensional images according to another exemplary embodiment of the present disclosure.

FIG. 6 is a flowchart illustrating a graphics processing method for three-dimensional images according to yet another exemplary embodiment of the present disclosure.

Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

FIG. 1 is a timing diagram illustrating a timing sequence for processing a right-view frame and a left-view frame of three-dimensional images. As shown in FIG. 1 , right-view frames (e.g., R 1 , R 2 , R 3 , etc) and left-view frames (e.g., L 1 , L 2 , etc.) are interleaved in order to form three-dimensional images. That is to say, a right-view frame R 1 intended for being viewed by a right eye is sent first. Thereafter, there is a pause in transmission called a right Vsync (vertical synchronization). Next, a left-view frame L 1 intended for being viewed by a left eye is sent. Thereafter, there is another pause in transmission called a left Vsync. As shown in FIG. 1 , a period of each right-view frame includes a first non-display period as well as a right Vsync period for displaying right-view contents; similarly, a period of each left-view frame includes a second non-display period as well as a left Vsync period for displaying left-view contents. As an illustration, the period of the right-view frame TR 1 includes the first non-display period TBR 1 and the right Vsync period TVR 1 ; the period of the right-view frame TR 2 includes the first non-display period TBR 2 and the right Vsync period TVR 2 ; and so on. The period of the left-view frame TL 1 includes the second non-display period TBL 1 and the left Vsync period TVL 1 ; the period of the left-view frame TL 2 includes the second non-display period TBL 2 and the left Vsync period TVL 2 ; and so on.

Please note that the above-mentioned first non-display period (e.g., TBR 1 , TBR 2 or TBR 3 ) indicates a period that the right-view contents have been sent but have not been displayed on a display device (e.g., an LCD monitor or a TV) yet, while the above-mentioned second non-display period (e.g., TBL 1 or TBL 2 ) indicates a period that the left-view contents have been sent but have not been displayed on the display device yet. Furthermore, the above-mentioned right Vsync period (e.g., TVR 1 , TVR 2 or TVR 3 ) indicates a period that the right-view contents are displayed on the display device, while the above-mentioned left Vsync period (e.g., TVL 1 or TVL 2 ) indicates a period that the left-view contents are displayed on the display device.

In addition, stereo glasses equipped with right eye shutters and left eye shutters may be employed to ensure that proper eye views the appropriate frame. Thus, during the right Vsync period that the right-view contents (e.g., R 1 , R 2 or R 3 ) are displayed on the display device, the right eye shutter is controlled to be maintained in an open status (during which the left eye shutter is maintained in a close status); and during the left Vsync period that the left-view contents (e.g., L 1 or L 2 ) are displayed on the display device, the left eye shutter is controlled to be maintained in the open status (during which the right eye shutter is maintained in the close status).

FIG. 2A is a block diagram illustrating an architecture of a graphics processing apparatus for three-dimensional images according to a first embodiment of the present disclosure. As shown in FIG. 2A , the graphics processing apparatus 200 includes, but is not limited to, two buffers 210 and 220 , a processor 230 , a display engine 240 , and a drawing engine 250 . In this embodiment, the buffer 210 is arranged to store right-view contents and serve as an on-drawing buffer and an on-screen buffer related to the right-view contents by turns; while the buffer 220 is arranged to store left-view contents and serve as an on-drawing buffer and an on-screen buffer related to the left-view contents by turns. This can also be called a single-buffer mode for three-dimensional images. That is to say, during a current stage, the buffer 210 may serve as an on-screen buffer related to the right-view contents and the buffer 220 may serve as an on-drawing buffer related to the left-view contents; during a next stage, the buffer 210 may serve as an on-drawing buffer related to the right-view contents and the buffer 220 may serve as an on-screen buffer related to the left-view contents; and so forth. Please note that the buffers 210 and 220 may be separate memories or a common memory including separate memory areas dedicated to storing the right-view contents and left-view contents respectively. Operations of the processor 230 , the drawing engine 250 , and the display engine 240 will be detailed as follows.

Please note that, in this embodiment, the processor 230 is arranged to send drawing commands CD 1 related to the right-view contents and drawing commands CD 2 related to the left-view contents to the drawing engine 250 . The drawing engine 250 is coupled to the buffers 210 and 220 , the processor 230 , and the display engine 240 . The display engine 240 is coupled to the buffers 210 and 220 and the drawing engine 250 , and is arranged to display the right-view contents stored in the buffer 210 during a right Vsync period (e.g., TVR 1 , TVR 2 or TVR 3 shown in FIG. 1 ) of a right-view frame (e.g., R 1 , R 2 or R 3 shown in FIG. 1 ), and arranged to display the left-view contents stored in the buffer 220 during a left Vsync period (e.g., TVL 1 or TVL 2 shown in FIG. 1 ) of a left-view frame (e.g., L 1 or L 2 shown in FIG. 1 ). In this embodiment, the display engine 240 is further arranged to send a notice NC to notify the drawing engine 250 of a current Vsync status.

What calls for special attention is that: the drawing engine 250 is arranged to draw the right-view contents stored in the buffer 210 when the current Vsync status indicates that the display engine 240 is not operating within the right Vsync period (e.g., TVR 1 , TVR 2 or TVR 3 shown in FIG. 1 ) of the right-view frame (e.g., R 1 , R 2 or R 3 shown in FIG. 1 ), and arranged to draw the left-view contents stored in the buffer 220 when the current Vsync status indicates that the display engine 240 is not operating within the left Vsync period (e.g., TVL 1 or TVL 2 shown in FIG. 1 ) of the left-view frame (e.g., L 1 or L 2 shown in FIG. 1 ).

In another embodiment, the drawing engine 250 may draw the right-view contents stored in the buffer 210 during the second non-display period (e.g., TBL 1 or TBL 2 shown in FIG. 1 ). In another embodiment, the drawing engine 250 may draw the right-view contents stored in the buffer 210 during the left Vsync period (e.g., TVL 1 or TVL 2 shown in FIG. 1 ) of the left-view frame. In yet another embodiment, the drawing engine 250 may draw the right-view contents stored in the buffer 210 during the period of the left-view frame (e.g., TL 1 or TL 2 shown in FIG. 1 ).

Similarly, in one embodiment, the drawing engine 250 may draw the left-view contents stored in the buffer 220 during the first non-display period (e.g., TBR 1 , TBR 2 or TBR 3 shown in FIG. 1 ). In another embodiment, the drawing engine 250 may draw the left-view contents stored in the buffer 220 during the right Vsync period (e.g., TVR 1 , TVR 2 or TVR 3 shown in FIG. 1 ) of the right-view frame right Vsync period. In yet another embodiment, the drawing engine 250 may draw the left-view contents stored in the buffer 220 during a period of the right-view frame (e.g., TR 1 , TR 2 or TR 3 shown in FIG. 1 ).

Those skilled in the art should readily appreciate that various modifications or various combinations of the drawing timing that the drawing engine 250 draws the right-view contents and the left-view contents may be made without departing from the spirit of the present disclosure. For example, the term “during the first non-display period” or the term “during the second non-display period” is not limited to cover the whole period, and can also be explained as “during a part of the first non-display period” or “during a part of the second non-display period”, respectively, which also belongs to the scope of the present disclosure. In other words, only when the current Vsync status indicates that the display engine 240 is not operating within the right Vsync period of the right-view frame, the drawing engine 250 is allowed to draw the right-view contents stored in the buffer 210 ; and only when the current Vsync status indicates that the display engine 240 is not operating within the left Vsync period of the left-view frame, the drawing engine 250 is allowed to draw the left-view contents stored in the buffer 220 .

Please refer to FIG. 2A together with FIG. 2B . FIG. 2B is a diagram illustrating a single-buffer procedure for dealing with three-dimensional images according to a first embodiment of the present disclosure. In FIG. 2B , the processor 230 sends drawing commands CD 1 related to the right-view contents and drawing commands CD 2 related to the left-view contents to the drawing engine 250 . After that, the display engine 240 sends a notice NC to notify the drawing engine 250 of a current Vsync status. In a first case, the buffer 210 may serve as an on-screen buffer related to the right-view contents and the buffer 220 may serve as an on-drawing buffer related to the left-view contents, at this time, the current Vsync status thereby indicates that the display engine 240 is not operating within the left Vsync period of the left-view frame. Under this condition, the drawing engine 250 draws the left-view contents stored in the buffer 220 . In a second case, the buffer 210 may serve as an on-drawing buffer related to the right-view contents and the buffer 220 may serve as an on-screen buffer related to the left-view contents, at this time, the current Vsync status thereby indicates that the display engine 240 is not operating within the right Vsync period of the right-view frame. Under this condition, the drawing engine 250 draws the right-view contents stored in the buffer 210 .

The drawing timing is controlled in order to avoid “tearing effect” that the drawing engine 250 draws the right-view contents and the left-view contents. In this embodiment, the display engine 240 sends the notice NC to notify the drawing engine 250 of the current Vsync status automatically and directly, and then the drawing engine 250 can determine the drawing time for drawing the right-view contents stored in the buffer 210 or the left-view contents stored in the buffer 220 according to the current Vsync status. In this way, the tearing effect can be avoided or mitigated in the single-buffer procedure for dealing with three-dimensional images.

FIG. 3A is a block diagram illustrating an architecture of a graphics processing apparatus for three-dimensional images according to a second embodiment of the present disclosure. As shown in FIG. 3A , the graphics processing apparatus 300 includes, but is not limited to, two buffers 310 and 320 , a processor 330 , a display engine 340 , and a drawing engine 350 . In this embodiment, the buffer 310 is arranged to store right-view contents and serve as an on-drawing buffer and an on-screen buffer related to the right-view contents by turns; while the buffer 320 is arranged to store left-view contents and serve as an on-drawing buffer and an on-screen buffer related to the left-view contents by turns. This can also be called a single-buffer mode for three-dimensional images. That is to say, during a current stage, the buffer 310 may serve as an on-screen buffer related to the right-view contents and the buffer 320 may serve as an on-drawing buffer related to the left-view contents; during a next stage, the buffer 310 may serve as an on-drawing buffer related to the right-view contents and the buffer 320 may serve as an on-screen buffer related to the left-view contents; and so forth.

The architecture of the graphics processing apparatus 300 shown in FIG. 3A is similar to that of the graphics processing apparatus 200 shown in FIG. 2A , and the major difference is that: in this embodiment shown in FIG. 3A , the drawing engine 350 is further arranged to actively send a request RQ to the display engine 340 in order to check the current Vsync status, and the display engine 340 is arranged to send a notice NC to notify the drawing engine 350 of the current Vsync status in response to the request RQ. Operations of the processor 330 , the drawing engine 350 , and the display engine 340 will be detailed as follows.

Please refer to FIG. 3A together with FIG. 3B . FIG. 3B is a diagram illustrating a single-buffer procedure for dealing with three-dimensional images according to a second embodiment of the present disclosure. In FIG. 3B , the processor 330 sends drawing commands CD 1 related to the right-view contents and drawing commands CD 2 related to the left-view contents to the drawing engine 350 . After that, the drawing engine 350 sends a request RQ to the display engine 340 in order to check the current Vsync status, and the display engine 340 then sends a notice NC to notify the drawing engine 350 of the current Vsync status in response to the request RQ. In a first case, the buffer 310 may serve as an on-screen buffer related to the right-view contents and the buffer 320 may serve as an on-drawing buffer related to the left-view contents, at this time, the current Vsync status thereby indicates that the display engine 340 is not operating within the left Vsync period of the left-view frame. Under this condition, the drawing engine 350 draws the left-view contents stored in the buffer 320 . In a second case, the buffer 310 may serve as an on-drawing buffer related to the right-view contents and the buffer 320 may serve as an on-screen buffer related to the left-view contents, at this time, the current Vsync status thereby indicates that the display engine 340 is not operating within the right Vsync period of the right-view frame. Under this condition, the drawing engine 350 draws the right-view contents stored in the buffer 310 .

The drawing timing is controlled in order to avoid the unwanted “tearing effect” that the drawing engine 250 draws the right-view contents and the left-view contents. In this embodiment, the drawing engine 350 sends the request RQ to the display engine 340 in order to check the current Vsync status, and then the drawing engine 350 can determine the drawing time for drawing the right-view contents stored in the buffer 310 or the left-view contents stored in the buffer 320 according to the current Vsync status. In this way, the tearing effect can be avoided or mitigated in the single-buffer procedure for dealing with three-dimensional images.

Please note that the above-mentioned graphics processing apparatus 200 / 300 may be implemented in a television or a Blu-ray (BD) player, but the present disclosure is not limited to this only. In addition, each of the drawing engine 250 / 350 and the display engine 240 / 340 may be implemented by pure hardware, software or a combination of thereof (e.g., firmware executed by a microprocessor). Those skilled in the art should readily appreciate that various modifications of achieving the functions of the drawing engine 250 / 350 and the display engine 240 / 340 shown in FIG. 2A or FIG. 3A may be made without departing from the spirit of the present disclosure.

FIG. 4 is a flowchart illustrating a graphics processing method for three-dimensional images according to an exemplary embodiment of the present disclosure. Please note that the steps are not required to be executed in the exact order shown in FIG. 4 , provided that the result is substantially the same. The generalized graphics processing method may include the following steps:

Step S 410 : Send drawing commands respectively related to the right-view contents and the left-view contents to a drawing engine.

Step S 420 : When the current Vsync status indicates that a display engine is not operating within a right Vsync period of a right-view frame, the drawing engine draws the right-view contents stored in the first buffer.

Step S 430 : During the right Vsync period of the right-view frame, the display engine displays the right-view contents stored in the first buffer.

Step S 440 : When the current Vsync status indicates that the display engine is not operating within a left Vsync period of a left-view frame, the drawing engine draws the left-view contents stored in the second buffer.

Step S 450 : During the left Vsync period of the left-view frame, the display engine displays the left-view contents stored in the second buffer.

As a person skilled in the art can readily understand the details of the steps in FIG. 4 after reading above paragraphs directed to the graphics processing apparatuses 100 and 200 , further description is omitted here for brevity. What calls for special attention is that the steps of the flowchart shown in FIG. 4 can be used in a single-buffer procedure for three-dimensional images. Here, the steps S 410 can be executed by the processor 230 / 330 ; the steps S 420 and S 440 can be executed by the drawing engine 250 / 350 ; and the steps S 430 and S 450 can be executed by the display engine 240 / 340 .

FIG. 5 is a flowchart illustrating a graphics processing method for three-dimensional images according to another exemplary embodiment of the present disclosure. Please note that the steps are not required to be executed in the exact order shown in FIG. 5 , provided that the result is substantially the same. The generalized graphics processing method may include the following steps:

Step S 410 : Send drawing commands respectively related to the right-view contents and the left-view contents to a drawing engine.

Step S 510 : The display engine sends a notice to notify the drawing engine of the current Vsync status.

Step S 420 : When the current Vsync status indicates that a display engine is not operating within a right Vsync period of a right-view frame, the drawing engine draws the right-view contents stored in the first buffer.

Step S 430 : During the right Vsync period of the right-view frame, the display engine displays the right-view contents stored in the first buffer.

Step S 440 : When the current Vsync status indicates that the display engine is not operating within a left Vsync period of a left-view frame, the drawing engine draws the left-view contents stored in the second buffer.

Step S 450 : During the left Vsync period of the left-view frame, the display engine displays the left-view contents stored in the second buffer.

The steps shown in FIG. 5 are similar to that shown in FIG. 4 , and the major difference therebetween is that: the flowchart shown in FIG. 5 further includes a step which uses the display engine to send a notice to notify the drawing engine of the current Vsync status (i.e., step S 510 ). How each element operates can be readily known by collocating the steps shown in FIG. 5 together with the elements shown in FIG. 2A and the single-buffer procedure for dealing with three-dimensional images shown in FIG. 2B , and further description is therefore omitted here for brevity. Be noted that the step S 510 can be executed by the display engine 240 .

FIG. 6 is a flowchart illustrating a graphics processing method for three-dimensional images according to yet another exemplary embodiment of the present disclosure. Please note that the steps are not required to be executed in the exact order shown in FIG. 6 , provided that the result is substantially the same. The generalized graphics processing method may include following steps:

Step S 410 : Send drawing commands respectively related to the right-view contents and the left-view contents to a drawing engine.

Step S 610 : The drawing engine sends a request to the display engine in order to check the current Vsync status.

Step S 620 : The display engine sends a notice to notify the drawing engine of the current Vsync status in response to the request.

Step S 420 : When the current Vsync status indicates that a display engine is not operating within a right Vsync period of a right-view frame, the drawing engine draws the right-view contents stored in the first buffer.

Step S 430 : During the right Vsync period of the right-view frame, the display engine displays the right-view contents stored in the first buffer.

Step S 440 : When the current Vsync status indicates that the display engine is not operating within a left Vsync period of a left-view frame, the drawing engine draws the left-view contents stored in the second buffer.

Step S 450 : During the left Vsync period of the left-view frame, the display engine displays the left-view contents stored in the second buffer.

The steps shown in FIG. 6 are similar to that shown in FIG. 4 , and the major difference therebetween is that: the flowchart shown in FIG. 6 further include two steps which use the drawing engine to send a request to the display engine in order to check the current Vsync status and use the display engine to send a notice to notify the drawing engine of the current Vsync status (i.e., steps S 610 and S 620 ). How each element operates can be readily known by collocating the steps shown in FIG. 6 together with the elements shown in FIG. 3A and the single-buffer procedure for dealing with three-dimensional images shown in FIG. 3B , and further description is therefore omitted here for brevity. Be noted that the step S 610 can be executed by the drawing engine 350 , and the step S 620 can be executed by the display engine 340 .

Please note that, the steps of the above-mentioned flowcharts are merely practicable embodiments of the present disclosure, and in no way should be considered to be limitations of the scope of the present disclosure. These exemplary methods may include other intermediate steps, or several steps can be merged into a single step, or the above-mentioned steps can be slightly modified without departing from the spirit of the present disclosure. By way of example, in one embodiment, the step S 420 can be implemented by drawing the right-view contents stored in the first buffer during the second non-display period; in another embodiment, the step S 420 can be implemented by drawing the right-view contents stored in the first buffer during the left Vsync period of the left-view frame; in yet another embodiment, the step S 420 may be implemented by drawing the right-view contents stored in the first buffer during a period of the left-view frame. Similarly, the step S 440 can be implemented by drawing the left-view contents stored in the second buffer during the first non-display period; in another embodiment, the step S 440 can be implemented by drawing the left-view contents stored in the second buffer during the right Vsync period of the right-view frame; in yet another embodiment, the step S 440 can be implemented by drawing the left-view contents stored in the second buffer during a period of the right-view frame.

The above-mentioned embodiments are presented merely for describing features of the present disclosure, and in no way should be considered to be limitations of the scope of the present disclosure. In summary, the present disclosure provides a graphics processing method for three-dimensional images and a related graphics processing apparatus. By controlling the drawing engine 250 / 350 to draw the right-view contents stored in the buffer 210 / 310 when the current Vsync status indicates that the display engine 240 / 340 is not operating within the right Vsync period of the right-view frame, or by controlling the drawing engine 250 / 350 to draw the left-view contents stored in the buffer 220 / 320 when the current Vsync status indicates that the display engine 240 / 340 is not operating within the left Vsync period of the left-view frame, the unwanted tearing effect can be avoided or mitigated. In this way, the viewing performance of the graphics processing apparatus 200 / 300 can be improved under a single-buffer mode for dealing with three-dimensional images.