Display apparatus

This application claims priority from and the benefit of Korean Patent Application No. 10-2015-0039184, filed on Mar. 20, 2015, which is hereby incorporated by reference for all purposes as if fully set forth herein.

Exemplary embodiments of the present invention relate to a display apparatus, more particularly, to a display apparatus having improved display quality.

Discussion of the Background

An organic light emitting display device may include an organic light emitting diode including an anode electrode, an organic light emitting layer, and a cathode electrode. The organic light emitting diode may emit light using energy generated when excitons recombined in the organic light emitting layer return to a ground state from an excited state. The organic light emitting display device may display a predetermined image using light emission of the organic light emitting layer.

The organic light emitting display device has a self-luminance characteristic and may not require a separate light source, unlike a liquid crystal display device, and thus a thickness and a weight of the organic light emitting display device may be reduced. In addition, the organic light emitting display device may have low power consumption, high brightness, fast response time, etc.

The display device may include a display area having a curved shape, e.g., a circular shape, an oval shape, etc. The display device including the curved display area may be applicable to devices, such as a watch, an instrument panel of a car, etc.

The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept, and, therefore, it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

Exemplary embodiments of the present invention provide a display apparatus having improved display quality.

Additional aspects will be set forth in the detailed description which follows, and, in part, will be apparent from the disclosure, or may be learned by practice of the inventive concept.

According to an exemplary embodiment of the present invention, a display apparatus includes first pixel groups each including first pixels disposed in a display area, and sub-pixel groups each including second pixels disposed at an outermost area of the display area and surrounding the first pixels, in which each of the second pixels has a size smaller than a size of each of the first pixels, and the second pixels in each of the sub-pixel groups are respectively connected to each other in parallel.

A boundary of the display area may have a curved shape.

The display area may have a circular shape or an oval shape.

The first pixels of each of the first pixel groups may include a red pixel, a green pixel, and a blue pixel.

The second pixels of each of the sub-pixel groups may include sub-pixels configured to display the same color.

The second pixels of each of the sub-pixel groups may include sub-pixels configured to display different colors from each other.

The second pixels of each of the sub-pixel groups may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel.

Each of the first pixels may include a first organic light emitting diode and a first transistor configured to drive the first organic light emitting diode.

The first organic light emitting diode may include a first electrode connected to the first transistor, a first organic light emitting layer disposed on the first electrode and including an organic material, and a second electrode disposed on the first organic light emitting layer.

Each of the sub-pixel groups may further include a second transistor configured to drive the second pixels, and each of the second pixels may include a second organic light emitting diode configured to be driven by the second transistor.

The second organic light emitting diode may have a size smaller than a size of the first organic light emitting diode.

The second transistor may include a control terminal connected to a data line through a switching device that is configured to be turned on in response to a gate signal, an input terminal connected to a first source voltage line that is configured to receive a first source voltage, and an output terminal connected to input terminals of the second organic light emitting diodes, and output terminals of the second organic light emitting diodes may be connected to a second source voltage line configured to receive a second source voltage having a voltage level less than the first source voltage.

Each of the second organic light emitting diode may include a third electrode connected to an output terminal of the second transistor, a second organic light emitting layer disposed on the third electrode and comprising an organic material, and a fourth electrode disposed on the second organic light emitting layer, and the third electrodes of the second organic light emitting diodes may be electrically connected to each other.

The display apparatus may further include connection lines connecting the third electrodes to each other.

The connection lines may have a width less than or equal to a width of the third electrodes.

The third electrodes may include the same material as the connection lines.

Each of the third electrodes may include a transmissive electrode and the fourth electrode may include a reflective electrode.

Each of the third electrodes may include a reflective electrode and the fourth electrode may include comprises a transmissive electrode.

An area of each of the first pixel groups may be the same as an area of each of the sub-pixel groups.

According to the exemplary embodiments of the present invention, the display apparatus may improve the display quality thereof.

The foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the claimed subject matter.

The accompanying drawings, which are included to provide a further understanding of the inventive concept, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the inventive concept, and, together with the description, serve to explain principles of the inventive concept.

FIG. 1 is a plan view showing a display apparatus according to an exemplary embodiment of the present invention.

FIG. 2 is an enlarged view showing area “A” shown in FIG. 1 .

FIG. 3A is a cross-sectional view taken along line I-I′ of FIG. 2 .

FIG. 3B is an equivalent circuit diagram showing a first pixel.

FIG. 4A , FIG. 4B , and FIG. 4C are enlarged views showing a second pixel group.

FIG. 5A is a cross-sectional view taken along line I-I″ of FIG. 4A .

FIG. 5B is an equivalent circuit diagram showing a sub-pixel group.

In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various exemplary embodiments. It is apparent, however, that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring various exemplary embodiments.

In the accompanying figures, the size and relative sizes of layers, films, panels, regions, etc., may be exaggerated for clarity and descriptive purposes. Also, like reference numerals denote like elements.

When an element or layer is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it may be directly on, connected to, or coupled to the other element or layer or intervening elements or layers may be present. When, however, an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be construed as X only, Y only, Z only, or any combination of two or more of X, Y, and Z, such as, for instance, XYZ, XYY, YZ, and ZZ. Like numbers refer to like elements throughout. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

Although the terms first, second, etc. may be used herein to describe various elements, components, regions, layers, and/or sections, these elements, components, regions, layers, and/or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and/or section from another element, component, region, layer, and/or section. Thus, a first element, component, region, layer, and/or section discussed below could be termed a second element, component, region, layer, and/or section without departing from the teachings of the present disclosure.

Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper,” and the like, may be used herein for descriptive purposes, and, thereby, to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the drawings. Spatially relative terms are intended to encompass different orientations of an apparatus in use, operation, and/or manufacture in addition to the orientation depicted in the drawings. For example, if the apparatus in the drawings is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. Furthermore, the apparatus may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and, as such, the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms, “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Moreover, the terms “comprises,” “comprising,” “includes,” and/or “including,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and/or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Various exemplary embodiments are described herein with reference to sectional illustrations that are schematic illustrations of idealized exemplary embodiments and/or intermediate structures. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments disclosed herein should not be construed as limited to the particular illustrated shapes of regions, but are to include deviations in shapes that result from, for instance, manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the drawings are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to be limiting.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure is a part. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense, unless expressly so defined herein.

FIG. 1 is a plan view showing a display apparatus 1000 according to an exemplary embodiment of the present invention and FIG. 2 is an enlarged view of area “A” shown in FIG. 1 .

Referring to FIGS. 1 and 2 , the display apparatus 1000 may be an organic light emitting display apparatus. The display apparatus 1000 includes a display area DA in which an image is displayed and a non-display area NDA surrounding the display area DA. The display apparatus 1000 includes pixels arranged in the display area DA. The pixels include organic light emitting display elements.

A boundary of the display area DA of the display apparatus 1000 has a curved shape, e.g., a circular shape, an oval shape, etc. In FIG. 1 , the display area DA and the non-display area NDA of the display apparatus 1000 have the circular shape, but the boundary of the non-display area NDA may not need to have the curved shape.

The display area DA includes gate lines GL 1 to GLm, data lines DL 1 to DLn, and pixels PX each connected to a corresponding gate line of the gate lines GL 1 to GLm and a corresponding data line of the data lines DL 1 to DLn. The gate lines GL 1 to GLm are insulated from the data lines DL 1 to DLn while crossing the data lines DL 1 to DLn. The gate lines GL 1 to GLm extend in a first direction D 1 and are arranged in a second direction D 2 crossing the first direction D 1 , and the data lines DL 1 to DLn extend in the second direction D 2 and are arranged in the first direction D 1 .

Each of the gate lines GL 1 to GLm and the data lines DL 1 to DLn may have a different length. More particularly, the length of the gate lines GL 1 to GLm increases as a distance thereof to a center portion of the display area DA decreases, and the length of the data lines DL 1 to DLn increases as a distance thereof to a center portion of the display area DA decreases.

The pixels PX are arranged in a matrix form on the display area DA and disposed in a circular shape to correspond to the shape of the display area DA. The pixels PX include first pixel groups PXG 1 and second pixel groups PXG 2 disposed at an outermost position of the display area DA to surround the first pixel group PXG 1 . The first pixel groups PXG 1 are arranged in the center portion of the display area DA and the second pixel groups PXG 2 are arranged in an area adjacent to the boundary of the display area DA. The shape of the display area DA is determined by the second pixel groups PXG 2 .

Each of the first pixel groups PXG 1 includes first pixels PX 1 . Each of the first pixels PX 1 is connected to the corresponding gate line of the gate lines GL 1 to GLm. Although not shown, each of the data lines DL 1 to DLn includes three sub-data lines (not shown). Each of the first pixels PX 1 is connected to a corresponding sub-data line of the sub-data lines.

The first pixels PX 1 display different colors. The first pixels PX 1 include a red pixel RX, a green pixel GX, and a blue pixel BX. FIG. 1 illustrates only the red, green, and blue pixels RX, GX, and BX, but the first pixel group PX 1 may further include a white pixel (not shown). The first pixels PX 1 have substantially a rectangular shape as shown in FIG. 1 . Alternatively, each of the first pixels PX 1 may have various shapes, e.g., a polygonal shape, a circular shape, an oval shape, etc.

Each of the second pixel group PXG 2 includes second pixels PX 2 . Each of the second pixels PX 2 has a size smaller than a size of each of the first pixels PX 1 . The second pixel group PXG 2 will be described in detail with reference to FIG. 4 .

FIG. 3A is a cross-sectional view taken along line I-I′ of FIG. 2 .

Referring to FIG. 3A , the first pixel PX 1 includes a first organic light emitting diode OLED 1 and a first transistor TR 1 connected to the first organic light emitting diode OLED 1 . The first transistor TR 1 is disposed on a substrate SUB. The substrate SUB may be a transparent flexible substrate formed of a plastic material.

A first semiconductor layer SM 1 of the first transistor TR 1 is disposed on the substrate SUB. The first semiconductor layer SM 1 includes an inorganic semiconductor, e.g., amorphous silicon, polysilicon, etc., or an organic semiconductor. In addition, the first semiconductor SM 1 may include an oxide semiconductor. Although not shown in FIG. 3A , the first semiconductor layer SM 1 includes a source area, a drain area, and a channel area between the source area and the drain area.

A first insulating layer 10 is disposed on the substrate SUB to cover the first semiconductor layer SM 1 . The first insulating layer 10 may be an inorganic insulating material including an inorganic material. A first gate electrode GE 1 of the first transistor TR 1 is disposed on the first insulating layer 10 to overlap with the first semiconductor layer SM 1 . The first gate electrode GE 1 is disposed to overlap with the channel area of the first semiconductor layer SM 1 .

A second insulating layer 20 is disposed on the first insulating layer 10 to cover the first gate electrode GE 1 . The second insulating layer 20 may be an inter-insulating layer. The second insulating layer 20 may be an inorganic insulating material including an inorganic material. A first source electrode SE 1 and a first drain electrode DE 1 of the first transistor TR 1 are disposed on the second insulating layer 20 and spaced apart from each other. The first source electrode SE 1 is connected to the source area of the first semiconductor layer SM 1 through a first contact hole CH 1 formed through the first and second insulating layers 10 and 20 . The first drain electrode DE 1 is connected to the drain area of the first semiconductor layer SM 1 through a second contact hole CH 2 formed through the first and second insulating layers 10 and 20 .

A third insulating layer 30 is disposed on the second insulating layer 20 to cover the first source electrode SE 1 and the first drain electrode DE 1 of the first transistor TR 1 . The third insulating layer 30 may be an organic insulating material including an organic material.

A first electrode E 1 of the first organic light emitting diode OLED 1 is disposed on the third insulating layer 30 . The first electrode E 1 is connected to the first drain electrode DE 1 of the first transistor TR 1 through a third contact hole CH 3 formed through the third insulating layer 30 . The first electrode E 1 may be referred to as a pixel electrode, an anode electrode, or an input terminal. The first electrode E 1 may include a transmissive electrode or a reflective electrode.

A pixel definition layer PDL is disposed on the first electrode E 1 and the third insulating layer 30 to expose a predetermined area of the first electrode E 1 . The pixel definition layer PDL includes a first opening OP 1 formed therethrough to expose the predetermined area of the first electrode E 1 . The area corresponding to the first opening OP 1 is referred to as a first pixel area PA 1 . The first pixel area PA 1 has a first width W 1 .

A first organic light emitting layer OEL 1 is disposed on the first electrode E 1 in the first opening OP 1 . The first organic light emitting layer OEL 1 according to the present exemplary embodiment may include an organic material generating a red, green, or blue light. Accordingly, the first organic light emitting layer OEL 1 generates the red, green, or blue light.

The first organic light emitting layer OEL 1 of the red pixel RX includes the organic material generating the red light, the first organic light emitting layer OEL 1 of the green pixel GX includes the organic material generating the green light, and the first organic light emitting layer OEL 1 of the blue pixel BX includes the organic material generating the blue light.

The first organic light emitting layer OEL 1 may include a low molecular weight or high molecular weight organic material. Although not shown in figures, the first organic light emitting layer OEL 1 may have a multi-layer structure of a hole injection layer, a hole transport layer, an emission layer, an electron transport layer, and an electron injection layer.

The hole injection layer may be disposed on the first electrode E 1 , and the hole transport layer, the emission layer, the electron transport layer, and the electron injection layer are sequentially stacked on the hole injection layer.

A second electrode E 2 is disposed on the pixel definition layer PDL and the first organic light emitting layer OEL 1 . The second electrode E 2 may be referred to as a common electrode, a cathode electrode, or an output terminal. The second electrode E 2 may include a transmissive electrode or a reflective electrode.

When the first organic light emitting diode OLED 1 is a front surface light emitting type, the first electrode E 1 is the reflective electrode and the second electrode E 2 is the transmissive electrode. When the first organic light emitting diode OLED 1 is a rear surface light emitting type, the first electrode E 1 is the transmissive electrode and the second electrode E 2 is the reflective electrode.

The first organic light emitting diode OLED 1 is disposed in the first pixel area PA 1 and includes the first electrode E 1 , the first organic light emitting layer OEL 1 , and the second electrode E 2 . The first electrode E 1 is a positive electrode, e.g., a hole injection electrode, and the second electrode E 2 is a negative electrode, e.g., an electron injection electrode.

A first source voltage is applied to the first electrode E 1 and a second source voltage having an opposite polarity to that of a driving source voltage is applied to the second electrode E 2 , by the first transistor TR 1 , to allow the first organic light emitting layer OEL 1 of the first organic light emitting diode OLED 1 to emit light.

In this case, holes and electrons are injected into the first organic light emitting layer OEL 1 and recombined with each other to generate excitons, and the excitons return to a ground state from an excited state. As a result, the first organic light emitting diode OLED 1 emits light. The first organic light emitting diode OLED 1 emits the red, green, and blue lights in accordance with a current flow to display predetermined image information.

FIG. 3B is an equivalent circuit diagram showing a first pixel PX 1 .

Referring to FIG. 3B , the first pixel PX 1 of the organic light emitting display apparatus 1000 includes a first transistor TR 1 , the first organic light emitting diode OLED 1 , a capacitor CAP, and a switching transistor ST. The switching transistor ST is connected to the gate line GL, the data line DL, and the capacitor CAP. The first transistor TR 1 is connected to the capacitor CAP, a source voltage line VL, and the first organic light emitting diode OLED 1 .

The switching transistor ST includes a control terminal (or a gate terminal) connected to the gate line GL, an input terminal (or a source/drain terminal) connected to the data line DL, and an output terminal (or a drain/source terminal) connected to a control terminal of the first transistor TR 1 or a source terminal.

The first transistor TR 1 includes the control terminal (or a gate terminal) connected to the output terminal of the switching transistor ST, an input terminal (or a source/drain terminal) applied with a first source voltage ELVDD, and an output terminal (or a drain/source terminal) connected to the positive electrode of the first organic light emitting diode OLED 1 .

The capacitor CAP includes a first capacitor electrode connected to the output terminal of the switching transistor ST and a second capacitor electrode applied with a second source voltage ELVSS. A contact point at which the control terminal of the first transistor TR 1 is connected to the output terminal of the switching transistor ST is referred to as a first node N 1 .

The control terminal of the switching transistor ST receives a gate signal, to turn on the switching transistor ST. More particularly, the switching transistor ST is turned on in response to the gate signal. The turned-on switching transistor ST applies a data voltage provided through the data line DL to the first transistor TR 1 .

The capacitor CAP is charged with the data voltage provided from the switching transistor ST and maintains the charged voltage after the switching transistor ST is turned off. The data voltage charged in the capacitor CAP is a driving voltage to drive the first transistor TR 1 and is applied to the control terminal of the first transistor TR 1 , to turn on the first transistor TR 1 .

The first transistor TR 1 is turned on until the data voltage charged in the capacitor CAP is completely discharged. A driving current is provided to the first organic light emitting diode OLED 1 through the turned-on first transistor TR 1 , and thus the first organic light emitting diode OLED 1 emits light.

FIGS. 4A to 4C are enlarged views showing a second pixel group PXG 2 .

Referring to FIGS. 4A to 4C , each of the second pixel groups PXG 2 includes first, second, and third sub-pixel groups SXG 1 , SXG 2 , and SXG 3 . Each of the first to third sub-pixel groups SXG 1 to SXG 3 is connected to a corresponding gate line of the gate line GL 1 to GLm and a corresponding data line of the data lines DL 1 to DLn.

The first to third sub-pixel groups SXG 1 to SXG 3 display different colors from each other. For instance, the first sub-pixel group SXG 1 displays a red color, the second sub-pixel group SXG 2 displays a green color, and the third sub-pixel group SXG 3 displays a blue color.

FIGS. 4A to 4C show only the first to third sub-pixel groups SXG 1 to SXG 3 , but the second pixel group PXG 2 according to the present exemplary embodiment may further include a fourth sub-pixel group (not shown) displaying a white color.

Each of the first to third sub-pixel groups SXG 1 to SXG 3 includes second pixels PX 2 . As shown in FIG. 4A , the second pixels PX 2 of the first sub-pixel groups SXG 1 include first, second, and third sub-pixels SRX 1 , SRX 2 , and SRX 3 displaying the red color. The first to third sub-pixels SRX 1 to SRX 3 are disposed to be spaced apart from each other.

As shown in FIG. 4B , the second pixels PX 2 of the second sub-pixel groups SXG 2 include fourth, fifth, and sixth sub-pixels SGX 1 , SGX 2 , and SGX 3 displaying the green color. The fourth to sixth sub-pixels SGX 1 to SGX 3 are disposed to be spaced apart from each other.

As shown in FIG. 4C , the second pixels PX 2 of the third sub-pixel groups SXG 3 include seventh, eighth, and ninth sub-pixels SBX 1 , SBX 2 , and SBX 3 displaying the blue color. The seventh to ninth sub-pixels SBX 1 to SBX 3 are disposed to be spaced apart from each other.

Each of the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 has a size smaller than that of each of the first pixels RX, GX, and BX shown in FIG. 2 . For example, the size of the first pixels RX, GX, and BX is three times greater than one sub-pixel of the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 .

The first sub-pixel SRX 1 is disposed adjacent to the fourth sub-pixel SGX 1 and the fourth sub-pixel SGX 1 is disposed adjacent to the seventh sub-pixel SBX 1 . The first sub-pixel SRX 1 , the fourth sub-pixel SGX 1 , and the seventh sub-pixel SBX 1 form one row.

The second sub-pixel SRX 2 is disposed adjacent to the fifth sub-pixel SGX 2 and the fifth sub-pixel SGX 2 is disposed adjacent to the eighth sub-pixel SBX 2 . The second sub-pixel SRX 2 , the fifth sub-pixel SGX 2 , and the eighth sub-pixel SBX 2 form one row.

The third sub-pixel SRX 3 is disposed adjacent to the sixth sub-pixel SGX 3 and the sixth sub-pixel SGX 3 is disposed adjacent to the ninth sub-pixel SBX 3 . The third sub-pixel SRX 3 , the sixth sub-pixel SGX 3 , and the ninth sub-pixel SBX 3 form one row.

The second pixel group PXG 2 further includes first connection lines L 11 and L 12 , second connection lines L 21 and L 22 , and third connection lines L 31 and L 32 . The first, second, and third connection lines L 11 and L 12 , L 21 and L 22 , and L 31 and L 32 electrically connect the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 to each other.

The first, second, and third connection lines L 11 and L 12 , L 21 and L 22 , and L 31 and L 32 have a width smaller than a width of the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 . Alternatively, the width of the first, second, and third connection lines L 11 and L 12 , L 21 and L 22 , and L 31 and L 32 may be substantially the same as the width of the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 . The first, second, and third connection lines L 11 and L 12 , L 21 and L 22 , and L 31 and L 32 include a transparent electrode, such as indium tin oxide (ITO), or a metal including a reflective material.

The first sub-pixel SRX 1 is electrically connected to the third sub-pixel SRX 3 through the first connection line L 11 and the third sub-pixel SRX 3 is electrically connected to the second sub-pixel SRX 2 through the first connection line L 12 . The fourth sub-pixel SGX 1 is electrically connected to the sixth sub-pixel SGX 3 through the second connection line L 21 and the sixth sub-pixel SGX 3 is electrically connected to the fifth sub-pixel SGX 2 through the second connection line L 22 . The seventh sub-pixel SBX 1 is electrically connected to the eighth sub-pixel SBX 2 through the third connection line L 31 and the eighth sub-pixel SBX 2 is electrically connected to the ninth sub-pixel SBX 3 through the third connection line L 32 .

FIGS. 4A to 4C show the arrangement of the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 as a representative example. According to an exemplary embodiment of the present invention, the arrangement of the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 of the second pixel group PXG 2 may have various arrangements as the first to ninth sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 are spaced apart from each other.

FIG. 5A is a cross-sectional view taken along line I-I″ of FIG. 4A . For the convenience of explanation, FIG. 5A shows only one sub-pixel group among the first to third sub-pixel groups SXG 1 to SXG 3 of the second pixel group PXG 2 .

Referring to FIG. 5A , the sub-pixel group SXG includes second organic light emitting diodes OLED 2 and a second transistor TR 2 connected to the second organic light emitting diodes OLED 2 .

The second transistor TR 2 and first, second, and third insulating layers 10 , 20 , and 30 shown in FIG. 5A have the same structure and function as those of the first transistor TR 1 and the first to third insulating layers 10 to 30 illustrated with reference to FIG. 3A , and thus repeated descriptions of the second transistor TR 2 and first, second, and third insulating layers 10 , 20 , and 30 will be omitted.

A third electrode E 3 is disposed on the third insulating layer 30 and extends horizontally. The third electrode E 3 is connected to a second drain electrode DE 2 of the second transistor TR 2 through a third contact hole CH 3 formed through the third insulating layer 30 . The third electrode E 3 may be a pixel electrode or an anode electrode.

A pixel definition layer PDL is disposed on the extending third electrode E 3 and the third insulating layer 30 . The pixel definition layer PDL includes second openings OP 2 formed therethrough to expose predetermined areas of the third electrode E 3 . The areas corresponding to the second openings OP 2 are referred to as second pixel areas PA 2 .

Each of the second pixel areas PA 2 has a second width W 2 . The second width W 2 is smaller than the first width W 1 shown in FIG. 3A . More particularly, the second pixel areas PA 2 have a size smaller that the size of the first pixel areas PA 1 .

The second pixel areas PA 2 respectively correspond to the first, second, and third sub-pixels SRX 1 , SRX 2 , and SRX 3 . Each of the second pixel areas PA 2 may correspond to the pixel areas of the fourth, fifth, and sixth sub-pixels SGX 1 , SGX 2 , and SGX 3 or the seventh, eighth, and ninth sub-pixels SBX 1 , SBX 2 , and SBX 3 illustrated with reference to FIGS. 4A to 4C .

Second organic light emitting layers OEL 2 are disposed on the third electrode E 3 in the second openings OP 2 to respectively correspond to the second openings OP 2 . The second organic light emitting layers OEL 2 shown in FIG. 5A include the same organic material.

The third electrode E 3 may include one of the first, second, and third connection lines L 11 and L 12 , L 21 and L 22 , and L 31 and L 32 shown in FIGS. 4A to 4C . More particularly, the third electrode E 3 electrically connects the second pixel areas PA 2 to each other.

The third electrode E 3 extends and is connected to the first, second, and third sub-pixels SRX 1 , SRX 2 , and SRX 3 . The first connection line L 11 extending from the third electrode E 3 of the first sub-pixel SRX 1 is connected to the third electrode E 3 of the third sub-pixel SRX 3 , and the first connection L 12 extending from the third electrode E 3 of the third sub-pixel SRX 3 is connected to the third electrode E 3 of the second sub-pixel SRX 2 .

FIG. 5A shows only the first connection lines L 11 and L 12 , but the second connection lines L 21 and L 22 or the third connection lines L 31 and L 32 may be disposed in the area in which the first connection lines L 11 and L 12 are disposed according to an exemplary embodiment of the present invention.

When each second organic light emitting diode OLED 2 is a rear surface light emitting type organic light emitting diode, the third electrode E 3 is a transmissive electrode and a fourth electrode E 4 is a reflective electrode. When each second organic light emitting diode OLED 2 is a front surface light emitting type organic light emitting diode, the third electrode E 3 is the reflective electrode and the fourth electrode E 4 is the transmissive electrode.

A first source voltage is applied to the third electrode E 3 and a second source voltage having an opposite polarity to that of a driving source voltage is applied to the fourth electrode E 4 , by the second transistor TR 2 , to allow the second organic light emitting layers OEL 2 of the second organic light emitting diodes OLED 2 to emit light.

In this case, holes and electrons are injected into the second organic light emitting layers OEL 2 and recombined with each other to generate excitons, and the excitons return to a ground state from an excited state. As a result, the second organic light emitting diodes OLED 2 emits light.

Each of the second organic light emitting diodes OLED 2 has a size smaller than the size of each of the first organic light emitting diodes OLED 1 . For example, the size of the first organic light emitting diode OLED 1 is three times greater than the size of the second organic light emitting diode OLED 2 .

FIG. 5B is an equivalent circuit diagram showing a sub-pixel group.

The first, second, and third sub-pixel groups SRX, SGX, and SBX may have substantially the same structure and function. Accordingly, FIG. 5B shows the equivalent circuit diagram of one sub-pixel group SXG among the first, second, and third sub-pixel groups SXG 1 , SXG 2 , and SXG 3 . Hereinafter, an operation of the one sub-pixel group SXG among the first, second, and third sub-pixel groups SXG 1 , SXG 2 , and SXG 3 will be described in detail with reference to FIG. 5B .

Referring to FIG. 5B , the sub-pixel group SXG of the organic light emitting display apparatus 1000 includes the second transistor TR 2 , the second organic light emitting diodes OLED 2 , a capacitor CAP, and a switching transistor ST.

The switching transistor ST is connected to the gate line GL, the data line DL, and the capacitor CAP. The second transistor TR 2 is connected to the capacitor CAP, the source voltage line VL, and the second organic light emitting diodes OLED 2 connected to each other in parallel.

The switching transistor ST includes a control terminal (or gate terminal) connected to a gate line GL, an input terminal (a source/drain terminal) connected to a data line DL, and an output terminal (a drain/source terminal) connected to a control terminal of the second transistor TR 2 .

The second transistor TR 2 includes the control terminal (or gate terminal) connected to the output terminal of the switching transistor ST, an input terminal (a source/drain terminal) receiving a first source voltage ELVDD or a drain terminal, and an output terminal (a drain/source terminal) connected to a positive electrode of the first organic light emitting diode OLED 1 .

The capacitor CAP includes a first capacitor electrode connected to the output terminal of the switching transistor ST and a second capacitor electrode receiving a second source voltage ELVSS.

A contact point at which the control terminal of the second transistor TR 2 makes contact with the output terminal of the switching transistor ST is referred to as a first node N 1 .

The control terminal of the switching transistor ST receives a gate signal, to turn on the switching transistor ST. More particularly, the switching transistor ST is turned on in response to the gate signal. The turned-on switching transistor ST applies the data voltage provided through the data line DL to the first node N 1 .

The capacitor CAP is charged with the data voltage provided from the switching transistor ST and maintains the charged voltage after the switching transistor ST is turned off. The voltage charged in the capacitor CAP is a driving voltage to drive the second transistor TR 2 and is applied to the control terminal of the second transistor TR 2 , to turn on the second transistor TR 2 . The second transistor TR 2 is turned on in response to the voltage charged in the capacitor CAP.

The driving current is provided to the second organic light emitting diodes OLED 2 through the turned-on second transistor TR 2 , and thus the second organic light emitting diodes OLED 2 simultaneously emit light.

In a display apparatus that includes a display area, which has a curved shape along the boundary thereof, the pixels disposed at the boundary area may not have the curved shape. Accordingly, the boundary may be perceived as a sawtooth or step without being perceived as the curved shape. Therefore, a display quality of the image may be deteriorated in the boundary of the display area DA.

The display apparatus 1000 according to the present exemplary embodiment includes sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 arranged in the boundary area and having the size smaller than the first pixel group PX 1 , which may improve a resolution of the boundary area of the display area DA. Accordingly, the boundary area may be perceived as a smooth curved line to a viewer, thus improving the display quality.

In addition, the size of the sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 arranged in the boundary area of the display apparatus 1000 is reduced, but the number of the organic light emitting diodes driven by one transistor increases. More particularly, the sub-pixels SRX 1 to SRX 3 , SGX 1 to SGX 3 , and SBX 1 to SBX 3 may be driven by the same current amount required to drive one first pixel PX 1 . Accordingly, power consumption of the display apparatus 1000 is reduced, in which the display apparatus 1000 may operate the organic light emitting diodes more efficiently and improve the display quality.

Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Accordingly, the inventive concept is not limited to such exemplary embodiments, but rather to the broader scope of the presented claims and various obvious modifications and equivalent arrangements.