Method to select optimal synchronization source in a multiple uninterruptible power supply system

This application claims the benefit of U.S. Provisional Application No. 61/905,309, filed on Nov. 18, 2013. The entire disclosure of the above application is incorporated herein by reference.

The present disclosure relates to a method to select an optimal synchronization source in an uninterruptible power supply system.

This section provides background information related to the present disclosure which is not necessarily prior art.

FIG. 1 shows an example of a prior art single module uninterruptible power supply (“UPS”) system 100 , which is referred to herein as a UPS module 100 . The basic elements of this UPS module are a rectifier 102 , an inverter 104 , a back-up DC power source 106 (a battery in this case), a control unit 108 and a bypass switch 110 . An input 112 of rectifier 102 is coupled to a rectifier power source 114 and an output 116 of rectifier 102 is coupled to a DC bus 118 . DC bus 118 is coupled to an input 120 of inverter 104 and to back-up DC power source 106 . An output 122 of inverter 104 is coupled to a load (or loads) 124 that are powered by UPS module 100 . An input 126 of bypass switch 110 is coupled to a bypass power source 128 and an output 130 of bypass switch 110 is coupled to the output 122 of inverter 104 . UPS module 100 may also include an output transformer (not shown) coupled between the output 122 of inverter 104 and load 124 . Under normal operating conditions the output voltage of the inverter 104 is synchronized by the control unit 108 to the voltage of bypass power source 128 , as shown in FIG. 2 . That is, the output voltage of inverter 104 is controlled so that it is in phase with the voltage of bypass power source 128 . When the bypass power source 128 is not qualified, for example goes to zero volts, the inverter 104 will output a voltage that is at a nominal frequency of bypass power source 128 but not locked in phase to any specific source. It should be understood that the term “qualified” as used with reference to a bypass power source 128 has its conventional meaning in the context of uninterruptible power supply systems. That is, a bypass power source is qualified when the power it is providing is within acceptable limits of its nominal operating parameters, such as voltage, frequency and phase rotation.

In an effort to increase availability, a plurality of UPS modules 100 can be connected to a device called a static transfer switch 300 as shown in FIG. 3 controlled by a control unit 302 . Static transfer switch 300 switches a load 308 coupled to an output of static transfer switch 300 among one or more of the UPS modules 100 coupled to static transfer switch 300 . This arrangement is referred to herein as multiple UPS system 304 . In this arrangement, one of UPS modules 100 (referred to herein as UPS 1 A) would be the sync master and its control unit 108 would send out a synchronization signal on a synchronization line 305 of a synchronization bus 306 to the control unit 108 of a slave UPS module 100 (referred to herein as UPS 1 B). The output of inverter 104 of UPS 1 B is be controlled by the control unit 108 of UPS 1 B to be synchronized with the output of UPS 1 A. That is, control unit 108 of UPS 1 B controls the inverter 104 of UPS 1 B so that the output voltage of inverter 104 of UPS 1 B is in phase with the output voltage of UPS 1 A. The bypass power source 128 for UPS 1 A is referred to herein as bypass power source 128 A and the bypass power source 128 for UPS 1 B is referred to herein as bypass power source 128 B.

If the synch master UPS module 100 (UPS 1 A) loses its bypass power source 128 A, it would go into a free run mode, but the slave UPS module 100 (UPS 1 B) would still follow the output of UPS 1 A. The result would be that UPS 1 B would not be in sync with its bypass power source 128 B and hence could not transfer to the bypass power source 128 B if need be. FIG. 4 shows UPS 1 B being out of phase with respect to the bypass power source 128 B for UPS 1 B.

This section provides a general summary of the disclosure, and is not a comprehensive disclosure of its full scope or all of its features.

In accordance with an aspect of the present disclosure, a multiple uninterruptible power supply system includes at least two uninterruptible power supply modules, each uninterruptible power supply module having a control unit. The multiple uninterruptible power supply system also includes a static transfer switch to which each uninterruptible power supply module is coupled. A synchronization bus having a synchronization line couples the control units of each uninterruptible power supply module. The uninterruptible power supply module are synchronized to each other with one of the uninterruptible power supply modules being operated as a sync master UPS and its control unit sending synchronization signals on the synchronization bus that are received on the synchronization bus by control units of each of the other uninterruptible power supply module which are each operated as a slave UPS. When a bypass power source for the uninterruptible power supply module that is being operated as the sync master becomes unqualified, another one of the UPS modules is operated as the sync master and its control unit then sends out the synchronization signals.

In accordance with an aspect of the present disclosure, the synchronization signals are sent to a control unit of the static transfer switch. When the control unit of the static transfer switch detects based on the synchronization signals that a UPS module that was being operated as a slave UPS has switched over to be operated as the sync master UPS, the control unit of the static transfer switches a load coupled to the static transfer switch over to the UPS module that switched over to be operated as the sync master UPS.

Further areas of applicability will become apparent from the description provided herein. The description and specific examples in this summary are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.

The drawings are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present disclosure.

Corresponding reference designations indicate corresponding parts throughout the several views of the drawings.

FIG. 1 is block diagram of a typical prior art uninterruptible power supply system having a single uninterruptible power supply module;

FIG. 2 is graph showing an output of the uninterruptible power supply module of FIG. 1 synchronized to a bypass power source to which the uninterruptible power supply module is coupled;

FIG. 3 is a block diagram of a typical prior art uninterruptible power supply system having two uninterruptible power supply modules coupled to a static transfer switch with one of the uninterruptible power supply modules being operated as a slave UPS having its output synchronized to an output of the other uninterruptible power supply module being operated as a sync master UPS;

FIG. 4 is graph showing the output of the uninterruptible power supply module of FIG. 3 being operated as a slave UPS not synchronized with a bypass power source to which that uninterruptible power supply module is coupled;

FIG. 5 is a logic timing diagram in accordance with an aspect of the present disclosure showing a process in a multiple uninterruptible power supply system of the switch in sync master from an uninterruptible power supply module initially being operated as a synch master UPS to an uninterruptible power supply being operated as a slave UPS when a bypass power source to which the uninterruptible power supply module initially being operated as the sync master becomes unqualified;

FIG. 6 is a flow chart of logic of FIG. 5 for the control of the uninterruptible power supply module initially being operated as a sync master UPS;

FIG. 7 is a flow chart of logic of FIG. 5 for the control of the uninterruptible power supply module initially being operated as a slave master UPS;

FIG. 8 is a block diagram of a typical prior art uninterruptible power supply system having at three uninterruptible power supply modules coupled to a static transfer switch with two of the uninterruptible power supply modules being operated as a slave UPS having their outputs synchronized to an output of the other uninterruptible power supply module being operated as a sync master UPS;

FIG. 9 is a logic timing diagram in accordance with an aspect of the present disclosure showing a process in a multiple uninterruptible power supply system of the switch in sync master to the third uninterruptible power supply module of FIG. 8 ;

FIG. 10 is a flow chart of the logic of FIG. 9 for the control of the third uninterruptible power supply module of FIG. 8 ;

FIG. 11 is a block diagram of the multiple uninterruptible power supply system of FIG. 3 modified in accordance with an aspect of the present disclosure to have a synchronization bus coupled to a control unit of the static transfer switch in addition to control units of the uninterruptible power supply modules.

Example embodiments will now be described more fully with reference to the accompanying drawings.

In accordance with an aspect of the present disclosure, a method of synchronizing UPS modules 100 in a multiple UPS system 304 is described. The multiple UPS system 304 includes UPS 1 A, UPS 1 B and static transfer switch 300 , as discussed above. UPS 1 A and UPS 1 B are each a UPS module 100 and can each be operated as a sync master UPS and as a slave UPS with its output synchronized to an output of the sync master UPS. UPS 1 A is operated as an initial sync master UPS and UPS B is operated as a slave UPS with its output synchronized to the output of UPS 1 A. In accordance with an aspect of the method of the present disclosure, when the bypass power source for UPS 1 A becomes unqualified, UPS 1 B is transitioned to be operated as a substitute sync master UPS and UPS 1 A is transitioned to be operated as a slave UPS. When this occurs, the control unit 108 of UPS 1 B drives the synchronization signal and UPS 1 A follows UPS 1 B. The synchronization signal may illustratively be a square wave signal having a duty cycle. This keeps the outputs of the UPS modules 100 synchronized as before, but it also ensures that at least one UPS module 100 is also synchronized to a bypass power source. Therefore if something happened that required the multiple UPS system 304 to shutdown, the load could be transferred to bypass power.

The control unit 108 in UPS 1 A is continuously generating the synchronization signals and the control unit 108 in UPS 1 B is continuously reading the synchronization signals send out by the control unit 108 of UPS 1 A. The control unit 108 of UPS 1 B is constantly monitoring the synchronization signals by detecting the rising edge and falling edge of the signals. By calculating the time difference between the two rising edges and the time difference between one rising edge and the falling edge right after the previous rising edge, the control unit 108 of UPS 1 B determines the duty cycle of the synchronization signals as shown in Equation 1. A similar calculation is used by the control unit 108 of UPS 1 A to determine when to send a rising edge and when to send a falling edge. Once the duty cycle of the synchronization signal is determined, the control unit 108 of UPS 1 B will know when to switch to be a master or slave.

When the bypass power source 128 A for UPS 1 A is qualified, the synchronization signals sent out by the control unit 108 of UPS 1 A on synchronization bus 306 are at a qualified duty cycle, which is a fixed duty cycle such as 50%. If the bypass power source 128 A for UPS 1 A fails (that is, it is no longer qualified), the duty cycle of synchronization signals sent out by the control unit 108 of UPS 1 A are changed to have an unqualified duty cycle, which is a fixed duty cycle that is different than the qualified duty cycle, and may for example be a 25% duty cycle. In the following discussion, 50% is used as the qualified duty cycle and 25% is used as the unqualified duty cycle. It should be understood that the qualified duty cycle can be other than 50% and the unqualified duty cycle can be other than 25%.

When the control unit 108 of UPS 1 B receives 25% duty cycle synchronization signals from the control unit of UPS 1 A, the control unit 108 of UPS 1 B knows that UPS 1 A lost its bypass power source 128 A and the control unit 108 of UPS 1 B will transition UPS 1 B to be operated as a substitute sync master. In doing so, the control unit 108 of UPS 1 B will start sending synchronization signals on the synchronization bus 306 that have the qualified duty cycle, such as 50%, starting with a synchronization pulse having the 50% duty cycle. The synchronization bus 306 is configured so that the synchronization signals having highest duty cycle are passed through and any synchronization signals having lower duty cycles are not. That is, the synchronization signals having the highest duty cycle are passed through on the synchronization bus 306 from the control unit sending the synchronization signals to the control units of the other UPS modules and any synchronization signals at a lower duty cycle that are sent by any of the control units of the other UPS modules are not passed through from the control unit sending them to the other units of the other UPS modules.

The control unit of UPS 1 A will then be receiving the 50% duty cycle synchronization signals sent by the control unit 108 of UPS 1 B and the control unit 108 of UPS 1 A will know that UPS 1 B is trying to become the substitute sync master, usually upon receiving the initial synchronization pulse having the 50% duty cycle. Since UPS 1 A lost its source of bypass power and the control unit of UPS 1 A receives the 50% duty cycle synchronization signals from UPS 1 B, UPS 1 A will give up sync mastership (cease being the sync master UPS). The control unit 108 of UPS 1 A will then stop sending the 25% duty cycle synchronization signals and will then operate UPS 1 A as a slave UPS and start to follow the 50% duty cycle synchronization signals from the control unit 108 of UPS 1 B.

When the bypass power source 128 A for UPS 1 A (the initial sync master UPS now be operated as a slave UPS as described above) is re-qualified, the control unit 108 of UPS 1 A will then send synchronization signals having a sync master request duty cycle on the synchronization bus 306 to notify the control unit 108 of UPS 1 B (the substitute sync master as described above) that UPS 1 A wants to take back sync mastership. The sync master request duty cycle is higher than the qualified duty cycle and the unqualified duty cycle, and may for example be a 75% duty cycle. It should be understood that the sync master request duty cycle can be other than 75%.

Control unit 108 of UPS 1 B will then be receiving the 75% duty cycle synchronization signals. Since control unit 108 of UPS 1 B knows that it is sending 50% duty cycle synchronization signals, it then knows that the 75% duty cycle synchronization signals must be from the control unit 108 of UPS 1 A which wants to take back sync mastership. After some delay, the control unit 108 of UPS 1 B stops sending the 50% duty cycle synchronization signals and lets UPS 1 A become the sync master. After a longer delay, the control unit 108 of UPS 1 A will change to send 50% duty cycle synchronization signals to return to normal operation status with UPS 1 A being operated by its control unit 108 as the sync master UPS.

It should be understood that the synchronization bus 306 could be configured to pass the synchronization signals having the lowest duty cycle instead of the highest duty cycle. In that case, the sync master request duty cycle would have the lowest duty cycle, the unqualified duty cycle would then have the highest duty and the qualified duty cycle would fall between the sync master duty cycle and the unqualified duty cycle.

FIG. 5 shows the process of the switch in synch master from UPS 1 A to UPS 1 B when the bypass power source 128 A for UPS 1 A becomes unqualified and then when UPS 1 A takes back synch mastership when the bypass power source 128 A for UPS 1 A is re-qualified. The logic shown in FIG. 5 is illustratively implemented in the control units 108 of UPS 1 A and UPS 1 B, such as in software, and FIGS. 6 and 7 are a flow chart of this logic. FIG. 6 shows the logic implemented in control unit 108 of UPS 1 A and FIG. 7 shows the logic implemented in control unit 108 of UPS 1 B.

With reference to FIGS. 6 and 7 , at 600 UPS A is operated by its control unit 108 as the sync master UPS and control unit 108 of UPS A sends sync signals on the synchronization bus 306 at the qualified duty cycle. At 700 , control unit 108 of UPS B receives the synchronization signals on the synchronization bus 306 having the qualified duty cycle and operates UPS B as a slave UPS. At 602 , control unit 602 checks whether bypass power source 128 to which UPS A is coupled has become unqualified. If it hasn't, control unit 108 branches back to 600 . If this bypass power source 128 has become unqualified, control unit 108 branches to 604 where it begins sending synchronization signals having the unqualified duty cycle on the synchronization bus 306 . At 702 , the control unit 108 of UPS B checks whether it is receiving synchronization signals on the synchronization bus 306 having the unqualified duty cycle. If not, control unit 108 of UPS B branches back to 700 . If control unit 108 of UPS B is receiving synchronization signals having the unqualified duty cycle, control unit 108 of UPS B branches to 704 where it operates UPS B as the sync master UPS and begins sending synchronization signals having the qualified duty cycle on the synchronization bus 306 .

At 606 , control unit 108 of UPS A checks whether it has begun receiving synchronization signals on the synchronization bus 306 at the qualified duty cycle. If not, control unit 108 of UPS A branches back to 604 . If control unit 108 of UPS A has begun receiving synchronization signals on the synchronization bus 306 , it branches to 608 where it operates UPS A as a slave UPS and ceases sending synchronization signals on the synchronization bus 306 having the unqualified duty cycle, which also means that control unit 108 of UPS A has ceased sending any synchronization signals on the synchronization bus 306 .

At 610 , control unit 108 of UPS A checks whether bypass power source 128 A for UPS A has become re-qualified. If not, control unit 108 of UPS A branches back to 608 . If bypass power source 128 A has become re-qualified, control unit 108 of UPS A branches to 612 where it begins sending synchronization signals having the sync master request duty cycle on the synchronization bus 306 . Control unit 108 of UPS A then proceeds to 614 where after a delay (referred to herein as the “first delay”), it ceases sending synchronization signals on the synchronization bus 306 having the sync master request duty cycle and then branches back to 600 where it resumes operating UPS A as the sync master UPS. At 706 , control unit 108 of UPS B checks whether it has begun receiving synchronization signals on the synchronization bus 306 having the sync master request duty cycle. If not, control unit 108 of UPS B branches back to 704 . If control unit 108 of UPS B has begun receiving synchronization signals on the synchronization bus 306 having the sync master request duty cycle, control unit 108 of UPS B branches to 708 where, after delay (referred to herein as the “second delay”), ceases sending synchronization signals on the synchronization bus 306 having the qualified duty cycle, which also means that control unit 108 of UPS B has ceased sending any synchronization signals on the synchronization bus 306 . Control unit 108 of UPS B then branches back to 700 where it resumes operating UPS B as a slave UPS.

The same method works for a multiple UPS system having more than two UPS modules 100 , such as a multiple UPS system 304 ′ ( FIG. 8 ) having a third UPS module 100 , referred to herein as UPS 1 C. During the synch mastership switch period discussed above, UPS 1 C is always synchronized to the synchronization signal being sent by the control unit 108 of UPS 1 A or UPS 1 B (as the case may be) and UPS C doesn't need to be involved the process of switching synch mastership unless the bypass power source 128 B for UPS 1 B is also not qualified. In that case, UPS 1 C will take over being the synch master instead of UPS 1 B. FIG. 9 shows the process of the switch in sync master to UPS 1 C when the bypass power sources 128 A and 128 B are both unqualified. The logic shown in FIG. 9 is illustratively implemented in the control units 108 of UPS 1 A-UPS 1 C, such as in software and FIG. 10 is a flow chart of the logic implemented in the control unit 108 of UPS 1 C.

With reference to FIG. 10 , at 1000 , control unit 108 of UPS C receives the synchronization signals on the synchronization bus 306 and operates UPS C as a slave UPS. At 1002 , control unit 108 of UPS B checks whether it has been receiving synchronization signals on the synchronization bus 306 having the unqualified duty cycle for a period of time referred to herein as the priority delay for UPS C. If not, control unit 108 of UPS C branches back to 1000 . If control unit 108 of UPS C has been receiving synchronization signals having the unqualified duty cycle for the priority delay for UPS C, control unit 108 of UPS C branches to 1004 where it operates UPS C as the sync master UPS and begins sending synchronization signals having the qualified duty cycle on the synchronization bus 306 . Assuming UPS B was being operated as the sync master UPS and UPS A was being operated as a slave UPS, control unit 108 of UPS B responds to receiving synchronization signals on the synchronization bus 306 at the synchronization duty cycle by ceasing sending any synchronization signals on the synchronization bus and then operating UPS B as a slave UPS, in the same manner as discussed above with respect to UPS A when UPS B has taken over as the sync master.

At 1006 , control unit 108 of UPS C checks whether it has begun receiving synchronization signals on the synchronization bus 306 at the sync master request duty cycle. If not, control unit 108 of UPS C branches back to 1004 . If control unit 108 of UPS C has begun receiving synchronization signals on the synchronization bus 306 at the sync master request duty cycle, control unit 108 of UPS C branches to 1008 . At 1008 , after a delay (which is the same as the first delay discussed above), control unit 108 of UPS C ceases sending synchronization signals on the synchronization bus having the qualified duty cycle which also means that control unit 108 of UPS A has ceased sending any synchronization signals on the synchronization bus 306 . Control unit 108 of UPS C then branches back to 1000 where it resumes operating UPS C as a slave UPS.

The priority delay for UPS C subordinates UPS C in priority to UPS B in taking over as the sync master when the bypass power source 128 A for UPS A becomes unqualified. If control unit 108 of UPS B begins operating UPS B as the sync master during the priority delay for UPS C, then the control unit 108 for UPS C will continue to operate UPS C as a slave UPS and not switch UPS C to take over as the sync master UPS. In this way, the priority of the UPS modules 100 in taking over as the sync master UPS is set by the length of their priority delays, with the priority delays for each being different periods. In this regard, the shorter the priority delay (which could be zero for UPS B) the higher the priority.

With reference to FIG. 11 , in accordance with an aspect of the present disclosure, the synchronization signals are sent to a control unit 302 of the static transfer switch 300 so that the static transfer switch 300 automatically changes the preferred bypass power source 128 . The control unit 302 detects based on the synchronization signals if UPS module 100 that was being operated as a slave UPS has switched over to be operated as the sync master UPS, meaning this UPS module 100 is following an alternate bypass power source (the bypass power source to which it is coupled) rather than following the an alternate bypass power source of the UPS module 100 that had been operated as the sync master UPS. If a UPS module that had been operated as a slave UPS has been switched to be operated as the sync master UPS, the static transfer switch 300 switches the load 308 over to that UPS module 100 . This improves the availability of power to the load 308 .

The control units 108 of the UPS modules 100 and the control unit 302 of the static transfer switch may be or include a digital processor (DSP) or microprocessor which are programmed with software implementing the above described methods. It should be understood that other logic devices can be used, such as a Field Programmable Gate Array (FPGA), a complex programmable logic device (CPLD), or application specific integrated circuit (ASIC).

The foregoing description of the embodiments has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varied in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.