Method for manufacturing semiconductor device for forming metal element-containing layer on insulating layer in which concave portion is formed, semiconductor device including insulating layer in which concave portion is formed, and semiconductor layer on insulating layer in which concave portion is formed

This application is a Continuation Application of PCT International Application No. PCT/JP2013/002296, filed Apr. 2, 2013, which claimed the benefit of Japanese Patent Application No. 2012-090393, filed Apr. 11, 2012, the entire content of each of which is hereby incorporated by reference.

The present disclosure relates to a method for manufacturing a semiconductor device, a semiconductor device, and a semiconductor manufacturing apparatus.

Semiconductor devices using copper (Cu) having low resistance as a material for wirings and via conductors have been manufactured. However, the use of Cu requires a bather layer to prevent Cu diffusion. While tantalum (Ta) or a tantalum nitride film (TaN) is typically used for the barrier layer, a self-forming barrier layer using a CuMn alloy instead of Ta and TaN has been recently proposed.

Since a CuMn alloy formed as a film serves as a seed layer, a Cu-plated layer can be directly formed on the CuMn alloy. By annealing after the plating, the Cu-plated layer reacts with an underlying SiO 2 layer (an interlayer insulating layer) or water contained therein to form a MnSixOy layer (where x and y are any positive number) or a MnOx layer (where x is any positive number) in a self-aligning manner at a boundary between the SiO 2 layer and the CuMn alloy. Since the MnSixOy layer (silicate of Mn element: Mn silicate layer) and the MnOx (Mn oxide layer) become Cu barrier layers, it is possible to reduce the number of manufacturing processes. Manganese oxides may include MnO, Mn 3 O 4 , Mn 2 O 3 , MnO 2 and the like depending on the valence of Mn, which are herein collectively referred to as MnOx (Mn oxide).

In recent years, with high integration and high miniaturization of semiconductor devices, as the distance between wirings becomes smaller, electric capacitance between adjacent wirings (inter-wiring capacitance) is being increased. This causes a phenomenon in which signals transmitted through wirings become slower (signal delay). To avoid this signal delay, a material having a smaller relative dielectric constant (Low-k material) is being used for the interlayer insulating layer. This is because a smaller relative dielectric constant provides smaller inter-wiring capacitance. SiOC, SiOCH and the like containing organic groups such as methyl groups and the like has been raised as proper Low-k materials and there is a trend that C (carbon) is contained in the interlayer insulating layer.

In comparison between the Mn silicate layer and the Mn oxide layer as barrier layers, the Mn silicate layer is considered to be more desirable from the following three viewpoints. 1) The Mn silicate layer is more amorphous and hence has a smaller crystal grain boundary (higher diffusion ability of Cu or O) than the Mn oxide layer, which can result in the improvement of the barrier property. 2) When the Mn oxide layer becomes a silicate by reaction with silicon oxide (SiOx) of the interlayer insulating layer, a volume (film thickness) thereof is reduced. Therefore, since a sectional area of a Cu wiring or a via conductor formed on the surface of the Mn silicate layer increases as much as the reduced amount, the Cu wiring or the via conductor can have low resistance. 3) Since the Mn oxide may take a plurality of states, such as MnO, Mn 3 O 4 , Mn 2 O 3 , MnO 2 and the like, this is unstable because of its change in density and volume. In contrast, the Mn silicate is chemically stable. Once the Mn silicate is formed, since its state is more stable than the Mn oxide, aging degradation of semiconductor devices may be reduced. However, conventionally, it is uncertain which one of the Mn silicate layer and the Mn oxide layer will be formed on the interlayer insulating layer using a Low-k material, which resulted in difficulty in reliably forming the Mn silicate layer on the interlayer insulating layer.

The present disclosure provides a method for manufacturing a semiconductor device, which is capable of forming a silicate layer on a surface of an insulating layer having a low relative dielectric constant with high efficiency, a semiconductor device, and a semiconductor manufacturing apparatus.

According to one embodiment of the present disclosure, there is provided a method for manufacturing a semiconductor device for forming a metal element-containing layer on an insulating layer in which a concave portion is formed, including: forming an oxide layer including mainly an oxide of the metal element on the insulating layer including the concave portion; and forming a silicate layer including mainly a silicate of the metal element by making the oxide layer silicate by annealing under a reducing atmosphere.

According to another embodiment of the present disclosure, there is provided a semiconductor device including an insulating layer in which a concave portion is formed, and a metal element-containing layer formed on the insulating layer, in which an oxide layer including mainly an oxide of the metal element is formed on the insulating layer including the concave portion, and a silicate layer including mainly a silicate of the metal element is formed by making the oxide layer silicate by annealing under a reducing atmosphere.

According to another embodiment of the present disclosure, there is provided a semiconductor manufacturing apparatus for forming a metal element-containing layer on an insulating layer in which a concave portion is formed, including: a first processing chamber in which an oxide layer including mainly an oxide of the metal element is formed on the insulating layer including the concave portion; and a second processing chamber in which a silicate layer including mainly a silicate of the metal element is formed by making the oxide layer silicate by annealing under a reducing atmosphere.

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present disclosure, and together with the general description given above and the detailed description of the embodiments given below, serve to explain the principles of the present disclosure.

FIG. 1 is a sectional view of a semiconductor device according to an embodiment.

FIG. 2 is a view schematically illustrating the configuration of a semiconductor manufacturing apparatus according to an embodiment.

FIG. 3 is a schematic sectional view of a processing chamber.

FIG. 4A is a view illustrating a semiconductor device manufacturing process according to an embodiment.

FIG. 4B is a view illustrating a semiconductor device manufacturing process according to an embodiment.

FIG. 4C is a view illustrating a semiconductor device manufacturing process according to an embodiment.

FIG. 4D is a view illustrating a semiconductor device manufacturing process according to an embodiment.

FIG. 4E is a view illustrating a semiconductor device manufacturing process according to an embodiment.

FIG. 5A is a flow chart illustrating a process flow of a semiconductor manufacturing apparatus.

FIG. 5B is a flow chart illustrating a process flow of a semiconductor manufacturing apparatus.

FIG. 5C is a flow chart illustrating a process flow of a semiconductor manufacturing apparatus.

FIG. 6 is a graph showing a relationship between plasma processing and XRF film thickness (MnOx equivalent).

FIG. 7 is a graph showing the ability of a Mn-containing barrier layer as a Cu diffusion barrier and results of an analysis on elements at particular positions of an insulating layer.

FIG. 8A is a graph showing results of waveform separation analysis on XPS measurement data by curve fitting in a binding energy range of Si 2p.

FIG. 8B is a graph showing results of waveform separation analysis on XPS measurement data by curve fitting in a binding energy range of O 1s.

FIG. 9 is a graph showing results of evaluation on adhesion strength of a stacked structure of a Cu layer/Mn oxide layer/insulating layer, measured by an m-ELT method.

A semiconductor device, a method for manufacturing a semiconductor device, and a semiconductor manufacturing apparatus according to embodiments will now be described with reference to the accompanying drawings. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to one of ordinary skill in the art that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, systems, and components have not been described in detail so as not to unnecessarily obscure aspects of the various embodiments.

(Embodiments)

FIG. 1 is a sectional view of a semiconductor device 100 according to an embodiment. A transistor peripheral circuit (FEOL) is not shown in the specification, including FIG. 1 . The semiconductor device 100 is formed in a semiconductor substrate W (hereinafter referred to as a wafer W). The semiconductor device 100 includes an interlayer insulating layer 101 , a wiring 102 embedded in a trench (wiring groove) 101 t of the interlayer insulating layer 101 , a barrier layer 102 b interposed between the interlayer insulating layer 101 and the wiring 102 , a diffusion prevention layer 103 formed on the interlayer insulating layer 101 and a portion of the wiring 102 , an interlayer insulating layer 104 formed on the diffusion prevention layer 103 and having a via hole 104 h and a trench (wiring groove) 104 t formed therein, and a silicate layer 105 (hereinafter referred to as a Mn silicate layer 105 ) formed on inner surfaces of the via hole 104 h and the trench (wiring groove) 104 t and containing MnSi x O y (x and y are any positive number) as a principal component.

Examples of the interlayer insulating layers 101 and 104 may include a SiO 2 layer, a SiOF layer, a TEOS layer, a Low-k layer and the like. In order to reduce cross-talk between wirings, the interlayer insulating layers 101 and 104 are preferably a Low-k layer. In this embodiment, the interlayer insulating layers 101 and 104 are preferably a Low-k layer. Examples of materials for the Low-k layer may include SiOH, SiOC, SiOCH and the like, which commonly contain a silicon oxide (SiOx) ingredient. Further, in order to further reduce a relative dielectric constant, these materials may have a porous structure including a plurality of pores.

The wiring 102 is a copper (Cu) wiring buried by a damascene process in the trench 101 t formed by selectively etching the interlayer insulating layer 101 .

The barrier layer 102 b interposed between the interlayer insulating layer 101 and the wiring 102 is used to prevent Cu in the wiring 102 from being diffused into the interlayer insulating layer 101 and/or the interlayer insulating layer 104 . The barrier layer 102 b is made of material such as, for example, tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), MnOx, MnSixOy or the like.

The diffusion prevention layer 103 is formed on the interlayer insulating layer 101 and a portion of the wiring 102 . The diffusion prevention layer 103 is used to prevent Cu in the wiring 102 from being diffused into the interlayer insulating layer 104 and/or the interlayer insulating layer 101 . The diffusion prevention layer 103 is made of material such as, for example, silicon nitride (Si 3 N 4 ), silicon carbide (SiC), silicon carbon nitride (SiCN), silicon oxynitride (SiON), MnOx, MnSixOy or the like. The diffusion prevention layer 103 also acts as an etching stop layer when the via hole 104 h and the trench (wiring groove) 104 t are formed in the interlayer insulating layer 104 .

The Mn silicate layer 105 is formed on the inner surfaces of the via hole 104 h and the trench 104 t formed in the interlayer insulating layer 104 . The Mn silicate layer 105 includes mainly a Mn silicate (MnSixOy) and acts as a Cu diffusion prevention layer (barrier layer).

(Apparatus for Manufacturing Semiconductor Device 100 )

FIG. 2 is a view schematically illustrating the configuration of a semiconductor manufacturing apparatus 200 for manufacturing the semiconductor device 100 . The configuration of the semiconductor manufacturing apparatus 200 will now be described with reference to FIG. 2 . The semiconductor manufacturing apparatus 200 includes a loader module 210 , load lock chambers 220 A and 220 B, a transfer chamber 230 , a plurality of processing chambers 240 A to 240 E and a controller 250 .

(Loader Module 210 )

The loader module 210 includes a plurality of door openers 211 A to 211 C, a transfer robot 212 and an alignment chamber 213 . The door openers 211 A to 211 C open/close doors of containers C (for example, FOUP (Front Opening Unified Pod), SMIF (Standard Mechanical Inter Face) Pod or the like) of a wafer W to be processed. The transfer robot 212 transfers the wafer W among the container C, the alignment chamber 213 and the load lock chambers 220 A and 220 B.

Installed in the alignment chamber 213 is an aligner (not shown) for adjusting a notch (or orientation flat) position of the wafer W taken out of the container C and the eccentricity of the wafer W. In the following description, the adjustment of the notch (or orientation flat) position and the eccentricity of the wafer W are referred to as alignment. The wafer W unloaded by the transfer robot 212 from the container C is aligned in the alignment chamber 213 and is then transferred to the load lock chamber 220 A (or 220 B). The door openers 211 A to 211 C, the transfer robot 212 and the aligner in the alignment chamber 213 are controlled by the controller 250 .

Each of the load lock chambers 220 A and 220 B is provided with a vacuum pump (for example, a dry pump) and a leak valve to switch between the air atmosphere and the vacuum atmosphere. The load lock chambers 220 A and 220 B include their respective gate valves GA and GB for loading/unloading the wafer W, which are installed at the side of the loader module 210 . When the wafer W is loaded/unloaded into/out of the load lock chambers 220 A and 220 B by the transfer robot 212 , the gate valves GA and GB are opened after the load lock chambers 220 A and 220 B are switched to the air atmosphere. The gate valves GA and GB are controlled by the controller 250 .

(Transfer Chamber 230 )

The transfer chamber 230 includes gate valves G 1 to G 7 and a transfer robot 231 . The gate valves G 1 and G 2 are gate valves for the load lock chambers 220 A and 220 B, respectively. The gate valves G 3 to G 7 are gate valves for the processing chambers 240 A to 240 E, respectively. The transfer robot 231 transfers the wafer W between the load lock chambers 220 A and 220 B and the processing chambers 240 A to 240 E.

The transfer chamber 230 is also installed with a vacuum pump (for example, a dry pump) and a leak valve. The transfer chamber 230 is usually under a vacuum atmosphere and is switched to the air atmosphere if necessary (for example, when maintenance is required). In addition, a Turbo Molecular Pump (TMP) or a Cryo pump may be installed to implement a high vacuum environment. The gate valves G 1 to G 7 and the transfer robot 231 are controlled by the controller 250 . In addition, the transfer chamber 230 may be turned to the non-oxidizing atmosphere by allowing the flow of an inert gas such as a nitrogen gas (N 2 gas), an argon gas (Ar gas), a helium gas (He gas) or the like into the transfer chamber 230 . In addition, oxygen contained in the inert gas may be removed by an oxygen pump using yttria-stabilized zirconia (YSZ) to put the transfer chamber 230 under an extremely low-oxygen partial pressure condition.

(Processing Chamber 240 A)

The processing chamber 240 A is a degassing chamber. The processing chamber 210 A heats the wafer W to a predetermined process temperature by means of a heater or a lamp in order to remove water and organic material adsorbed in the interlayer insulating layers 101 and 104 formed on the wafer W. The process temperature of the processing chamber 240 A is preferably set to a temperature higher than a process temperature of the processing chamber 240 C described later.

Since a Mn raw material gas (hereinafter referred to as a Mn precursor) used in the processing chamber 240 C has high reactivity with water, the thickness of a Mn oxide (MnOx) to be formed may be varied depending on the amount of water, which may result in poor consistency in the film-forming process. To avoid this, the process temperature of the processing chamber 240 A is preferably set to a temperature higher than the process temperature of the processing chamber 240 C described later. In addition, the processing chamber 240 A may be put under an inert gas atmosphere (non-oxidizing atmosphere) by allowing the flow of an inert gas such as a nitrogen gas (N 2 gas), an argon gas (Ar gas), a helium gas (He gas) or the like into the processing chamber 240 A.

In some cases, in order to remove Cu oxide formed on a surface of the Cu wiring 102 exposed on the bottom of the via hole 104 h , the processing chamber 240 A may be put under a reducing gas atmosphere by allowing the flow of a reducing gas such as, for example, a hydrogen gas (H 2 gas), a carbon monoxide gas (CO gas), an ammonia gas (NH 3 ) gas, a carboxyl acid gas such as a formic acid gas, or the like into the processing chamber 240 A. An example of process conditions for removal of the Cu oxide is as follows.

Process temperature (temperature of wafer W): 200 to 350 degrees C. Process pressure: 1 (vacuum) to 2670 Pa Process time: 30 to 300 seconds

Through the above processing, water (physisorbed water) adsorbed on the interlayer insulating layers 101 and 104 can be removed to avoid an effect on the film forming process, thereby maintaining consistency in the film-forming process.

(Processing Chamber 240 B)

The processing chamber 240 B is a surface modifying chamber. In the processing chamber 240 B, the surface of the interlayer insulating layer 104 is modified by generating plasma and exposing the interlayer insulating layer 104 to the generated plasma or exposing the interlayer insulating layer 104 to radical species derived from the plasma. This modification involves extraction (removal) of carbon (C) from the interlayer insulating layer 104 , reinforcing compactness (densification), reduction of pore diameter, surface hydrophilization and so on. Different kinds of gases may be used to generate the plasma. For example, gases containing hydrogen (H), carbon (C), nitrogen (N) or oxygen (O) (one of a H 2 gas, CO gas, CO 2 gas, CH 4 gas, N 2 gas, NH 3 gas, H 2 O gas, O 2 gas, O 3 gas, NO gas, N 2 O gas and NO 2 gas, or a combination thereof) may be used to generate the plasma. In addition, it is to be understood that a noble gas such as He, Ar or the like may be added to facilitate ignition of the plasma.

In general, an organic material such as trimethylsilane or the like is used to form a Low-k layer (SiOC) constituting the interlayer insulating layer 104 . For this reason, an alkyl group, including a methyl group (—CH 3 ), is contained in the interlayer insulating layer 104 and accordingly, a certain amount of carbon (C) is contained in the interlayer insulating layer 104 . When the surface of the interlayer insulating layer 104 is exposed to plasma or ions and subjected to a modifying process, most of the carbon (C) escapes from the surface of the interlayer insulating layer 104 . Accordingly, the surface composition of the interlayer insulating layer 104 is turned from SiOC to SiO 2 .

As a result, a modified layer such as SiO 2 having increased compactness (densified) due to the leakage of C, is formed on the surface of the interlayer insulating layer 104 . If the interlayer insulating layer 104 is a porous Low-k film, the modified layer formed on the surface of the interlayer insulating layer 104 by the modifying process has a state other than the porous state since the diameters of the pores are reduced and/or the pores are blocked, thereby allowing the modified layer to act as a pore seal of the interlayer insulating layer 104 . As a result, when a Mn oxide layer is formed, it is possible to prevent a Mn precursor as a precursor of the Mn oxide layer from permeating into the interlayer insulating layer 104 , thereby preventing an increase in the relative dielectric constant of the interlayer insulating layer 104 .

In addition, by the above-described forming method, most of the surface of the interlayer insulating layer 104 comes to have a methyl group (—CH 3 ) and accordingly, the surface of the interlayer insulating layer 104 is a hydrophobic surface. When the above-described modifying process is performed, the methyl group is cleaved, resulting in a —OH group or a bond of Si—O—Si. That is, the above-described modifying process involves hydrophilization (i.e., the surface of the interlayer insulating layer 104 is modified by the modifying process from hydrophobicity to hydrophilicity). When the hydrophilic modified layer is formed on the surface of the interlayer insulating layer 104 , a layer including mainly MnOx (Mn oxide) (hereinafter referred to as a Mn oxide layer) can be efficiently formed (deposited) on the interlayer insulating layer 104 in the processing chamber 240 C described later.

In addition, the plasma process in the processing chamber 240 B may be performed for a few seconds (e.g., one to 90 seconds). In addition, the process pressure and applied high-frequency power in the plasma process are not particularly limited. For example, from the standpoint of practical use, the process pressure may fall within a range of 10 −1 to 10 5 Pa and the high-frequency power may fall within a range of 10 1 to 10 4 Watt. In addition, when a gas containing hydrogen (H), or a gas containing oxygen (O) (one of a H 2 gas, CO gas, CO 2 gas, CH 4 gas, NH 3 gas, H 2 O gas, O 2 gas, O 3 gas, NO gas, N 2 O gas and NO 2 gas, or a combination thereof) is used for the plasma process, since formation of an —OH group in the surface of the interlayer insulating layer 104 is promoted, the Mn oxide layer can be more efficiently deposited.

In addition, in order to promote the effect of the plasma process, the surface of the interlayer insulating layer 104 may be subjected to the plasma process while heating the wafer W to a range of 100 to 350 degrees C. In this case, since the function of the processing chamber 240 A is equipped in the processing chamber 240 B, the processing chamber 240 A and the processing chamber 240 B may be integrated into a single processing chamber.

Means for generating the plasma may include a CCP (Capacitively Coupled Plasma) generating means, an ICP (Inductively Coupled Plasma) generating means, a HWP (Helicon Wave Plasma) generating means, a microwave-excited SWP (Surface Wave Plasma) generating means (including RLSA (Radial Line Slot Antenna) plasma and SPA (Slot Plane Antenna) plasma), an ECP (Electron Cyclotron resonance Plasma) generating means, and a remote plasma generating means using one or more of the above-mentioned plasma generating means.

In addition to the exposure of the surface of the interlayer insulating layer 104 to the plasma, other methods may be used to modify (mainly hydrophilize in this example) the surface of the interlayer insulating layer 104 . For example, the surface of the interlayer insulating layer 104 may be irradiated with an ultraviolet ray while heating the wafer W to a range of 100 to 350 degrees C. under an oxygen atmosphere (for example, an atmosphere of an oxygen-containing gas containing an ozone (O 3 ) gas or an O 2 gas). A low pressure mercury lamp (wavelength: 185 to 254 nm) or a Xe excimer lamp (wavelength: 172 nm) may be used for the irradiation of the ultraviolet ray. A short-wavelength ultraviolet ray (wavelength: 240 nm or less) is preferably used.

In addition, the surface of the interlayer insulating layer 104 may be irradiated with a gas cluster ion beam (GCIB). Examples of a gas may include O 2 , N 2 , H 2 , CH 4 , Ar, He and the like. In addition, the surface of the interlayer insulating layer 104 may be irradiated with visible light having a wavelength of 425 nm. The visible light having the wavelength of 425 nm (violet) corresponds to bonding energy of silicon (Si) and methyl group (Si—CH 3 ) and can efficiently cleave the methyl group.

In addition, the surface of the interlayer insulating layer 104 may be modified by chemical treatment in which the surface is exposed to a process solution containing an oxidizing agent such as hydrogen peroxide (H 2 O 2 ). Due to a strong oxidizing power of hydrogen peroxide, most of the carbon (C) esacapes from the surface of the interlayer insulating layer 104 . The surface composition of the interlayer insulating layer 104 approaches from SiOC to SiO 2 , i.e., becomes closer to hydrophilization.

(Processing Chamber 240 C)

The processing chamber 240 C is used to form a Mn oxide layer on the surface of the interlayer insulating layer 104 . Examples of the processing chamber 240 C may include an ALD (Atomic Layer Deposition) chamber and a CVD (Chemical Vapor Deposition) chamber. FIG. 3 is a sectional view of the processing chamber 240 C.

As shown in FIG. 3 , the processing chamber 240 C includes a vacuum-exhaustible processing container 241 , a susceptor 242 and a shower head 243 installed in the processing container 241 . A loading/unloading port 241 a for the wafer W is formed in a side wall of the processing container 241 and is connected to the transfer chamber 230 via the gate valve G 5 .

The susceptor 242 is erected from the bottom of the processing container 241 and has a resistive heater 242 a embedded therein for heating the wafer W mounted on the susceptor 242 to a predetermined temperature. The processing chamber 240 C is equipped with a Mn precursor supply system (not shown) and a reactive gas supply system (not shown) which communicates with the shower head described later. The shower head 243 is attached to the ceiling of the processing container 241 and introduces Mn precursors, a carrier gas (for example, a H 2 gas or a N 2 gas) and a reactive gas such as H 2 O or the like.

A gas diffusion space S is formed in the shower head 243 and the Mn precursors and the carrier gas introduced into the gas diffusion space S are ejected through a plurality of ejection holes 243 h formed in the shower head 243 into the processing container 241 . A reactive gas such as H 2 O is introduced into the gas diffusion space S at a timing different from the Mn precursors and is ejected through the plurality of ejection holes 243 h formed in the shower head 243 into the processing container 241 .

An example of the Mn precursors may include a variety of organic metal materials containing manganese (Mn). (EtCp) 2 Mn[=Mn(C 2 H 5 C 5 H 4 ) 2 ] is preferably used as the Mn precursors since it is liquid at room temperature and has enough vapor pressure for a bubbling supply and high thermal stability.

An example of organic metal materials containing manganese (Mn) which can be used in this embodiment is as follows.

Cp 2 Mn[=Mn(C 5 H 5 ) 2 ], (MeCp) 2 Mn[=Mn(CH 3 C 5 H 4 ) 2 ], (Me 5 Cp) 2 Mn[=Mn((CH 3 ) 5 C 5 H 4 ) 2 ], (EtCp) 2 Mn[=Mn(C 2 H 5 C 5 H 4 ) 2 ], (i-PrCp) 2 Mn[=Mn(C 3 H 7 C 5 H 4 ) 2 ], (t-BuCp) 2 Mn[=Mn(C 4 H 9 C 5 H 4 ) 2 ], MeCpMn(CO) 3 [=(CH 3 C 5 H 4 )Mn(CO) 3 ], CpMn(CO) 3 [=(C 5 H 5 )Mn(CO) 3 ], MeMn(CO) 5 [=(CH 3 )Mn(CO) 5 ], Mn 2 (CO) 10 , 3-(t-BuAllyl)Mn(CO) 4 , Mn(DPM) 2 [=Mn(C 11 H 19 O 2 ) 2 ], Mn(DPM) 3 [=Mn(C 11 H 19 O 2 ) 3 ], Mn(DMPD)(EtCp)[=Mn(C 71 H 11 C 2 H 5 C 5 H 4 )], Mn(acac) 2 [=Mn(C 5 H 7 O 2 ) 2 ], Mn(acac) 3 [=Mn(C 5 H 7 O 2 ) 3 ], Mn(hfac) 2 [=Mn(C 5 HF 6 O 2 ) 2 ], Mn(hfac) 3 [=Mn(C 5 HF 6 O 2 ) 3 ], Mn(iPr-AMD) 2 [=Mn(C 3 H 7 NC(CH 3 )NC 3 H 7 ) 2 ], and Mn(tBu-AMD) 2 [=Mn(C 4 H 9 NC(CH 3 )NC 4 H 9 ) 2 ]

In addition, amideaminoalkane manganese compounds such as his (N,N′-1-alkylamide-2-dialkylaminoalkane) manganese expressed by the chemical formula Mn(R 1 N—Z—NR 2 2 ) 2 disclosed in WO2012/060428 may be appropriately used. Where, R 1 and R 2 are alkyl groups represented by —C n H 2n+1 (n is an integer of 0 or higher) and Z is an alkylene group represented by —C n H 2n — (n is an integer of 0 or more).

On the other hand, an example of the reactive gas may include an oxygen-containing gas such as, for example, H 2 O, N 2 O, NO 2 , NO, O 2 , O 3 , H 2 O 2 , CO, CO 2 , alcohols, aldehydes, carboxylic acids, carboxylic anhydrides, esters, organic acid ammonium salts, organic acid amine salts, organic acid amides, organic acid hydrazides, or a combination thereof. It is here noted that a liquid at room temperature is supplied into the processing chamber 240 C after it is changed into a gas or vapor.

The Mn precursors introduced into the shower head 243 are ejected through the ejection holes 243 h into the processing container 241 and arrive at the surface of the wafer W. Some of the Mn precursors are adsorbed on the surface of the wafer W. When a precursor adsorption layer is formed after introducing the Mn precursors for a certain period of time, the processing container 241 is evacuated for a certain period of time. At this time, in order to increase the purging effect to a residual gas, an inert gas such as nitrogen (N 2 ) or the like may be introduced into the shower head 243 and the processing container 241 . Next, a reactive gas such as H 2 O or the like is introduced thereinto. A reactive gas such as H 2 O or the like introduced into the shower head 243 is ejected through the ejection holes 243 h into the processing container 241 and arrives at the surface of the wafer W. The reactive gas reacts with the Mn precursors (the precursor adsorption layer) already adsorbed on the surface of the wafer W, thereby forming a Mn oxide layer on the surface of the interlayer insulating layer 104 of the semiconductor device 100 formed on the wafer W.

Similarly, after introducing the reactive gas for a certain period of time, the processing container 241 is evacuated for a certain period of time. At this time, in order to increase the purging effect to a residual gas, an inert gas such as nitrogen (N 2 ) or the like may be introduced into the shower head 243 and the processing container 241 . Thereafter, Mn precursors are introduced thereinto. In this way, for an ALD apparatus, the Mn oxide layer is formed while alternately supplying the reactive gas, such as water (H 2 O) or the like, and the Mn precursors. Here, the composition of Mn oxide, which is formed by an ALD method while bubbling (EtCp) 2 Mn with a N 2 gas and alternately supplying it and H 2 O, is Mn 2 O 3

In addition, if the processing chamber 240 C is a CVD apparatus, in order to promote formation of a Mn oxide layer, it is preferable that an oxygen (O)-containing gas be introduced into the processing chamber 240 C. Like the ALD method, an example of the oxygen-containing gas may include H 2 O, N 2 O, NO 2 , NO, O 2 , O 3 , H 2 O 2 , CO, CO 2 , alcohols, aldehydes, carboxylic acids, carboxylic anhydrides, esters, organic acid ammonium salts, organic acid amine salts, organic acid amides, organic acid hydrazides, or a combination thereof. It is also noted that a liquid at room temperature is supplied into the processing chamber 240 C after it is changed into a gas or vapor.

In addition, when the Mn oxide is formed by CVD, since the Mn precursors and the reactive gas (for example, an oxygen-containing gas) are simultaneously introduced into the processing chamber, a flow rate of the introduced reactive gas is preferably set to be extremely low, for example, to 1 sccm or less for the control of film thickness. In addition, for the control of the flow rate, the reactive gas to be introduced into the processing chamber may be diluted with an inert gas to about 1/100 in concentration.

In addition, for the prevention of particles and the prevention of blocking of ejection holes of the shower head, it is desirable that the mixing of the Mn precursors and the reactive gas is carried out after the gases are introduced into the processing chambers, i.e., in a post-mix method. FIG. 3 shows an example of a so-called pre-mix method in which Mn precursors and a reaction gas are mixed in the shower head before these gases are introduced in the processing chambers.

(Processing Chamber 240 D)

The processing chamber 240 D is an annealing chamber. In the processing chamber 240 D, the Mn oxide layer formed on the interlayer insulating layer 104 in the processing chamber 240 C is annealed under a reducing atmosphere to form a Mn silicate layer, thereby causing the Mn oxide layer to react with the silicon oxide (SiOx) of the interlayer insulating layer 104 . Here, it is sufficient if the reducing atmosphere contains reducing gas ingredients such as hydrogen (H), carbon monoxide (CO), ammonia (NH 3 ), hydrazine (N 2 H 4 ) or the like without needing 100% of reducing gas concentration. In addition, in the case of hydrogen, a cylinder of an Ar gas containing 3% of H 2 may be used in consideration of the lower limit of hydrogen explosion. In addition, as process conditions of the processing chamber 240 D, for example, the process temperature (the temperature of the wafer W) is 150 degrees C. to 600 degrees C. and the process pressure is 1 to 2670 Pa.

The process temperature (the temperature of the wafer W) is preferably 300 degrees C. or higher from the standpoint of reaction speed (if less than 300 degrees C., it takes too much time to cause a reaction) and is preferably 450 degrees C. or lower from the standpoint of practical use (in order to avoid the possibility of causing damage and having deteriorated performance by exposure of the semiconductor device to the high temperature). In addition, if the semiconductor device is processed in a batch furnace or the like, a process pressure of about 1 atm is also possible.

Next, a mechanism in which the Mn oxide layer turns to silicate through a reaction with the SiO 2 ingredient contained in an underlying layer to form the Mn silicate layer by annealing the Mn oxide layer under the reducing atmosphere will be described with reference to chemical reaction formulas.

Chemical reaction formulas of manganese oxide (MnO and Mn 2 O 3 in this example) and silicon dioxide (SiO 2 ) will be described below. Each chemical reaction formula shows the equilibrium state at 300K. In each chemical reaction formula, the amount of heat in the right side is the amount of heat per 1 mol of manganese (Mn), wherein the change amount in Gibb's free energy (hereinafter referred to as Gr change (ΔGr)) is expressed in 2 significant digits. Here, the Gibb's free energy tends to decrease spontaneously. Therefore, it is known that a chemical reaction having a minus Gr variation occurs spontaneously and a chemical reaction having a plus Gr variation does not occur spontaneously. An available thermodynamics database is used for the following thermodynamics calculation.

MnO+SiO 2 →MnSiO 3 -21(ΔGr(kJ/Mn-mol))  (1)

2Mn 2 O 3 +4SiO 2 →4MnSiO 3 +O 2 +57(ΔGr(kJ/Mn-mol))  (2)

2Mn 2 O 3 +2SiO 2 →2Mn 2 SiO 4 +O 2 +53(ΔGr(kJ/Mn-mol))  (3)

From the chemical reaction formula (1), it can be seen that, for MnO, a reaction can progress from the left side to the right side, i.e., there is a possibility that MnO is turned to silicate. On the other hand, from the chemical reaction formulas (2) and (3), it can be seen that a reaction cannot progress spontaneously from the left side to the right side, i.e., there is no possibility of turning into silicate. Thus, it can be seen that Mn 2 O 3 remains since it cannot be turned into silicate only by annealing.

Next, when hydrogen (H) is introduced, a chemical reaction formula of Mn 2 O 3 and SiO 2 is shown below.

Mn 2 O 3 +2SiO 2 +H 2 →2MnSiO 3 +H 2 O-58(ΔGr(kJ/Mn-mol))  (4)

Mn 2 O 3 +SiO 2 +H 2 →Mn 2 SiO 4 +H 2 O-62(ΔGr(kJ/Mn-mol))  (5)

From the chemical reaction formulas (4) and (5), it can be seen that, when hydrogen (H) is introduced, for Mn 2 O 3 , a reaction can progress from the left side to the right side, i.e., there is a possibility that Mn 2 O 3 is turned into silicate. Thus, it can be seen that Mn 2 O 3 can be turned into silicate by the introduction of hydrogen to form MnSixOy.

Next, when carbon monoxide (CO) is introduced, a chemical reaction formula of Mn 2 O 3 and SiO 2 is shown below.

Mn 2 O 3 +2SiO 2 +CO→2MnSiO 3 +CO 2 -72(ΔGr(kJ/Mn-mol))  (6)

Mn 2 O 3 +SiO 2 +CO→Mn 2 SiO 4 +CO 2 -76(ΔGr(kJ/Mn-mol))  (7)

From the chemical reaction formulas (6) and (7), it can be seen that, when carbon monoxide (CO) is introduced, for Mn 2 O 3 , a reaction can progress from the left side to the right side, i.e., there is a possibility that Mn 2 O 3 is turned into silicate. Thus, it can be seen that Mn 2 O 3 can become silicate by the introduction of carbon monoxide to form MnSixOy.

Next, when ammonia (NH 3 ) is introduced, a chemical reaction formula of Mn 2 O 3 and SiO 2 is shown below.

Mn 2 O 3 +2SiO 2 +0.5NH 3 →2MnSiO 3 +0.25N 2 O+0.75H 2 O-12(ΔGr(kJ/Mn-mol))  (8)

Mn 2 O 3 +SiO 2 +0.5NH 3 →Mn 2 SiO 4 +0.25N 2 O+0.75H 2 O-16(ΔGr(kJ/Mn-mol))  (9)

From the chemical reaction formulas (8) and (9), it can be seen that, when ammonia (NH 3 ) is introduced, for Mn 2 O 3 , a reaction can progress from the left side to the right side, i.e., there is a possibility of turning into silicate. Thus, it can be seen that Mn 2 O 3 can become silicate by the introduction of ammonia to form MnSixOy.

Next, when hydrazine (N 2 H 4 ) is introduced, a chemical reaction formula of Mn 2 O 3 and SiO 2 is shown below.

Mn 2 O 3 +2SiO 2 +0.33N 2 H 4 →2MnSiO 3 +0.33N 2 O+0.67H 2 O-29(ΔGr(kJ/Mn-mol))  (10)

Mn 2 O 3 +SiO 2 +0.33N 2 H 4 →Mn 2 SiO 4 +0.33N 2 O+0.67H 2 O-33(ΔGr(kJ/Mn-mol))  (11)

From the chemical reaction formulas (10) and (11), it can be seen that, when hydrazine (N 2 H 4 ) is introduced, for Mn 2 O 3 , a reaction can progress from the left side to the right side, i.e., there is a possibility of turning into silicate. Thus, it can be seen that Mn 2 O 3 can become silicate by the introduction of hydrazine to form MnSixOy.

Next, a chemical reaction formula of Mn 2 O 3 is shown below.

2Mn 2 O 3 →4MnO+O 2 +78(ΔGr(kJ/Mn-mol))  (12)

Mn 2 O 3 +H 2 →2MnO+H 2 O-37(ΔGr(kJ/Mn-mol))  (13)

Mn 2 O 3 +CO→2MnO+CO 2 -51(ΔGr(kJ/Mn-mol))  (14)

Mn 2 O 3 +0.5NH 3 →2MnO+0.25N 2 O+0.75H 2 O+9.0(ΔGr(kJ/Mn-mol))  (15)

Where, ΔGr is minus for 500K or higher.

From the chemical reaction formula (12), it can be seen that Mn 2 O 3 cannot become MnO when it is simply annealed without introducing a reducing gas such as hydrogen, carbon monoxide or the like. In addition, as shown in the chemical reaction formulas (2) and (3), since Mn 2 O 3 cannot become silicate only by annealing with no reducing gas, if a reducing gas such as hydrogen, carbon monoxide or the like is not introduced, it can be seen that Mn 2 O 3 cannot become silicate to form Mn silicate (MnSixOy).

On the other hand, from the chemical reaction formulas (13) to (15), it can be seen that Mn 2 O 3 can become MnO when hydrogen, carbon monoxide or ammonia is introduced. In addition, as shown in the chemical reaction formula (1), since MnO can become silicate to form Mn silicate (MnSixOy), it can be seen that Mn 2 O 3 can become silicate to form Mn silicate (MnSixOy) when a reducing gas such as hydrogen, carbon monoxide, ammonia or the like is introduced.

For reference, when oxygen (O) is introduced, a chemical reaction of Mn 2 O 3 and SiO 2 is considered.

2Mn 2 O 3 +4SiO 2 +O 2 →4MnSiO 3 +2O 2   (16)

2Mn 2 O 3 +2SiO 2 +O 2 →2Mn 2 SiO 4 +2O 2   (17)

The chemical reaction formula (16) becomes equal to the chemical reaction formula (2) when oxygen (O) on the left side is cancelled with oxygen (O) on the right side and the chemical reaction formula (17) becomes equal to the chemical reaction formula (3) when oxygen (O) on the left side is cancelled with oxygen (O) on the right side. Thus, it can be seen that a reaction cannot progress from the left side to the right side, i.e., Mn 2 O 3 cannot become silicate, even when oxygen (O) is introduced. In this way, as disclosed in many prior arts, it can be understood that introduction of oxygen (O) cannot make Mn 2 O 3 silicate but only annealing with introduction of hydrogen (H) makes it possible to make silicate. In addition, although this discussion is made by way of an example of MnO and Mn 2 O 3 , this discussion can be equally applied to Mn 3 O 4 and MnO 2 which require introduction of a reducing gas such as hydrogen, carbon monoxide or the like for the purpose of making them (Mn 3 O 4 and MnO 2 ) silicate.

The reducing gas used is not limited to the above-mentioned ones but may be a substance similar to ammonia or hydrazine. For example, an ammonia-similar substance may be amine expressed by the chemical formula NR 1 R 2 R 3 . Where, R 1 , R 2 and R 3 are hydrocarbon groups such as, for example, methylamine (CH 3 NH 2 ), ethylamine (C 2 H 5 NH 2 ), dimethylamine ((CH 3 ) 2 NH), trimethylamine ((CH 3 ) 3 N) and the like.

A hydrazine-similar substance may be hydrazine derivatives expressed by the chemical formula R 1 R 2 NNR 3 R 4 . Where, R 1 , R 2 , R 3 and R 4 are hydrocarbon groups such as, for example, methylhydrazine (CH 3 NNH 3 ), dimethylhydrazine ((CH 3 ) 2 NNH 2 ), trimethylhydrazine ((CH 3 ) 3 NNH) and the like.

(Processing Chamber 240 E)

The processing chamber 240 E is a deposition chamber such as a PVD (Physical Vapor Deposition) chamber, a CVD chamber or the like. In the processing chamber 240 E, a Cu film as a seed layer is formed on the Mn silicate layer 105 formed in the processing chamber 240 D.

The controller 250 is, for example, a computer and controls the loader module 210 , the load lock chambers 220 A and 220 B, the transfer chamber 230 , the processing chambers 240 A to 240 E and the gate valves GA, GB and G 1 to G 7 of the semiconductor manufacturing apparatus 200 .

(Manufacture of Semiconductor Device 100 )

FIGS. 4A to 4E are views illustrating manufacturing processes of the semiconductor device 100 . FIGS. 5A to 5C are flow charts illustrating a process flow of the semiconductor manufacturing apparatus 200 . Here, a method for manufacturing the semiconductor device 100 described with reference to FIG. 1 using the semiconductor manufacturing apparatus 200 described with reference to FIG. 2 will be described. A method of manufacturing the semiconductor device 100 using the semiconductor manufacturing apparatus 200 will now be described with reference to FIGS. 1 to 5C . Here, a process until a seed layer (Cu film) is formed on the Mn silicate layer 105 of the semiconductor device 100 will be described.

In the following description, it is assumed that the semiconductor device 100 has been formed on the wafer W before being transferred to the semiconductor manufacturing apparatus 200 up to the state shown in FIG. 4A . In other words, the process described below involves forming the Mn silicate layer 105 on the surface of the interlayer insulating layer 104 including the via hole 104 h and the trench (wiring groove) 104 t.

The container C is transferred to the semiconductor manufacturing apparatus 200 and is mounted on one of the door openers 211 A to 211 C and a cover of the container C is opened by the door opener 211 A to 211 C. The wafer W on which the semiconductor device 100 has been formed up to the state of FIG. 4A is accommodated in the container C. Next, the wafer W is taken out of the container C by the transfer robot 212 and is transferred to the alignment chamber 213 . Alignment of the wafer W is performed in the alignment chamber 213 .

The transfer robot 212 takes the aligned wafer W out of the alignment chamber 213 and transfers it to the load lock chamber 220 A (or 220 B). When the wafer W is transferred to the load lock chamber 220 A (or 220 B), the load lock chamber 220 A (or 220 B) is put under the air atmosphere.

After the wafer W is loaded, the gate valve GA (or GB) of the load lock chamber 220 A (or 220 B) is closed. Thereafter, the load lock chamber 220 A (or 220 B) is exhausted to create a vacuum atmosphere.

After the load lock chamber 220 A (or 220 B) is exhausted to create a vacuum atmosphere, the gate valve G 1 (or GB) is opened. The wafer W is loaded by the transfer robot 231 into the transfer chamber 230 put under a non-oxidizing atmosphere, such as, for example, a vacuum state, an extremely low-oxygen partial pressure state or a H 2 gas or CO gas reducing atmosphere. After the wafer W is loaded into the transfer chamber 230 , the gate valve G 1 (or G 2 ) is closed.

(Degassing Process: see FIG. 4A )

Next, the gate valve G 3 is opened and the transfer robot 231 transfers the wafer W into the processing chamber 240 A. After the gate valve G 3 is closed, the wafer W is degased in the processing chamber 240 A (Step S 101 in FIG. 5A ). Specifically, in the processing chamber 240 A, the wafer W is heated by means of a heater or a lamp in order to remove water and organic matter adsorbed on the wafer W.

A temperature for the degassing process is preferably set to a temperature higher than the process temperature of the processing chamber 240 C in order to prevent poor reproducibility of the film-forming process of Mn oxide in the processing chamber 240 C. In addition, the processing chamber 240 A may be turned to an inert gas atmosphere (non-oxidizing atmosphere) by allowing the flow of an inert gas such as a nitrogen gas (N 2 gas), an argon gas (Ar gas), a helium gas (He gas) or the like into the processing chamber 240 A.

(Surface Modifying Process: see FIG. 4B )

Next, the gate valve G 3 is opened and the transfer robot 231 loads the wafer W into the transfer chamber 230 . After the gate valve G 3 is closed, the gate valve G 4 is opened and the transfer robot 231 transfers the wafer W into the processing chamber 240 B. In the processing chamber 240 B, the interlayer insulating layer 104 is subjected to a surface modifying treatment (extraction (removal) of carbon (C), increasing compactness (densification), reduction of pore diameter, surface hydrophilization and so on) (Step S 102 in FIG. 5A ). Specifically, in the processing chamber 240 B, a modified layer 51 is formed on the surface of the interlayer insulating layer 104 by generating plasma and exposing the interlayer insulating layer 104 to the plasma.

Different kinds of gases such as, for example, gases containing hydrogen (H), carbon (C), nitrogen (N) or oxygen (O) (one of a H 2 gas, CO gas, CO 2 gas, CH 4 gas, N 2 gas, NH 3 gas, H 2 O gas, O 2 gas, O 3 gas, NO gas, N 2 O gas and NO 2 gas, or a combination thereof) may be used to generate the plasma. In addition, a noble gas such as He, Ar or the like may be added to facilitate ignition of the plasma.

In addition, an organic material such as trimethylsilane or the like is, in general, used to form a Low-k layer (SiOC) constituting the interlayer insulating layer 104 . For this reason, an alkyl group, including a methyl group (—CH 3 ), is contained in the interlayer insulating layer 104 and accordingly, a certain amount of carbon (C) is contained in the interlayer insulating layer 104 . When the surface of the interlayer insulating layer 104 is exposed to plasma or ions for modifying treatment, most of the carbon (C) escapes from the surface of the interlayer insulating layer 104 . Accordingly, the surface composition of the interlayer insulating layer 104 approaches from SiOC to SiO 2 .

As a result, a modified layer S 1 , such as compact (densified) SiO 2 , from which C escapes, is formed on the interlayer insulating layer 104 . In addition, if the interlayer insulating layer 104 is a porous Low-k film, the modified layer S 1 formed on the surface of the interlayer insulating layer 104 by the modifying treatment has a state other than the porous state since pores are reduced in diameter and/or blocked, thereby allowing the modified layer S 1 to act as a pore seal of the interlayer insulating layer 104 . As a result, when a Mn oxide layer is formed, it is possible to prevent a Mn precursor as a precursor of the Mn oxide layer from permeating into the interlayer insulating layer 104 , thereby preventing increase of a relative dielectric constant of the interlayer insulating layer 104 .

In addition, when the above-described modifying treatment is performed, a methyl group existing on the surface of the interlayer insulating layer 104 is cleaved, resulting in a —OH group or a bond of Si—O—Si, i.e., the surface of the interlayer insulating layer 104 is modified from hydrophobicity to hydrophilicity. When the hydrophilic modified layer S 1 is formed on the surface of the interlayer insulating layer 104 , a Mn oxide layer can be efficiently formed (deposited) on the interlayer insulating layer 104 in the next processing chamber 240 C.

(Mn Oxide Forming Process: see FIG. 4C )

Next, the gate valve G 4 is opened and the transfer robot 231 loads the wafer W into the transfer chamber 230 . After the gate valve G 4 is closed, the gate valve G 5 is opened and the transfer robot 231 transfers the wafer W into the processing chamber 240 C. In the processing chamber 240 C, a process of forming a Mn oxide layer S 2 is performed (Step S 103 in FIG. 5A ).

Specifically, Mn precursors (for example, (EtCp) 2 Mn[=Mn(C 2 H 5 C 5 R) 2 ]), a carrier gas (for example, a H 2 gas or a N 2 gas) and a reactive gas such as H 2 O or the like are introduced into the processing chamber 240 C to form the Mn oxide layer S 2 on the surface of the modified layer S 1 of the interlayer insulating layer 104 .

When the Mn oxide layer S 2 is formed by an ALD method, the Mn precursors are introduced through the shower head 243 and some of the Mn precursors are adsorbed on the surface of the interlayer insulating layer (the modified layer S 1 ). After introducing the Mn precursors for a certain time, the processing container 241 is evacuated for a certain time. Next, a reactive gas such as H 2 O or the like is introduced through the shower head 243 to react with the Mn precursors already adsorbed on the surface, thereby forming the Mn oxide layer S 2 on the surface of the interlayer insulating layer 104 (the modified layer S 1 ). Similarly, the Mn oxide layer S 2 is formed by alternately supplying the reactive gas such as water (H2O) and the Mn precursors.

In addition, if the Mn oxide layer S 2 is formed by a CVD apparatus, in order to promote formation of the Mn oxide layer S 2 , an oxygen (O)-containing gas may be introduced into the processing chamber 240 C. Like the ALD method, an example of the oxygen-containing gas may include H 2 O, N 2 O, NO 2 , NO, O 2 , O 3 , H 2 O 2 , CO, CO 2 , alcohols, aldehydes, carboxylic acids, carboxylic anhydrides, esters, organic acid ammonium salts, organic acid amine salts, organic acid amides, organic acid hydrazides, or a combination thereof.

In addition, when the Mn oxide is formed by CVD, since the Mn precursors and the reactive gas (for example, an oxygen-containing gas) are simultaneously introduced into the processing chamber 240 C, a flow rate of the introduced reactive gas may be set to be extremely low, for example, to 1 sccm or less from the standpoint of film thickness control. In addition, from the standpoint of flow rate control, the reactive gas to be introduced into the processing chamber may be diluted with an inert gas to about 1/100 in concentration. In addition, from the standpoint of prevention of particles and prevention of blocking of ejection holes of the shower head, it is desirable that the mixing of the Mn precursors and the reactive gas is carried out by a so-called post-mix method which is performed after the gases are introduced into the processing chambers.

(Process for Changing into Silicate: See FIG. 4D )

Next, the gate valve G 5 is opened and the transfer robot 231 loads the wafer W into the transfer chamber 230 . After the gate valve G 5 is closed, the gate valve G 6 is opened and the transfer robot 231 transfers the wafer W into the processing chamber 240 D. In the processing chamber 240 D, a process for changing into silicate is performed (Step S 104 in FIG. 5A ). Specifically, in the processing chamber 240 D, the Mn oxide layer S 2 formed on the interlayer insulating layer 104 (the modified layer S 1 ) is annealed under a reducing atmosphere to form the Mn silicate layer 105 by causing the annealed Mn oxide layer S 2 to react with the silicon oxide (SiOx) of the interlayer insulating layer 104 (particularly the modified layer S 1 formed on the surface).

Here, it is sufficient if the reducing atmosphere contains reducing gas ingredients such as hydrogen (H), carbon monoxide (CO), ammonia (NH 3 ), hydrazine (N 2 H 4 ) or the like without needing 100% of reducing gas concentration. In addition, in the case of hydrogen, a cylinder of an Ar gas containing 3% of H 2 may be used in consideration of the lower limit of hydrogen explosion. In addition, as process conditions of the processing chamber 240 D, for example, the process temperature (the temperature of the wafer W) is 150 degrees C. to 600 degrees C. and the process pressure is 1 to 2670 Pa.

The process temperature (the temperature of the wafer W) is preferably 300 degrees C. or higher from the standpoint of reaction speed (if less than 300 degrees C., it takes too much time to cause a reaction) and is preferably 450 degrees C. or lower from the standpoint of practical use (in order to avoid a possibility of damage and deteriorated performance caused by exposure of the semiconductor device to a high temperature). In addition, if the semiconductor device is processed in a batch furnace or the like, the annealing process may be performed under a process pressure of about 1 atm.

(Seed Layer Forming Process: see FIG. 4E )

Next, the gate valve G 6 is opened and the transfer robot 231 loads the wafer W into the transfer chamber 230 . After the gate valve G 6 is closed, the gate valve G 7 is opened and the transfer robot 231 transfers the wafer W into the processing chamber 240 E. In the processing chamber 240 E, a Cu film 106 as a seed layer is formed on the Mn silicate layer 105 (Step S 105 in FIG. 5A ).

Next, the gate valve G 7 is opened and the transfer robot 231 loads the wafer W into the transfer chamber 230 . After the gate valve G 7 is closed, the gate valve G 1 (or G 2 ) is opened and the transfer robot 231 transfers the wafer W into the load lock chamber 220 A (or 220 B).

After the gate valve G 1 (or G 2 ) is closed, the load lock chamber 220 A (or 220 B) is ventilated with CDA (Clean Dry Air) or N 2 . Accordingly, the load lock chamber 220 A (or 220 B) is changed from the vacuum atmosphere to the air atmosphere. Next, the gate valve GA (or GB) is opened and the transfer robot 212 accommodates the wafer W into the container C.

When processing for all (or designated) wafers W in the container C is completed, the container C is transferred to a plating apparatus (not shown) by means of a transfer means (not shown) such as RGV (Rail Guided Vehicle), OHV (Overhead Hoist Vehicle), AGV (Automatic Guided Vehicle) or the like. In the plating apparatus, with Cu deposited on the Mn silicate layer 105 as a seed layer, Cu plating is performed to form a Cu layer on the Mn silicate layer 105 . Thereafter, in a CMP apparatus, the Mn silicate layer 105 and the Cu layer formed on the interlayer insulating layer 104 is removed by polishing and a Cu via and a Cu wiring embedded in the via hole 104 h and the trench 104 t are formed. In addition, the wafer W polished by a CMP method is cleaned to remove residue such as slurry and the like.

As described above, in the processing chamber 240 D of the semiconductor manufacturing apparatus 200 according to this embodiment, since the annealing process is performed under the reducing atmosphere, the Mn oxide layer S 2 can be efficiently turned into silicate to form the Mn silicate layer 105 . In addition, since the Mn silicate layer 105 is more amorphous and smaller in crystal grain boundary than the Mn oxide layer S 2 , the barrier property can be improved. In addition, when the Mn oxide layer S 2 becomes silicate by reaction with the silicon oxide (SiOx) of the interlayer insulating layer 104 (particularly, the modified layer S 1 ), a volume (film thickness) thereof is reduced. Accordingly, since a sectional area of a Cu wiring or a via conductor formed on the surface of the Mn silicate layer 105 increases as much, the Cu wiring or the via conductor can have low resistance. Since the Mn oxide layer S 2 may take a plurality of states, e.g., MnO, Mn 3 O 4 , Mn 2 O 3 , MnO 2 or the like, this layer is unstable because of its change in density and volume. However, in this embodiment, since the Mn oxide layer S 2 is turned to silicate to form a more stable Mn silicate layer 105 , aging degradation of the semiconductor device 100 can be reduced.

In addition, after the hydrophilic modified layer S 1 is formed on the surface of the interlayer insulating layer 104 in the processing chamber 240 B, the Mn oxide layer S 2 is formed in the processing chamber 240 C. Therefore, the Mn oxide layer S 2 can be efficiently formed on the surface of the interlayer insulating layer 104 (the modified layer S 1 ) including the via hole 104 h and the trench 104 t . In addition, since the modified layer S 1 is formed on the surface of the interlayer insulating layer 104 , it is possible to prevent a Mn precursor as a precursor of the Mn oxide layer S 2 from permeating into the interlayer insulating layer 104 , thereby preventing an increase in the relative dielectric constant of the interlayer insulating layer 104 .

In addition, in the case of CVD, an amount of deposition of the Mn oxide layer S 2 can be increased since a —OH group or a Si—O—Si bond is formed by attaching water vapor or oxygen to the surface of the interlayer insulating layer 104 by introducing an oxygen-containing gas such as water (vapor) or the like into the processing chamber 240 C and exposing the wafer W to an oxygen-containing gas atmosphere before forming the Mn oxide layer S 2 . In addition, this attachment process may be performed in the processing chamber 240 B rather than the processing chamber 240 C or may be performed by exposing the wafer W to an atmosphere having a certain humidity.

In addition, since the process temperature of the degassing process in the processing chamber 240 A is set to be higher than the process temperature in the processing chamber 240 C, it is possible to stabilize the thickness of the Mn oxide layer S 2 formed in the processing chamber 240 C.

In addition, although this embodiment has been described with Mn as metal, the present disclosure is not limited thereto. For example, metal elements used to form silicate may include one or more selected from a group consisting of Mg, Al, Ca, Ti, V, Fe, Co, Ni, Sr, Y, Zr, Ba, Hf and Ta.

In addition, although a workpiece has been here illustrated with a semiconductor wafer, this semiconductor wafer may include a silicon substrate and a compound semiconductor substrate such as GaAs, SiC, GaN and the like and further the present disclosure can be also applied to a glass substrate, a ceramic substrate and the like used for a liquid crystal display apparatus. In addition, a semiconductor device having a structure formed by the above-described film forming method of the present disclosure and an electronic apparatus including the semiconductor device falls within the scope of the disclosure.

In addition, the seed layer forming process performed in the processing chamber 240 E is used to form a Cu wiring or the like on the Mn silicate layer 105 and is not a process essential to the present disclosure. That is, the processing chamber 240 E included in the semiconductor manufacturing apparatus 200 is not essential and the semiconductor manufacturing apparatus 200 may have a configuration without the processing chamber 240 E. In this case, a process up to the formation of the Mn silicate layer 105 is performed in the semiconductor manufacturing apparatus 200 and thereafter, the Cu film 106 as a seed layer is formed on the Mn silicate layer 105 .

However, when the processing chamber 240 E is included in the semiconductor manufacturing apparatus 200 , the Cu film 106 as the seed layer can be formed on the Mn silicate layer 105 without exposing the Mn silicate layer 105 to the air. This can result in improved adhesion between the Mn silicate layer 105 and the Cu film 106 as the seed layer. In addition, the processing chamber 240 D and the processing chamber 240 E are both a vacuum apparatus and may be formed as a cluster tool docked to the same transfer chamber, rather than stand-alone, which can result in reduction of device occupying area (footprint) and costs.

In addition, in the above-described flow, as shown in Steps S 104 and S 105 of FIG. 5A , the Cu film 106 as the seed layer is formed on the Mn silicate layer 105 after the Mn oxide layer S 2 is turned to silicate to form the Mn silicate layer 105 . However, even when the Cu layer 106 is formed on the Mn oxide layer, since atoms of a reducing gas (particularly, hydrogen atoms) are small, it is considered that the atoms pass/diffuse through the Cu layer 106 (mainly a crystal grain boundary thereof) and arrive at the Mn oxide layer S 2 , thereby making the Mn oxide layer S 2 silicate.

Therefore, as shown in FIG. 5B , with the reversed order of Steps S 104 and S 105 of FIG. 5A , the Mn oxide layer S 2 may be turned to silicate to form the Mn silicate layer 105 after the Cu film 106 as the seed layer is formed on the Mn silicate layer 105 .

In addition, as shown in FIG. 5C , after the order of Steps S 104 and S 105 is reversed, Step S 106 of performing the Cu plating may be inserted between Steps S 105 and S 104 . In this case, after the Cu film 106 as the seed layer is formed on the Mn oxide layer S 2 , the Cu plating may be performed on the Cu film 106 and then the Mn oxide layer S 2 may be turned to silicate to form the Mn silicate layer 105 .

In addition, in FIGS. 5A to 5C , the order of Steps S 101 and S 102 may be reversed. That is, after the surface modifying treatment of Step S 102 , the degassing process of Step S 101 may be performed and then the Mn oxide layer forming process of Step S 103 may be performed. If the insulating layer is exposed to the air after Step S 101 , the effect of the degassing process is lost as water in the air is adsorbed on the surface of the insulating layer. Therefore, there is a need to perform continuous processing in the same system without exposure to the air between Step S 101 and Step S 103 .

On the other hand, between Steps S 102 and S 103 or between Steps S 102 and S 101 , it is not always necessary to perform continuous processing in the same system. An exposure of the surface of the insulating layer to the air on the way of processing has no influence on the effects of the present disclosure. Thus, connection of the transfer chamber 230 and the processing chamber 240 B is not essential to the configuration of the semiconductor manufacturing apparatus 200 but the processing chamber 240 B may be provided as a separate device from the transfer chamber 230 regarding a configuration of the semiconductor manufacturing apparatus 200 . In Examples 1 and Example 4 described later, processing flows of the above-described order are performed in an apparatus configuration where the processing chamber 240 B is separate from the transfer chamber 230 .

The present disclosure will now be described in more detail by way of Examples.