Current regulation circuit, power over Ethernet system, and method

1. Technical Field

The disclosure relates to current regulation circuits, and particularly to a current regulation circuit used in a power over Ethernet (POE) system and method.

2. Description of Related Art

Most POE ports of a POE system supply 25.5 W (watt) power. A network device requiring a large amount of power requires a plurality of POE ports to supply power in parallel to operate. However, the plurality of POE ports may be connected to the network device via cables having different impedances, which causes current signals flowing through the cables to be different. Thus, the plurality of POE ports cannot supply maximum power to drive the network device. Therefore, there is a need for a POE system that can overcome the described limitations.

Many aspects of the present embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, all the views are schematic, and like reference numerals designate corresponding parts throughout the views.

FIG. 1 is a schematic diagram of a first embodiment of a POE system, wherein the POE system comprises a current regulation circuit.

FIG. 2 is a schematic diagram of a second embodiment of a POE system.

FIG. 3 is a schematic diagram of a third embodiment of a POE system.

FIG. 4 is a circuit diagram of a fourth embodiment of a POE system.

FIG. 5 is a schematic diagram of a fifth embodiment of a POE system.

FIG. 6 is a flowchart of a first embodiment of a POE control method.

FIG. 7 is a flowchart of a second embodiment of a POE control method.

FIG. 8 is a flowchart of a third embodiment of a POE control method.

The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references can mean “at least one.”

FIG. 1 is a schematic diagram of a first embodiment of a POE system 1 . In one embodiment, the POE system 1 comprises a plurality of POE ports, such as a POE port 10 a and a POE port 10 b , a current regulation circuit 20 , and a network device 30 . The POE ports 10 a , 10 b comprise a standard type controller 10 aa and a standard type controller 10 bb , respectively. The current regulation circuit 20 comprises a plurality of current regulation units, such as a current regulation unit 20 a and a current regulation unit 20 b . The current regulation units 20 a , 20 b are connected to the POE port 10 a and the POE port 10 b , respectively. Thus, a number of the current regulation units is equivalent to a number of the POE ports. The current regulation circuit 20 makes the POE ports 10 a , 10 b output substantially the same value of current signals in parallel to drive the network device 30 .

In one embodiment, the POE ports 10 a , 10 b are connected to ports of a power over Ethernet (POE) device via cables having different lengths or different impedances. The POE ports 10 a , 10 b and the current regulation circuit 20 can be set in the network device 30 .

FIG. 2 is a schematic diagram of a second embodiment of a POE system 1 a . In one embodiment, the POE system 1 a further comprises an O-ring diode 22 . An input terminal of the O-ring diode 22 is connected to the current regulation units 20 a , 20 b , and an output terminal of the O-ring diode 22 is connected to the network device 30 . The O-ring diode 22 integrates current signals output by the current regulation units 20 a , 20 b , to drive the network device 30 . A value of input current signals of the network device 30 is equal to a sum of values of current signals of the current regulation units 20 a , 20 b.

The current regulation unit 20 a comprises a sampling unit 201 a , a mean conversion unit 202 a , a current integration unit 203 a , a comparison unit 204 a , and a voltage conversion unit 205 a . The sampling unit 201 a is connected to the POE port 10 a and outputs sampling current signals according to output current signals of the POE port 10 a . The mean conversion unit 202 a is connected to the sampling unit 201 a and converts the sampling current signals output by the sampling unit 201 a into mean current signals. The current integration unit 203 a is connected to the mean conversion unit 202 a and the current regulation unit 20 b . The current integration unit 203 a integrates and converts the mean current signals output by the current regulation units 20 a , 20 b into reference current signals. The comparison unit 204 a is connected to the mean conversion unit 202 a and the current integration unit 203 a . The comparison unit 204 a compares the mean current signals output by the mean conversion unit 202 a with the reference current signals output by the current integration unit 203 a , and outputs comparison signals. The voltage conversion unit 205 a is connected to the sampling unit 201 a and the comparison unit 204 a . The voltage conversion unit regulates the output current signals of the POE port 10 a according to the comparison signals output by the comparison unit 204 a.

In one embodiment, in response to the POE port 10 a operating according to the IEEE802.3AT standard, the standard type controller 10 aa outputs first standard type instruction signals. In response to the POE port 10 a operating according to the IEEE802.3AF standard, the standard type controller 10 aa outputs second standard type instruction signals.

In one embodiment, the current regulation unit 20 a further comprises a feedback unit 206 a . The feedback unit 206 a is connected between the comparison unit 204 a and the voltage conversion unit 205 a . The feedback unit 206 a outputs feedback signals according to the comparison signals output by the comparison unit 204 a , and the voltage conversion unit 205 a regulates the output current signals of the POE port 10 a according to the feedback signals.

In one embodiment, the current regulation unit 20 a further comprises an isolation unit 207 a . The isolation unit 207 a is connected between the mean conversion unit 202 a and the comparison unit 204 a . The isolation unit 207 a isolates the mean current signals output by the mean conversion unit 202 a from the reference current signals output by the current integration unit 203 a to avoid mutual interference between the mean current signals and the reference current signals.

In one embodiment, the current regulation unit 20 b comprises a sampling unit 201 b , a mean conversion unit 202 b , a current integration unit 203 b , a comparison unit 204 b , a voltage conversion unit 205 b , a feedback unit 206 b , and an isolation unit 207 b . A circuit diagram and operating principle of the current regulation unit 20 b are the same as a circuit diagram and operating principle of the current regulation unit 20 a.

FIG. 3 is a schematic diagram of a third embodiment of a POE system 1 b . In one embodiment, the POE system 1 b comprises a plurality of current regulation units, such as a current regulation unit 20 c and a current regulation unit 20 d . The current regulation unit 20 c is similar to the current regulation unit 20 d . The difference between the POE system 1 b and the POE system 1 a is that the mean conversion unit 202 a further comprises a rectifying unit 2022 a , a calculating unit 2024 a , a dual mode switching unit 2026 a , and a temperature compensation unit 2028 a . The mean conversion unit 202 b further comprises a rectifying unit 2022 b , a calculating unit 2024 b , a dual mode switching unit 2026 b , and a temperature compensation unit 2028 b . The POE port 10 a comprises the standard type controller 10 aa , and the standard type controller 10 aa outputs standard type instruction signals. The POE port 10 b comprises the standard type controller 10 bb , and the standard type controller 10 bb outputs the standard type instruction signals.

The rectifying unit 2022 a is connected to the sampling unit 201 a . The rectifying unit 2022 a rectifies the sampling current signals output by the sampling unit 201 a . The calculating unit 2024 a is connected between the rectifying unit 2022 a and the isolation unit 207 a . The calculating unit 2024 a receives the rectified sampling current signals from the rectifying unit 2022 a , and converts the rectified sampling current signals into the mean current signals.

The dual mode switching unit 2026 b is connected to the calculating unit 2024 a and the standard type controller 10 aa . The dual mode switching unit 2026 a regulates the mean current signals output by the calculating unit 2024 a according to the standard type instruction signals output by the standard type controller 10 aa . The temperature compensation unit 2028 a is connected to the calculating unit 2024 a . The temperature compensation unit 2028 a detects an external environment temperature to regulate the mean current signals output by the calculating unit 2024 a.

In one embodiment, in response to the POE port 10 a operating according to the IEEE802.3AT standard, the standard type controller 10 aa outputs first standard type instruction signals. In response to the POE post 10 a operating according to the IEEE802.3AF standard, the standard type controller 10 aa outputs second standard type instruction signals.

FIG. 4 is a circuit diagram of a fourth embodiment of a POE system 1 c . The POE system 1 c comprises a plurality of current regulation units 20 , such as a current regulation unit 20 e and a current regulation unit 20 f . The sampling unit 201 a comprises an induction coil Q 1 , a first capacitor C 1 , and a second capacitor C 2 . The induction coil Q 1 comprises a first coil (not labeled) and a second coil (not labeled). The first coil is an input terminal of the induction coil Q 1 , and the second coil is an output terminal of the induction coil Q 1 . A first end of the first coil is connected to the POE port 10 a , and a second end of the first coil is connected to the voltage conversion unit 205 a . A first end of the second coil is connected to the mean conversion unit 202 a , and a second end of the second coil is grounded. A first end of the first capacitor C 1 is connected to a node between the POE port 10 a and the induction coil Q 1 , and a second end of the first capacitor C 1 is grounded. A first end of the second capacitor C 2 is connected to a node between the induction coil Q 1 and the voltage conversion unit 205 a , and a second end of the second capacitor C 2 is grounded. The first capacitor C 1 and the second capacitor C 2 filter the output current signals of the POE port 10 a . The induction coil Q 1 samples the output current signals of the POE port 10 a , and sends the sampled current signals to the mean conversion unit 202 a.

In one embodiment, the sampling unit 201 a regulates a percentage of the sampling current signals in the output current signals of the POE port 10 a according to actual circuit designs. The sampling unit 201 a regulates the percentage of the sampling current signals in the output current signals by regulating a ratio of the first coil being active and the second coil being active.

In one embodiment, the sampling unit 201 a can include a resistor instead of the induction coil Q 1 to sample current signals, and the sampling unit 201 a can be other sampling modules in other embodiments.

The isolation unit 207 a comprises a first diode D 1 . An anode of the first diode D 1 is connected to the calculating unit 2024 a , and a cathode of the first diode D 1 is connected to the comparison unit 204 a . The isolation unit 207 a isolates the mean current signals output by the mean conversion unit 202 a from the reference current signals output by the current integration unit 203 a . The isolation unit 207 a prevents interference between the mean current signals and the reference current signals, so that the comparison unit 204 a can accurately compare the mean current signals and the reference current signals.

The mean conversion unit 202 a comprises the rectifying unit 2022 a , the calculating unit 2024 a , the dual mode switching unit 2026 a , and the temperature compensation unit 2028 a . The rectifying unit 2022 a comprises a second diode D 2 . The calculating unit 2024 a comprises a first resistor R 1 , a second resistor R 2 , and a third capacitor C 3 . The dual mode switching unit 2026 a comprises a third resistor R 3 and a photoelectric sensor Q 2 . The temperature compensation unit 2028 a comprises a first thermistor RT 1 and a second thermistor RT 2 .

An anode of the second diode D 2 is connected to the sampling unit 201 a , and a cathode of the second diode D 2 is connected to a first end of the first resistor R 1 . A second end of the first resistor R 1 is connected to the anode of the first diode D 1 . A first end of the second resistor R 2 is connected to a node between the first resistor R 1 and the first diode D 1 , and a second end of the second resistor R 2 is grounded. A first end of the third capacitor C 3 is connected to a node between the first resistor R 1 and the second resistor R 2 , and a second end of the third capacitor C 3 is grounded. The first thermistor RT 1 is connected to the first resistor R 1 in parallel, and the second thermistor RT 2 is connected to the second resistor R 2 in parallel. The photoelectric sensor Q 2 comprises an input terminal and an output terminal. The input terminal of the photoelectric sensor Q 2 is connected to the standard type controller 10 aa , and the output terminal of the photoelectric sensor Q 2 is connected between a first end of the third resistor R 3 and ground. A second end of the third resistor R 3 is connected to a node between the first resistor R 1 and the second resistor R 2 . The input terminal of the photoelectric sensor Q 2 is an emitting terminal and comprises a light emitting diode. The output terminal of the photoelectric sensor Q 2 is a receiving terminal and comprises a phototransistor. The input terminal of the photoelectric sensor Q 2 and the output terminal of the photoelectric sensor Q 2 communicate through light. The photoelectric sensor Q 2 transforms changes in light intensity into electric signals, and transmits the electric signals.

In one embodiment, when the standard type controller 10 aa outputs the first standard type instruction signals, the standard type controller 10 aa controls the photoelectric sensor Q 2 to turn on. When the standard type controller 10 aa outputs the second standard type instruction signals, the standard type controller 10 aa controls the photoelectric sensor Q 2 to turn off.

The temperature compensation unit 2028 a regulates the mean current signals output by the calculating unit 2024 a according to the external environment temperature detected by the first thermistor RT 1 and the second thermistor RT 2 . The temperature compensation unit 2028 a reduces an offset error of the calculating unit 2024 a in a high temperature state. In one embodiment, when a value of the external environment temperature is greater than 50 degrees, the external environment temperature is in a high temperature state.

The comparison unit 204 a comprises a comparator U 1 , a fourth resistor R 4 , a fifth resistor R 5 , a sixth resistor R 6 , and a seventh resistor R 7 . The comparator U 1 comprises a positive input terminal, a negative input terminal, and an output terminal. The output terminal of the comparator U 1 is connected to the feedback unit 206 a . A first end of the fourth resistor R 4 is connected to the cathode of the first diode D 1 , and a second end of the fourth resistor R 4 is connected to the positive input terminal of the comparator U 1 . A first end of the fifth resistor R 5 is connected to a node between the positive input terminal of the comparator U 1 and the fourth resistor R 4 , and a second end of the fifth resistor R 5 is grounded. A first end of the sixth resistor R 6 is connected to the current integration unit 203 a , and a second end of the sixth resistor R 6 is connected to the negative input terminal of the comparator U 1 . A first end of the seventh resistor R 7 is connected to a node between the negative input terminal of the comparator U 1 and the sixth resistor R 6 , and a second end of the seventh resistor R 7 is grounded.

In one embodiment, a resistance of the fourth resistor R 4 is equivalent to a resistance of the sixth resistor R 6 , and a resistance of the fifth resistor R 5 is equivalent to a resistance of the seventh resistor R 7 . In response to a value of the mean current signals output by the mean conversion unit 202 a being greater than a value of the reference current signals output by the current integration unit 203 a , the comparator U 1 outputs high-level signals. In response to the value of the mean current signals output by the mean conversion unit 202 a being less than the value of the reference current signals output by the current integration unit 203 a , the comparator U 1 outputs low-level signals. The comparison unit 204 a compares the output current signals of the POE ports 10 a , 10 b to each other, and outputs a corresponding comparison signal.

The current integration unit 203 a comprises a fourth capacitor C 4 , an eighth resistor R 8 , and a ninth resistor R 9 . A first end of the eighth resistor R 8 is connected to a node between the first diode D 1 and the fourth resistor R 4 , and a second end of the eighth resistor R 8 is connected to the first end of the sixth resistor R 6 . A first end of the ninth resistor R 9 is connected to a node between the sixth resistor R 6 and the eighth resistor R 8 , and a second end of the ninth resistor R 9 is connected to a first end of the fourth capacitor C 4 and the current integration unit 203 b . A second end of the fourth capacitor C 4 is grounded. The current integration unit 203 a integrates and converts the mean current signals output by the mean conversion unit 202 a and the mean current signals output by the mean conversion unit 202 b.

The current integration unit 203 a regulates a resistance of the eighth resistor R 8 and the ninth resistor R 9 to regulate a threshold value of a difference between the mean current signals output by the mean conversion unit 202 a and the reference current signals output by the current integration unit 203 a . For example, the threshold value of the difference between the mean current signals output by the mean conversion unit 202 a and the reference current signals output by the current integration unit 203 a is 0.5. Thus, when the difference between the mean current signals output by the mean conversion unit 202 a and the reference current signals output by the current integration unit 203 a is greater than 0.5, the comparison unit outputs the comparison signals.

In one embodiment, the current regulation circuit 20 comprises two current regulation units 20 e , 20 f . The current regulation unit 20 e is connected to the current regulation unit 20 f . A value of the reference current signals output by the current integration unit 20 e are equivalent to a maximum value between the mean current signals output by the mean conversion unit 202 a and the mean current signals output by the mean conversion unit 202 b . That is, when the value of the mean current signals output by the mean conversion unit 202 a is greater than the value of the mean current signals output by the mean conversion unit 202 b , the value of the reference current signals output by the current integration unit 20 e is equivalent to the value of the mean current signals output by the mean conversion unit 202 a . When the value of the mean current signals output by the mean conversion unit 202 b is greater than the value of the mean current signals output by the mean conversion unit 202 a , the value of the reference current signals output by the current integration unit 20 e is equivalent to the value of the mean current signals output by the mean conversion unit 202 b . The output current signals of each of the POE ports 10 a , 10 b are compared with the output current signals of the maximum value between the POE ports 10 a , 10 b . When the current regulation circuit 20 comprises more than two current regulation units 20 e , 20 f , the current regulation units 20 e , 20 f are connected together.

The feedback unit 206 a comprises a third diode D 3 , a tenth resistor R 10 , an eleventh resistor R 11 , and a twelfth resistor R 12 . A cathode of the third diode D 3 is connected to the output terminal of the comparator U 1 , and an anode of the third diode D 3 is connected to a first end of the tenth resistor R 10 . A second end of the tenth resistor R 10 is connected to the voltage conversion unit 205 a and a first end of the eleventh resistor R 11 . A second end of the eleventh resistor R 11 is connected to the voltage conversion unit 205 a . A first end of the twelfth resistor R 12 is connected to a node between the tenth resistor R 10 and the eleventh resistor R 11 , and a second end of the twelfth resistor R 12 is grounded. In response to the comparison unit 204 a outputting the high-level signals, the eleventh resistor R 11 is connected to the twelfth resistor R 12 in series, and a voltage of the first end of the twelfth resistor R 12 is a first fixed value. In response to the comparison unit 204 a outputting the low-level signals, the tenth resistor R 10 is connected to the twelfth resistor R 12 in parallel, and a voltage of the first end of the twelfth resistor R 12 changes to a second fixed value. The feedback unit 206 a generates the feedback signals according to the change in voltage of the first end of the twelfth resistor R 12 .

The voltage conversion unit 205 a comprises a PWM controller U 2 , a transformer T 1 , a switch Q 3 , a fifth capacitor C 5 , a fourth diode D 4 , and a thirteenth resistor R 13 . The transformer T 1 comprises a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first input terminal of the transformer T 1 is connected to a node between the induction coil Q 1 and the second capacitor C 2 . The switch Q 3 comprises a control terminal, a first terminal, and a second terminal. The control terminal of the switch Q 3 is connected to the PWM controller U 2 . The first terminal of the switch Q 3 is connected to the second input terminal of the transformer T 1 . The second terminal of the switch Q 3 is grounded. An anode of the fourth diode D 4 is connected to the first output terminal of the transformer T 1 , and a cathode of the fourth diode D 4 is connected to a first end of the fifth capacitor C 5 . A second end of the fifth capacitor C 5 is connected to the second output terminal of the transformer T 1 and ground. A first end of the thirteenth resistor R 13 is connected to a node between the fourth diode D 4 and the fifth capacitor C 5 , and further connected to the second end of the eleventh resistor R 11 . A second end of the thirteenth resistor R 13 is grounded. The PWM controller U 1 outputs PWM signals and regulates a duty cycle of the PWM signals according to the feedback signals output by the feedback unit 206 a , to regulate an input voltage of the voltage conversion unit 20 e , and to regulate the output current signals of the POE port 10 a . The fourth diode D 4 and the fifth capacitor C 5 rectify and filter output voltage signals output by the transformer T 1 .

In one embodiment, the current regulation circuit 20 comprises two current regulation units 20 e , 20 f . The input terminal of the O-ring diode 22 comprises a first input terminal and a second input terminal. The first input terminal of the O-ring diode 22 is connected to a node between the eleventh resistor R 11 and the thirteenth resistor R 13 of the current regulation unit 20 e , and the second input terminal of the O-ring diode 22 is connected to a node between the eleventh resistor R 11 and the thirteenth resistor R 13 of the current regulation unit 20 f . The output terminal of the O-ring diode 22 is connected to the network device 30 . The O-ring diode 22 adds the output current signals of the POE ports 10 a , 10 b together to drive the network device 30 . In other embodiments, the O-ring diode 22 can be other modules that can add current signals together.

In one embodiment, the switch Q 3 can be a metal-oxide semiconductor field effect transistor (MOSFET), a transistor, for example.

In one embodiment, when the current regulation circuit 20 comprises more than two current regulation units 20 e , 20 f , the comparison unit 204 a compares the output current signals output by the POE ports to each other to determine which POE port outputs the current signal with the highest value. The comparison unit 204 a outputs the comparison signals based on the comparison. For example, the output current signals of the POE port 10 a have the highest value. Thus, in the current regulation unit 20 e , a value of the positive input terminal of the comparator U 1 is greater than a value of the negative input terminal of the comparator U 1 , the comparator U 1 outputs high-level signals, and the feedback unit 206 a has no feedback signals to output. In the current regulation unit 20 f , the value of the positive input terminal of the comparator U 1 is less than the value of the negative input terminal of the comparator U 1 , the comparator U 1 outputs low-level signals, and the feedback unit 206 a outputs feedback signals to regulate the output current signals of the POE port 10 b . The current regulation units 20 e , 20 f make the value of the output current signals output by the POE port 10 b equivalent to the value of the output current signals output by the POE port 10 a . Thus, the POE ports 10 a , 10 b output current signals with the highest value to drive the network device 30 in parallel.

The current regulation circuit 20 samples and determines which of the output current signals output by the POE ports 10 a , 10 b has the highest value. The current regulation circuit 20 regulates the output current signals output by the other POE ports to make the value of the output current signals output by each of the POE ports equivalent.

FIG. 5 is a schematic diagram of a fifth embodiment of a POE system 1 d . In one embodiment, the POE system 1 d comprises a plurality of current regulation units, such as a current regulation unit 20 g and a current regulation unit 20 h . The current regulation unit 20 g is similar to the current regulation unit 20 h . The current regulation unit 20 g comprises the sampling unit 201 a , the voltage conversion unit 205 a , an analog digital (AD) converter 208 a , a micro control unit (MCU) 209 , and a temperature detection unit 210 a . The sampling unit 201 a and the voltage conversion unit 205 a are similar to the sampling unit 201 a and the voltage conversion unit 205 a of the third embodiment. The AD converter 208 a is connected to the sampling unit 201 a and the temperature unit 210 a , and the AD converter 208 a converts the sampling current signals output by the sampling unit 201 a into digital current signals and sends to the MCU 209 . The temperature detection unit 210 a detects and transmits the external environment temperature to the AD converter 208 a . The MCU 209 is connected to the AD converter 208 a and the standard type controller 10 aa . The MCU 209 converts the digital current signals output by the AD converter 208 a into the mean current signals, the MCU 209 integrates and converts the mean current signals to the reference current signals, and the MCU 209 compares the mean current signals with the reference current signals to output the comparison signals. The voltage conversion unit 205 a is connected to the sampling unit 201 a and the MCU 209 , and the voltage conversion unit 205 a regulates the output current signals of the POE port 10 a according to the comparison signals output by the MCU 209 .

In one embodiment, the current regulation units 20 g , 20 h share the MCU 209 . The MCU generates reference current signals according to the digital current signals output by the AD converters 208 a , 208 b . The MCU 209 further regulates the mean current signals according to the standard type instruction signals output by the standard type controller 10 aa or the external environment temperature detected by the temperature detection unit 210 a.

In one embodiment, the POE system 1 d further comprises the O-ring diode 22 . The input terminal of the O-ring diode 22 is connected to the current regulation units 20 g , 20 h , and the output terminal of the O-ring diode 22 is connected to the network device 30 . The O-ring diode 22 integrates current signals output by the current regulation units 20 g , 20 g together to drive the network device 30 .

FIG. 6 is a flowchart of a first embodiment of a POE control method. In block S 6000 , the sampling unit 201 a samples and outputs the sampling current signals according to the output current signals of the POE port 10 a . In block S 6001 , the mean conversion unit 202 a converts the sampling current signals output by the sampling unit 201 a into the mean current signals. In block S 6002 , the current integration unit 203 a integrates and converts the mean current signals output by the current regulation units 20 a , 20 b into the reference current signals. In block S 6003 , the comparison unit 204 a compares the mean current signals output by the mean conversion unit 202 a with the reference current signals output by the current integration unit 203 a , and outputs comparison signals based on the comparison. In block S 6004 , the voltage conversion unit 205 a regulates the output current signals of the POE port 10 a according to the comparison signals output by the comparison unit 204 a.

FIG. 7 is a flowchart of a second embodiment of a POE control method. In one embodiment, blocks S 7000 , S 7002 , S 7003 are similar to blocks S 6000 , S 6002 , S 6003 of the first embodiment, respectively. In block S 70010 , the calculating unit 2024 a converts the sampling current signals output by the sampling unit 201 a into the mean current signals. In block S 70012 , the dual mode switching unit 2026 a regulates the mean current signals output by the calculating unit 2024 a according to the standard type instruction signals output by the standard type controller 10 aa of the POE port 10 a . In block S 70014 , the temperature compensation unit 2028 a regulates the mean current signals output by the calculating unit 2024 a according to the external environment temperature detected by the temperature compensation unit 2028 a . In block S 70040 , the feedback unit 206 a outputs the feedback signals according to the comparison signals output by the comparison unit 204 a . In block S 70042 , the voltage conversion unit 205 a regulates the output current signals of the POE port 10 a according to the feedback signals.

FIG. 8 is a flowchart of a third embodiment of a POE control method. In one embodiment, blocks S 8000 , S 8006 are similar to blocks S 6000 , S 6004 of the first embodiment, respectively. In block S 8001 , the AD converter 208 a converts the sampling current signals output by the sampling unit 201 a into the digital current signals. In block S 8002 , the MCU 209 converts the digital current signals output by the AD converter 208 a into the mean current signals. In block S 8003 , the MCU 209 regulates the mean current signals according to the standard type instruction signals output by the standard type controller 10 aa of the POE port 10 a . In block S 8004 , the MCU 209 regulates the mean current signals according to the external environment temperature detected by the temperature detection unit 210 a . In block S 8005 , the MCU 209 integrates and converts the mean current signals into the reference current signals, and compares the mean current signals with the reference current signals to output comparison signals.

The foregoing disclosure of various embodiments has been presented for the purposes of illustration. It is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Many variations and modifications of the embodiments described herein will be apparent to one of ordinary skill in the art in the light of the above disclosure. The scope of the disclosure is to be defined only by the claims appended hereto and their equivalents.