Enhancement of dynamic range of audio signal path

The present disclosure claims priority to U.S. Provisional Patent Application Ser. No. 61/874,014, filed Sep. 5, 2013, which is incorporated by reference herein in its entirety.

The present disclosure relates in general to circuits for audio devices, including without limitation personal audio devices such as wireless telephones and media players, and more specifically, to systems and methods for enhancing a dynamic range of an audio signal path in an audio device by applying signal-based gain control to a digital gain and an analog gain of the signal path.

Personal audio devices, including wireless telephones, such as mobile/cellular telephones, cordless telephones, mp3 players, and other consumer audio devices, are in widespread use. Such personal audio devices may include circuitry for driving a pair of headphones or one or more speakers. Such circuitry often includes a power amplifier for driving an audio output signal to headphones or speakers.

One particular characteristic of a personal audio device which may affect its marketability and desirability is the dynamic range of its audio output signal. Stated simply, the dynamic range is the ratio between the largest and smallest values of the audio output signal. One way to increase dynamic range is to apply a high gain to the power amplifier. However, noise present in an audio output signal may be a generally monotonically increasing function of the gain of amplifier A 1 , such that any increased dynamic range as a result of a high-gain amplifier may be offset by signal noise which may effectively mask lower-intensity audio signals.

In accordance with the teachings of the present disclosure, one or more disadvantages and problems associated with existing approaches to maintaining a high dynamic range of an audio signal path may be reduced or eliminated.

In accordance with embodiments of the present disclosure, an apparatus for providing an output signal to an audio transducer may include an analog signal path portion, a digital-to-analog converter (DAC), and a control circuit. The analog signal path portion may have an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog attenuation, and may be configured to generate the output signal based on the analog input signal and in conformity with the selectable analog attenuation. The DAC may have a selectable digital gain and may be configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digital gain. The control circuit may be configured to select the selectable analog attenuation and select the selectable digital gain based on a magnitude of a signal indicative of the output signal.

In accordance with these and other embodiments of the present disclosure, a method for providing an output signal to an audio transducer may include receiving a signal indicative of the output signal. The method may also include selecting a selectable analog attenuation based on a magnitude of the signal indicative of the output signal, wherein the output signal is generated based on an analog input signal and in conformity with the selectable analog attenuation. The method may further include selecting a selectable digital gain based on a magnitude of the signal indicative of the output signal, wherein a digital audio input signal is converted into the analog input signal in conformity with the selectable digital gain.

Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims.

It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure.

A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:

FIG. 1 is an illustration of an example personal audio device, in accordance with embodiments of the present disclosure;

FIG. 2 is a block diagram of selected components of an example audio integrated circuit of a personal audio device, in accordance with embodiments of the present disclosure; and

FIG. 3 is a block diagram of selected components of a gain control circuit for use within the audio integrated circuit depicted in FIG. 2 , and selected components of an audio integrated circuit which may be coupled to the gain control circuit, in accordance with embodiments of the present disclosure.

FIG. 1 is an illustration of an example personal audio device 1 , in accordance with embodiments of the present disclosure. FIG. 1 depicts personal audio device 1 coupled to a headset 3 in the form of a pair of earbud speakers 8 A and 8 B. Headset 3 depicted in FIG. 1 is merely an example, and it is understood that personal audio device 1 may be used in connection with a variety of audio transducers, including without limitation, headphones, earbuds, in-ear earphones, and external speakers. A plug 4 may provide for connection of headset 3 to an electrical terminal of personal audio device 1 . Personal audio device 1 may provide a display to a user and receive user input using a touch screen 2 , or alternatively, a standard LCD may be combined with various buttons, sliders, and/or dials disposed on the face and/or sides of personal audio device 1 . As also shown in FIG. 1 , personal audio device 1 may include an audio integrated circuit (IC) 9 for generating an analog audio signal for transmission to headset 3 and/or another audio transducer.

FIG. 2 is a block diagram of selected components of an example audio IC 9 of a personal audio device, in accordance with embodiments of the present disclosure. As shown in FIG. 2 , a microcontroller core 18 may supply a digital audio input signal DIG_IN to a digital-to-analog converter (DAC) 14 , which may in turn supply an analog audio input signal V IN to a power amplifier stage A 1 which may amplify or attenuate the audio input signal V IN and provide an audio output signal V OUT , which may operate a speaker, headphone transducer, and/or a line level signal output. A capacitor CO may be utilized to couple the output signal to the transducer or line level output, particularly if amplifier A 1 is operated from a unipolar power supply having a quiescent voltage substantially differing from ground. A power supply 10 may provide the power supply rail inputs of amplifier A 1 . In some embodiments, power supply 10 may comprise a charge pump power supply.

As shown in FIG. 2 , audio IC 9 may include a gain control circuit 20 configured to, based on digital audio input signal DIG_IN (and, in some embodiments, the volume control setting in addition to digital audio input signal DIG_IN), control a programmable digital gain of DAC 14 and a programmable analog attenuation of amplifier A 1 . In embodiments in which a volume control is present, a volume control signal may be provided from a microcontroller or other digital control circuit responsive to a user interface, volume knob encoder or program command, or other suitable mechanism.

As an example of the functionality of gain control circuit 20 , when a sum of a magnitude of digital audio input signal DIG_IN and a magnitude of a volume control setting is at or near zero decibels (dB) relative to the full-scale magnitude of the digital audio input signal, gain control circuit 20 may apply a unity gain (0 dB) to both of the digital gain and the analog attenuation (although the analog attenuation may be further modified based on the volume control setting). However, if the sum of the magnitude of the digital audio input signal DIG_IN and the magnitude of the volume control setting is below a particular predetermined threshold magnitude relative to the full-scale magnitude of digital audio input signal DIG_IN (e.g., −20 dB), gain control circuit 20 may apply a non-unity digital gain (e.g., 20 dB) to the digital gain and a corresponding non-unity attenuation (e.g., −20 dB) to the analog attenuation (although the analog attenuation may be further modified based on a volume control setting). Such approach may increase the dynamic range of audio IC 9 compared to approaches in which the digital gain and analog attenuation are static, as it may reduce the noise injected into audio output signal V OUT , which noise may be a generally monotonically increasing function of the gain/attenuation of amplifier A 1 . While such noise may be negligible for higher magnitude audio signals (e.g., at or near 0 dB), the presence of such noise may become noticeable for lower magnitude audio signals (e.g., at or near −20 dB or lower). By applying an analog attenuation at amplifier A 1 , the amount of noise injected into audio output signal V OUT may be reduced, while the signal level of audio output signal V OUT may be maintained in accordance with the digital audio input signal DIG_IN through application of a digital gain to DAC 14 equal in magnitude to the analog attenuation.

FIG. 3 is a block diagram of selected components of an example gain control circuit 20 for use within audio IC 9 , and selected components of audio IC 9 which may be coupled to gain control circuit 20 , in accordance with embodiments of the present disclosure. As shown in FIG. 3 , an audio signal path within DAC 14 may include an interpolator 32 , a sample rate converter (SRC) 34 , a modulator 40 , and a DAC core 41 , as is known in the art. Interposed between SRC 34 and modulator 40 may be a gain element 36 and a multiplexer 38 . Gain element 36 may be configured to apply a gain of x (where x may be given in dB) to an output signal of SRC 34 , thus increasing the magnitude of such signal. Multiplexer 38 may select between the digitally-amplified output signal generated by gain element 36 or the unamplified output signal from SRC 34 based on the digital gain signal received from gain control circuit 20 , and output such selected signal to modulator 40 .

As shown in FIG. 3 , gain control circuit 20 may include a level detection circuit 42 , a combiner 44 , a comparator 46 , a zero-cross detection circuit 48 , and a gain control state machine 50 . Level detection circuit 42 may include any suitable system, device, or apparatus for receiving an output signal of interpolator 32 and/or SRC 34 , determining a magnitude of such output signal, and outputting a signal indicative of such magnitude (which will also be indicative of a magnitude of digital audio input signal DIG_IN). Combiner 44 may include any suitable system, device, or apparatus for receiving the output signal from level detection circuit 42 indicative of the magnitude of digital audio input signal DIG_IN and receiving a volume control signal and summing these two signals to generate an output signal indicative of a desired magnitude of audio output signal V OUT . Comparator 46 may compare the output signal of combiner 44 with a predetermined threshold magnitude (e.g., relative to a full-scale magnitude of digital audio input signal DIG_IN and/or audio output signal V OUT ), and based on such comparison, output a signal REQ_DIG_GAIN indicative of whether the desired magnitude of audio output signal V OUT is greater or lesser than such predetermined threshold magnitude. In some embodiments, comparator 46 may implement hysteresis, such that output signal REQ_DIG_GAIN may only transition if the output signal of combiner 44 remains above or below the predetermined threshold magnitude for a minimum duration of time (e.g., 0.1 seconds to place any switching artifacts outside the human-perceptible audio range). Zero-cross detection circuit 48 may include any suitable system, device, or apparatus for detecting the occurrence of a zero crossing of a signal in the signal path of audio IC 9 , including, as shown in FIG. 3 , the output signal of SRC 34 and outputting a signal ZERO_DETECT indicating that a zero crossing has occurred.

Gain control state machine 50 may receive the volume control signal and signals REQ_DIG_GAIN and ZERO_DETECT and based on such signals, generate the digital gain signal and analog attenuation signal, as described in greater detail elsewhere in this disclosure. For example, when the sum of the magnitude of digital audio input signal DIG_IN and the magnitude of the volume control signal transitions from above to below the predetermined threshold magnitude (e.g., −20 dB), signal REQ_DIG_GAIN may be asserted and in response gain control state machine 50 may wait until the occurrence of a zero crossing (as indicated by signal ZERO_DETECT) or crossing of another level within a threshold of zero and indicative of a zero crossing (e.g., a low signal level of lower than −70 dB or within a small number of least significant bits of zero), after which it may cause DAC 14 to apply a non-unity digital gain (x, given in dB) to its signal path and cause amplifier A 1 to apply an analog attenuation equal to the sum of the magnitude of the volume control setting (y, given in dB) and the inverse of the digital gain (−x, given in dB). Gain control state machine 50 may enable the non-unity digital gain and non-unity analog attenuation in response to a zero crossing of the audio signal so that the change between gain modes occurs when the signal magnitude is small, and therefore auditory artifacts associated with the mode change may be less noticeable to a listener of an audio device including audio IC 9 .

As another example, when the sum of the magnitude of digital audio input signal DIG_IN and the magnitude of the volume control signal transitions from below to above the predetermined threshold magnitude (e.g., −20 dB), signal REQ_DIG_GAIN may be deasserted, and in response gain control state machine 50 may cause DAC 14 to apply a unity digital gain (e.g., 0 dB) to its signal path and cause amplifier A 1 to apply a unity analog attenuation equal to the volume control setting (e.g., 0 dB additional analog attenuation). However, when transitioning to this unity gain mode, it may not be desirable to wait for a zero cross of the output signal, as a transition from below to above the predetermined threshold magnitude may almost immediately lead to clipping of the audio signal.

In some embodiments, gain control state machine 50 may remove the non-unity digital gain and non-unity analog attenuation in one step while taking into account any latency associated with modulator 40 . In other embodiments, gain control state machine 50 may remove the non-unity digital gain in one step and ramp the non-unity analog attenuation to a unity analog attenuation over time, wherein such ramp times may model the inverse of the amplifier A 2 response to the step function created by removal of the non-unity digital gain.

In yet other embodiments, gain control state machine 50 or another component of audio IC 9 may predict the transition from the non-unity gain mode to the unity gain mode and ramp the non-unity digital gain towards unity and the non-unity analog attenuation towards unity in response to such prediction. In such embodiments, analysis of digital audio input signal DIG_IN, the output signal of interpolator 32 , or another intermediate signal in the audio signal path may indicate that a transition is imminent. In addition, a buffer region may be applied to the digital gain and audio signal level (e.g., a digital gain of 10 dB when the audio signal is below −20 dB and 20 dB when the audio signal is below −40 dB). The output of SRC 34 may be used to monitor when the audio signal enters the buffer region, and in response thereto, gain control state machine 50 or another component of audio IC 9 may decrease the digital gain and decrease the analog attenuation in small steps.

In alternative embodiments, audio IC 9 may employ a multi-path solution having at least two audio signal paths (e.g., from DIG_IN to V OUT ): one with unity digital gain and analog attenuation and another with a non-unity digital gain (e.g., 20 dB) and corresponding non-unity analog attenuation (e.g., −20 dB), wherein the output of one of the audio signal paths may be selected as the audio output signal V OUT based on the magnitude of the audio signal.

In these and other embodiments, a component of audio IC 9 may add pre-correction to the digital output of the signal path (e.g., output of DAC 14 ) to account for filtering performed on the step change that occurs as a result of the transition in modes, which may avoid a need to match a response of amplifier A 2 in ramping the analog attenuation during a transition.

In these and other embodiments, a component of audio IC 9 may alter a response of amplifier A 2 (e.g., increase the low-pass corner frequency of amplifier A 2 or effectively bypass its filtering effect) during the duration in which digital gain is decreased from the non-unity gain to the unity gain.

In these and other embodiments, gain control state machine 50 or another component of gain control circuit 20 may generate a DAC mode signal. In such embodiments, the DAC mode signal may be based on the analog attenuation signal, and DAC 14 may operate in a plurality of modes based on the DAC signal. For instance, when the analog attenuation is below a threshold level (e.g., −40 dB), the DAC mode signal may be set in accordance with a low-power/high-noise mode, while when the analog attenuation is above a threshold level, the DAC mode signal may be set in accordance with a high-power/low-noise mode. To implement the plurality of modes, one or more components of DAC 14 (e.g., interpolator 32 , SRC 34 , gain element 36 , modulator 40 , DAC core 41 ) may be configured to operate at different levels of power consumption based on the DAC mode. For instance, such one or more components may operate at higher frequencies, higher currents, and/or lower effective internal resistances in the low-power/high-noise mode, while operating at lower frequencies, lower currents, and/or higher effective internal resistances in the high-power/low-noise mode. In other embodiments, DAC 14 may include a plurality of paths, each path corresponding to a DAC mode and each path including its own respective interpolator 32 , SRC 34 , gain element 35 , multiplexer 38 , modulator 40 , and/or DAC core 41 , wherein a single one of the plurality of paths is selected to process digital audio input signal DIG_IN based on the DAC mode. The presence of such a DAC mode based on analog attenuation may reduce power consumption of DAC 14 , as use of the DAC mode permits DAC 14 to operate at a lower power consumption when the analog attenuation is sufficiently high, as the additional noise present in the lower-power mode of DAC 14 may be reduced or eliminated by the analog attenuation. Although the foregoing contemplates use of two DAC modes, any suitable number of DAC modes may be employed in audio IC 9 .

Similarly, in these and other embodiments amplifier A 1 may operate in a plurality of analog modes, wherein the analog mode is selected based on the analog attenuation. For instance, when the analog attenuation is below a threshold level (e.g., −40 dB), the analog mode may be set in accordance with a high-power/low-noise mode, while when the analog attenuation is above a threshold level, the analog mode may be set in accordance with a low-power/high-noise mode. As in the case of the DAC mode described above, analog modes may be implemented using multiple paths or may be implemented by varying frequencies, currents, effective internal resistances, and/or other suitable parameters of amplifier A 1 .

As a result of the various embodiments disclosed above, gain control circuit 20 may be configured to select the selectable analog attenuation and select the selectable digital gain such that the analog signal path portion operates at a highest possible attenuation in order to minimize analog thermal noise in an analog signal path portion of audio IC 9 which generates the audio output signal from the analog audio input signal.

This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative.

All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present inventions have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.