USPatent applicationPatented

Printed wiring board assembly and related methods

Granted 21 Apr 2015 · 1 office action

Life of the application

7 dated events
⤢ drag to zoom20142016201820202022202420262028203020322034ProsecutionOwnershipTerm & fees
ProsecutionOwnershipTerm & feeshover for detail · click to open

Abstract

A method is for making a printed wiring board (PWB) assembly. The method may include forming a first PWB having a plurality of first electrically conductive pads, forming a second PWB including a plurality of electrically conductive traces having exposed ends on an edge surface of the second PWB, and covering the edge surface of the second PWB with an electrically conductive layer. The method may also include selectively removing portions of the electrically conductive layer to define a plurality of second electrically conductive pads electrically connected to corresponding ones of the exposed ends of the electrically conductive traces, and assembling the first and second PWBs together so that the first and second electrically conductive pads are electrically coupled together to define the PWB assembly.

Description

7 parts
›GOVERNMENT RIGHTS

This invention was made with U.S. Government support, and the U.S. Government has certain rights in this invention.

›FIELD OF THE INVENTION

The present invention relates to the field of circuit boards, and, more particularly, to assembled printed wiring boards and related methods.

›BACKGROUND OF THE INVENTION

An electronic device may include one or more circuit boards. A typical circuit board is a planar board that mechanically supports electronic components. The electronic components may comprise, for example, resistors, capacitors, switches, batteries, and other more complex integrated circuit components, i.e. microprocessors. The circuit board typically comprises a dielectric material, for example, a plastic material.

A simple circuit board may include conductive traces on its surface for connecting the electronic components to each other. As electronic circuitry has become more complex, multi-layer circuit boards with at least two electrically conductive trace layers sandwiched between dielectric layers have been developed. Typically, the different conductive trace layers of a multi-layer circuit board may be connected through vertically extending vias, which comprise conductive materials, for example, metal.

In certain applications, it may be desirable to interconnect two circuit boards arranged at a 90 degrees angle, each having electrically conductive pads on the major surfaces thereof. In other words, the edge surface of a first circuit board is mounted onto the major surface of the second circuit board. Moreover, this interconnection is typically accomplished using an interconnector component on the major surface of the second circuit board. Typically, the interconnector component physically couples the first and second circuit boards together and electrically couples the electrically conductive pads. The use of the interconnector component may increase the size of the assembled circuit boards. This may pose installation drawbacks in applications where space may be limited.

One approach to the above drawback is to interconnect circuit boards without using a separate interconnector component. For example, U.S. Pat. No. 6,345,989 to Mason et al. discloses a circuit board interconnector. The circuit board of Mason at al. includes conductive traces that extend outwardly beyond the edge surface of the circuit board, and contact pads provided thereon with a gap between the contact pads and the edge surface.

Another approach is disclosed in U.S. Patent Application Publication No. 2007/0107935 to Hash et al., also assigned to the assignee of the present application, Harris Corporation of Melbourne, Fla., the entire contents of which are incorporated by reference herein. Hash et al. discloses a method for fabricating contact pads within the edge surface of the first circuit board. The edge surface contact pads are coupled with the contact pads of the second circuit board. The method comprises drilling vias into each individual layer of the multi-layer circuit board, filling each via with an electrically conductive material (providing cylinders within the layer), and milling the layer to bisect the cylinders. One drawback of the Hash et al. method is the expense per unit for manufacturing may be high. Moreover, the vias for each of the layers need to be accurately aligned, adding a possible drawback to robust fabrication.

›SUMMARY OF THE INVENTION

In view of the foregoing background, it is therefore an object of the present invention to provide a method for making a printed wiring board (PWB) assembly that is cost effective and efficiently manufactured.

This and other objects, features, and advantages in accordance with the present invention are provided by a method that may include forming a first PWB having a plurality of first electrically conductive pads, forming a second PWB including a plurality of electrically conductive traces having exposed ends on an edge surface of the second PWB, and covering the edge surface of the second PWB with an electrically conductive layer. The method may also include selectively removing portions of the electrically conductive layer to define a plurality of second electrically conductive pads electrically connected to corresponding ones of the exposed ends of the electrically conductive traces, and assembling the first and second PWBs together so that the first and second electrically conductive pads are electrically coupled together to define the PWB assembly. Advantageously, the PWB assembly may use less packaging and may be more efficiently manufactured.

In some embodiments, selectively removing portions of the electrically conductive layer may comprise selective laser removal. In other embodiments, selectively removing portions of the electrically conductive layer may comprise selective chemical removal. In yet other embodiments, selectively removing portions of the electrically conductive layer may comprise selective mechanical removal. Moreover, the edge surface of the second PWB may have a planar shape, and at least the second PWB may comprise a multilayer PWB.

Furthermore, forming the first PWB may comprise forming the first PWB to have the plurality of first electrically conductive pads on a major surface thereof and so that the assembled first and second PWBs are inclined relative to one another. Forming the second PWB may also comprise forming the exposed ends of the electrically conductive traces so that each has an enlarged width and a same thickness relative to adjacent portions of the corresponding electrically conductive trace.

More specifically, the first and second electrically conductive pads may be arranged in a pattern to define a series of parallel strips. Alternatively or additionally, the first and second electrically conductive pads may be arranged in a pattern to define at least one coaxial connection. Additionally, the first electrically conductive pads may have different sizes, and adjacent ones of the second electrically conductive pads may have corresponding sizes, in other words, matching sizes.

Another aspect is directed to a PWB assembly that may include a first PWB comprising a plurality of first electrically conductive pads, and a second PWB comprising a plurality of electrically conductive traces having exposed ends on an edge surface of the second PWB. The exposed ends may each have an enlarged width and a same thickness relative to adjacent portions of the corresponding electrically conductive trace. The second PWB may also include a plurality of second electrically conductive pads on the edge surface and electrically connected to corresponding ones of the exposed ends. The first and second PWBs may be assembled together so that the first and second electrically conductive pads are electrically coupled together to define the PWB assembly.

›BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flowchart illustrating a method for making a PWB assembly according to the present invention.

FIG. 2 is a schematic cross-sectional view of a PWB assembly made according to the method of FIG. 1 .

FIG. 3 is a schematic perspective end view of the second PWB shown in FIG. 2 according to the present invention.

FIG. 4 is a schematic perspective view of another embodiment of the second PWB of the PWB assembly according to the present invention.

FIG. 5 is a schematic perspective view of yet another embodiment of the second PWB of the PWB assembly according to the present invention.

FIG. 6 is a schematic perspective view of still another embodiment of the second PWB of the PWB assembly according to the present invention.

›DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS · 1 of 2

The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout, and multiple prime notation is used to indicate similar elements in alternative embodiments.

Referring initially to FIGS. 1-3 , a flowchart 20 illustrates a method for making a printed wiring board (PWB) assembly 51 that begins at Block 21 . The method illustratively includes at Block 23 forming a first PWB 50 having a plurality of first electrically conductive pads 53 a - 53 d . The first electrically conductive pads 53 a - 53 d (only two of which are visible in FIG. 2 , for clarity of explanation) are illustratively formed on a major surface 55 of the first PWB 50 .

At Block 25 , the method also illustratively includes forming a second PWB 40 including a plurality of electrically conductive traces 43 a - 43 d (only two of which are visible in FIG. 2 , for clarity of explanation) having exposed ends 42 a - 42 d on an edge surface 44 of the second PWB. The exposed ends 42 a - 42 d illustratively have an enlarged width and a same thickness relative to adjacent portions of the corresponding electrically conductive trace 43 a - 43 d . The enlarged width of the exposed ends 42 a - 42 d provides advantage over the milled cylinder ends of the prior art, for example, as in U.S. Patent Application Publication No. 2007/0107935 to Hash et al.

The edge surface 44 of the second PWB 40 is illustratively planar in shape. The first PWB 50 and the second PWB 40 each illustratively comprise a multi-layer circuit board including a plurality of dielectric layers 45 and conductive trace layers 43 a - 43 d therebetween. Alternatively, the first PWB 50 may comprise a single/simple layer circuit board. In other words, at least the second PWB 40 comprises a multi-layer PWB. Moreover, circuitry 54 is mounted on the second PWB 40 and the first PWB 50 .

The method also illustratively includes at Block 27 covering the edge surface 44 of the second PWB 40 with an electrically conductive layer, for example, a copper layer. The covering of the edge surface 44 may comprise, for example, plating, or deposition. The method illustratively includes at Block 30 selectively removing portions of the electrically conductive layer to define a plurality of second electrically conductive pads 41 a - 41 d electrically connected to corresponding ones of the exposed ends 42 a - 42 d of the electrically conductive trace 43 a - 43 d . Additionally, the first electrically conductive pads 53 a - 53 d may have different sizes, and adjacent ones of the second electrically conductive pads 41 a - 41 d may have corresponding sizes.

The selective removal of the electrically conductive layer may comprise, for example, selective laser removal (laser ablation), selective chemical removal (chemical etching), or selective mechanical removal (milling). The laser ablation may be provided by a laser milling device, for example, as manufactured by the Micron Laser Corporation of Hillsboro, Oreg. As will be appreciated by those skilled in the art, other methods of selective removal may be used. Advantageously, the laser ablation removal of the electrically conductive layer may be cost effective and readily available. Moreover, since the removal step is performed on the complete second PWB 40 , there are no alignment issues between second electrically conductive pads 41 a - 41 d.

Moreover, laser ablation is accurate, for example, providing laser cutting geometries down to 0.002 inches. Laser ablation is also flexible in the shaping of the electrically conductive layer, for example, providing compatibility with a plurality of baseline interconnect technologies.

The method also illustratively includes at Block 32 assembling the first 50 and second 40 PWBs together so that the first 53 a - 53 d and second 41 a - 41 d electrically conductive pads are electrically coupled together to define the PWB assembly 51 . Since the first electrically conductive pads 53 a - 53 d are on the major surface 55 of the first PWB 50 and the second electrically conductive pads 41 a - 41 d are formed on the edge surface 44 of the second PWB 40 , the first and second PWBs, when assembled, are illustratively inclined at an angle to each other, for example, 90 degrees. Alternatively, the first 50 and second 40 PWBs may be assembled edge-to-edge, i.e. the first PWB would also include electrically conductive pads on its edge surface. The method ends at Block 34 .

Referring now to FIG. 4 , another embodiment of the second PWB 40 ′ is now described. In this embodiment of the second PWB 40 ′, those elements already discussed above with respect to FIGS. 2-3 are given prime notation and most require no further discussion herein. This embodiment differs from the previous embodiment in that the second PWB 40 ′ includes the second electrically conductive pads 41 a ′- 41 i ′ being arranged in a pattern to define a series of parallel strips that wrap around the top and bottom of the edge surface 44 ′. The series of parallel strips are at a 0.5 mm pitch.

Referring now to FIG. 5 , another embodiment of the second PWB 40 ″ is now described. In this embodiment of the second PWB 40 ″, those elements already discussed above with respect to FIGS. 2-3 are given double prime notation and most require no further discussion herein. This embodiment differs from the previous embodiment in that the second PWB 40 ″ includes the second electrically conductive pads 41 a ″- 41 b ″ being arranged to define a coaxial connection, for example, a coaxial launch.

Referring now to FIG. 6 , another embodiment of the second PWB 40 ′″ is now described. In this embodiment of the second PWB 40 ′″, those elements already discussed above with respect to FIGS. 2-3 are given triple prime notation and most require no further discussion herein. This embodiment differs from the previous embodiment in that the second PWB 40 ′″ includes the second electrically conductive pads 41 a ′″- 41 b ′″ being arranged to define an antenna for the circuitry carried by the second PWB.

›DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS · 2 of 2

Many modifications and other embodiments of the invention will come to the mind of one skilled in the art having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is understood that the invention is not to be limited to the specific embodiments disclosed, and that modifications and embodiments are intended to be included within the scope of the appended claims.

Claims as granted

23 claims

Log in to read the claims of this application.

Log in to unlock

Classifications

7 codes
IPC · International Patent Classification
Section H — Electricity
  • H05K1/02
  • H05K3/36
  • H05K3/40
  • H05K3/30
  • H05K1/14
  • H05K1/11
USPC · US Patent Classification
174/250

Claim changes

Soon
Coming soonHow the claims changed between publication and grant

See which claims were amended, added or cancelled during examination, with every added and removed word marked.

AmendedAddedCancelledUnchanged

The published claims of this application are not paired with the granted ones in what we hold.

File wrapper

⤢ drag to zoomJul 2013Oct 2013Jan 2014Apr 2014Jul 2014Oct 2014Jan 2015Apr 2015USPTOApplicantRestriction requirementNotice of allowance
USPTOApplicanthover for detail · click to open
Pendency
1.7 y
623 days filing → grant
Office actions
0
after a restriction
Responses
2
no RCE
Examiner
Jenny L Wagner
art unit 2848 · TC 2800
Citations: 23 back · 1 forward

See the full prosecution history — every USPTO and applicant action on this file, in order.

Log in to unlock

Documents

Log in to open the documents of this file: the application as filed, every office action and response, the notice of allowance.

Log in to unlock

Chain of title

⤢ drag to zoom2016201820202022202420262028203020322034Owner 1
Titlehover for detail · click to open

See the full assignment history — every owner this patent has passed through, with recordation dates and reel/frame numbers.

Log in to unlock