Disk drive adjusting state estimator to compensate for unreliable servo data
Granted 9 Sep 2014 · no office action yet
Current assignee: WESTERN DIGITAL TECHNOLOGIES · originally Western Digital
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Attorney: Attorney · Log in to unlock
Inventors: Yanan Huang, Aswartha Narayana · Examiner: Wayne Young · AU 2688 · TC 2600
Life of the application
16 dated eventsAbstract
A disk drive is disclosed comprising a disk comprising tracks defined by servo sectors, a head, and control circuitry comprising a servo control system operable to actuate the head over the disk based on the servo sectors. An estimated acceleration EstAccel of the head over the disk is generated based on at least one of the servo sectors. When the EstAccel is determined to be reliable, an estimated velocity EstVel of the head over the disk is generated based on the EstAccel. When the EstAccel is determined to be unreliable, the EstAccel is adjusted to generate an adjusted acceleration AdjAccel and the EstVel of the head over the disk is generated based on the AdjAccel.
Description
5 parts›CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims priority to provisional U.S. Patent Application Ser. No. 61/829,108, filed on May 30, 2013, which is hereby incorporated by reference in its entirety.
›BACKGROUND
Disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and servo sectors. The servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the actuator arm as it seeks from track to track.
FIG. 1 shows a prior art disk format 2 as comprising a number of servo tracks 4 defined by servo sectors 6 0 - 6 N recorded around the circumference of each servo track. Each servo sector 6 , comprises a preamble 8 for storing a periodic pattern, which allows proper gain adjustment and timing synchronization of the read signal, and a sync mark 10 for storing a special pattern used to symbol synchronize to a servo data field 12 . The servo data field 12 stores coarse head positioning information, such as a servo track address, used to position the head over a target data track during a seek operation. Each servo sector 6 , further comprises groups of servo bursts 14 (e.g., N and Q servo bursts), which are recorded with a predetermined phase relative to one another and relative to the servo track centerlines. The phase based servo bursts 14 provide fine head position information used for centerline tracking while accessing a data track during write/read operations.
›BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows a prior art disk format comprising a plurality of servo tracks defined by servo sectors.
FIG. 2A shows a disk drive comprising a head actuated over a disk by control circuitry comprising a servo control system.
FIG. 2B is a flow diagram according to an embodiment wherein when an estimated acceleration (EstAccel) of the head based on the servo sectors is unreliable, the EstAccel is adjusted in order to generate an estimated velocity (EstVel).
FIG. 3 is a flow diagram wherein when a current EstAccel is determined to be unreliable, a weighting of the current EstAccel is reduced when computing the EstVel.
FIG. 4A shows an embodiment for adjusting the EstAccel based on a deviation in magnitude of the EstAccel.
FIG. 4B is a flow diagram according to an embodiment wherein when the EstAccel is unreliable, the current and subsequent values of the EstAccel are weighted to generate the EstVel.
›DETAILED DESCRIPTION · 1 of 2
FIG. 2A shows a disk drive according to an embodiment comprising a disk 16 comprising tracks 18 defined by servo sectors 20 0 - 20 N , a head 22 , and control circuitry 24 comprising a servo control system operable to actuate the head 22 over the disk 16 based on the servo sectors 20 0 - 20 N . The control circuitry 24 is operable to execute the flow diagram of FIG. 2B , wherein an estimated acceleration EstAccel of the head over the disk is generated based on at least one of the servo sectors (block 26 ). Whether the EstAccel is unreliable due to an unreliable servo sector is determined. When the EstAccel is determined to be reliable (block 28 ), an estimated velocity EstVel of the head over the disk is determined based on the EstAccel (block 30 ). When the EstAccel is determined to be unreliable (block 28 ), the EstAccel is adjusted to generate an adjusted acceleration AdjAccel (block 32 ) and the EstVel of the head over the disk is generated based on the AdjAccel (block 34 ).
In the embodiment of FIG. 2A , the control circuitry 24 processes a read signal 36 emanating from the head 22 to demodulate the servo sectors 20 0 - 20 N and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target track. The control circuitry 24 filters the PES using a suitable compensation filter to generate a control signal 38 applied to a voice coil motor (VCM) 40 which rotates an actuator arm 42 about a pivot in order to actuate the head 22 radially over the disk 16 in a direction that reduces the PES. The servo sectors 20 0 - 20 N may comprise any suitable head position information, such as a track address for coarse positioning and servo bursts for fine positioning. The servo bursts may comprise any suitable pattern, such as an amplitude based servo pattern or a phase based servo pattern.
In one embodiment, when the control circuitry 24 seeks the head 22 across the disk 16 to access a target track, a velocity of the head 22 is estimated based on the servo sectors 20 0 - 20 N . The estimated velocity (EstVel) may be compared to a target velocity of a velocity profile to generate a state error, and the state error may be processed using a suitable compensator to generate the control signal 38 applied to the VCM 40 . In one embodiment, the EstVel may be generated based on an estimated acceleration (EstAccel) of the head, where the EstAccel of the head may be generated based on position measurements taken when reading the servo sectors during a seek operation. For example, the EstAccel may be generated based on:
EstAccel[ k ]=Pos[ k ]−2Pos[ k− 1]+Pos[ k− 2]
where Pos[k] represents a position of the head at servo sector k as determined from reading servo sector k. However, a defect in a servo sector may result in an error in the position measurement Pos[k], and a corresponding error in the EstAccel. In one embodiment, a defect in a servo sector may render the servo sector unrecoverable, in which case the corresponding Pos[k] may be generated by a state estimator. Accordingly, an unreliable servo sector may be a recoverable servo sector that generates a noisy Pos[k] measurement, or an unreliable servo sector may be an unrecoverable servo sector.
In one embodiment, the EstAccel may be determined to be unreliable due to an unreliable servo sector by detecting when the change in the EstAccel exceeds a threshold. That is, if the difference between a current EstAccel and a previous EstAccel exceeds a threshold X1, it is determined that the current EstAccel is likely unreliable. In one embodiment, the threshold X1 is selected based on a known acceleration limit of the VCM 40 . That is, if the EstAccel changes by an amount that is near the acceleration limit of the VCM 40 , then the current EstAccel is determined to be unreliable. In one embodiment, when the current EstAccel is determined to be unreliable, a weighting of the current EstAccel is reduced when computing the EstVel.
This embodiment is understood with reference to the flow diagram of FIG. 3 , wherein an EstAccel[1] is generated based on the servo sectors (block 44 ), such as using the above equation. An EstAccel[2] is then generated at the next servo sector (block 46 ), and a difference AccelDiff between the EstAccel[1] and EstAccel[2] is generated (block 48 ). When the AccelDiff does not exceed a threshold X1 (block 50 ), the EstVel is updated (block 52 ) based on the EstAccel[2]. When the AccelDiff exceeds the threshold X1 (block 50 ), the AdjAccel is generated based on EstAccel[1] plus a function of AccelDiff (block 54 ), where the function reduces a weighting of EstAccel[2] when updating EstVel based on the AdjAccel (block 56 ).
Any suitable function of AccelDiff may be employed at block 54 of FIG. 3 in order to reduce the weighting of EstAccel[2] when computing the AdjAccel used to update the EstVel. FIG. 4A illustrates an example function according to an embodiment, wherein a delay element 58 stores a previous acceleration estimate 60 which is subtracted from a current acceleration estimate EstAccel[k] to generate the AccelDiff 62 . Block 64 implements a non-linear function of AccelDiff 62 , and when AccelDiff is less than threshold X1, the output 66 of block 64 equals AccelDiff 62 so that an Accel signal 68 is generated as EstAccel[2]. When AccelDiff exceeds the threshold X1, a weighting factor K1 scales the AccelDiff in order to reduce the weighting of EstAccel[2] when generating the Accel signal 68 based on:
Accel[ k ]=EstAccel[ k− 1]+sign(AccelDiff)·( X 1+((abs(AccelDiff)− X 1)· K 1)).
Any suitable weighting factor K1 may be employed to reduce the weighting of the current EstAccel[k] when updating the EstVel, wherein in one embodiment the weighting factor K1 is selected to maintain adequate seek performance without losing stability while gliding through one or more defective servo sectors.
FIG. 4B is a flow diagram according to an embodiment that expands on the flow diagram of FIG. 3 , wherein when the AccelDiff is less than the threshold X1 (block 50 ), the Accel signal 68 ( FIG. 4A ) is generated as EstAccel[2] (block 70 ). When the AccelDiff is greater than a second threshold X2 (block 72 ) as shown in FIG. 4A , it is assumed that EstAccel[2] is completely unreliable and therefor the Accel signal 68 is generated as a function of the control signal 38 applied to the VCM 40 (block 74 ). For example, the acceleration of the VCM 40 may be estimated based on the control signal 38 and a predetermined nominal response of the VCM 40 to the control signal 38 based on nominal design parameters, such as the torque constant of the VCM 40 . When the AccelDiff is between the threshold X1 and the threshold X2 shown in FIG. 4A , the AdjAccel is generated based on the above equation (block 76 ), and the Accel signal 68 is assigned to the AdjAccel (block 78 ). The EstVel of the head over the disk is then generated (block 80 ) based on:
›DETAILED DESCRIPTION · 2 of 2
EstVel[ k ]=(((Accel+EstVel[ k −1])·( N −α))+((Pos[ k ]−Pos[ k− 1])·α))/ N
where N is a constant integer, α is a variable integer, Pos[k−1] represents a position of the head at servo sector k−1 as determined from reading servo sector k−1, and Pos[k] represents a position of the head at servo sector k as determined from reading servo sector k.
In one embodiment, when the estimated acceleration of the head over the disk is changing slowly such that the AccelDiff is less than the threshold X1 in FIG. 4A , the variable integer α is incremented until reaching N. For example, in one embodiment N=4 such that when AccelDiff is less than the threshold X1 for more than four consecutive servo sectors, the EstVel is generated in the above equation based only on Pos[k]−Pos[k−1]. That is, when the estimated acceleration is changing slowly, the EstVel may be generated reliably as the change in position of the head over time. When AccelDiff is greater than the threshold X1, the variable integer α is reset to zero so that the EstVel is generated in the above equation based only on Accel+EstVel[k−1]. When AccelDiff falls back below the threshold X1, the variable integer α is incremented at each servo sector such that the EstVel is generated based both on the Accel signal 68 as well as Pos[k]−Pos[k−1], with more weight given to Pos[k]−Pos[k−1] at each new servo sector until α=4.
Any suitable control circuitry may be employed to implement the flow diagrams in the above embodiments, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain operations described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into a SOC.
In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.
The various features and processes described above may be used independently of one another, or may be combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of this disclosure. In addition, certain method, event or process blocks may be omitted in some implementations. The methods and processes described herein are also not limited to any particular sequence, and the blocks or states relating thereto can be performed in other sequences that are appropriate. For example, described tasks or events may be performed in an order other than that specifically disclosed, or multiple may be combined in a single block or state. The example tasks or events may be performed in serial, in parallel, or in some other manner. Tasks or events may be added to or removed from the disclosed example embodiments. The example systems and components described herein may be configured differently than described. For example, elements may be added to, removed from, or rearranged compared to the disclosed example embodiments.
While certain example embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions disclosed herein. Thus, nothing in the foregoing description is intended to imply that any particular feature, characteristic, step, module, or block is necessary or indispensable. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions disclosed herein.
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