Soft-start time control circuit

1. Technical Field

The exemplary disclosure generally relates to control circuits, and particularly to a time control circuit for direct current (DC) power supply which allows a gradual application of electrical power.

2. Description of Related Art

A DC power supply experiences an extremely large transient current at a time when the DC power supply turns on. A soft-start circuit is usually connected to an input terminal of the DC power supply to prevent the DC power supply from being damaged by the large transient current. When the DC power supply works as input power of a test circuit, the test circuit usually has a particular need for a soft-start of the DC power supply. If the soft-starting time of the DC power supply does not match the requirement of test circuit, performance of the test circuit will be affected.

Therefore, there is room for improvement within the art.

Many aspects of the embodiments can be better understood with reference to the drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the disclosure.

FIG. 1 shows a schematic functional block diagram of an exemplary embodiment of a soft-start time control circuit for controlling a soft-start time of a DC power supply.

FIG. 2 shows a schematic circuit diagram of an exemplary embodiment of a first drive circuit of the soft-start time control circuit shown in FIG. 1 .

FIG. 3 shows a schematic circuit diagram of an exemplary embodiment of a second drive circuit of the soft-start time control circuit shown in FIG. 1 .

FIG. 4 shows a schematic circuit diagram of an exemplary embodiment of a first gating circuit of the soft-start time control circuit shown in FIG. 1 .

FIG. 5 shows a schematic circuit diagram of an exemplary embodiment of a second gating circuit of the soft-start time control circuit shown in FIG. 1 .

FIG. 1 shows a schematic functional block diagram of an exemplary embodiment of a soft-start time control circuit 100 for controlling a period of time (soft-start time) within which a DC power supply 200 gradually outputs full power from a start level which is close to zero volts. The control circuit 100 includes a controller 10 , a first drive circuit 20 , a digital potentiometer 30 , an input unit 40 , and a display 50 . The input unit 40 is capable of inputting a desired value of the soft-start time of the DC power supply 200 .

The controller 10 is electronically connected to the digital potentiometer 30 , the input unit 40 , and the display 50 . The controller 10 receives the desired value of the soft-start time of the DC power supply 200 , displays the desired value on the display 50 , and regulates resistance of the digital potentiometer 30 which is connected to the first drive circuit 20 according to a value of the desired soft-start time.

FIG. 2 shows a circuit diagram of the first drive circuit 20 of the soft-start time control circuit 100 shown in FIG. 1 . The first drive circuit 20 includes a first driver 21 , a first metal-oxide-semiconductor field-effect transistor (MOSFET) M 1 , a first charge capacitor C 1 , two filtering capacitors C 2 -C 3 , a first current detection resistor R 1 , a first voltage dividing resistor R 2 , and a second voltage dividing resistor R 3 . The first current detection resistor R 1 is electronically connected between an output of the DC power supply 200 and a drain d 1 of the first MOSFET M 1 . In the exemplary embodiment, the first current detection resistor R 1 is electronically connected to the DC power supply 200 via a first gating circuit 70 (described below). A source s 1 of the first MOSFET M 1 is grounded via the filtering capacitor C 3 , and a node between the source s 1 and the filtering capacitor C 3 is electronically connected to a load (not shown), to output an output voltage Vout from the DC power supply 200 . A node between the first current detection resistor R 1 and the output of the DC power supply is grounded via the filtering capacitor C 2 . The first and second voltage dividing resistors R 2 and R 3 are connected in series between the output of the DC power supply 200 and ground.

The first driver 21 outputs a drive current to switch on the first MOSFET M 1 . The first driver 21 includes an enable pin EN, a power pin VCC, a current detection pin SENSE, a drive pin GATE, and an output pin OUT. The enable pin EN is electronically connected between the first and second voltage dividing resistors R 2 and R 3 ; the power pin VCC and the current detection pin SENSE are electronically connected to the two terminals of the first current detection resistor R 1 ; the drive pin GATE is electronically connected to the gate g 1 of the first MOSFET M 1 via the digital potentiometer 30 ; and the output pin OUT is electronically connected to a node between the source s 1 of the first MOSFET M 1 and the filtering capacitor C 3 . The current detection pin SENSE of the first driver 21 cooperates with the first current detection resistor R 1 to detecting an output current of the DC power supply 200 . A node between the digital potentiometer 30 and the gate g 1 of the first MOSFET M 1 is grounded via the first charge capacitor C 1 .

The digital potentiometer 30 includes a clock pin SCL, a date pin SDA, two wiper pins VW 0 and VW 1 , two first connection pins VH 0 and VH 1 , two second connection pins VL 0 and VL 1 , and four address pins A 0 -A 3 . The mode of connecting the clock pin SCL, the data pin SDA, and the address pins A 0 -A 3 to the controller 10 is well-known, thus the connection circuits between the clock pin SCL, the data pin SDA, the address pins A 0 -A 3 and the controller 10 are not shown in FIGS. 1-5 . The controller 10 transmits control signals to the digital potentiometer 30 via the clock pin SCL and the data pin SDA, and controls the address pins A 0 -A 3 to choose different potentiometers to be controlled. For example, when the programming of the address pins A 0 -A 3 is “0000”, a first potentiometer of the digital potentiometer 30 is chosen; when the programming of the address pins A 0 -A 3 is “0001”, a second potentiometer of the digital potentiometer 30 is chosen. The first potentiometer is electronically connected to the wiper pin VW 0 , the first connection pin VH 0 , and the second connection pin VL 0 ; and the second potentiometer is electronically connected to the wiper pin VW 1 , the first connection pin VH 1 , and the second connection pin VL 1 . The wiper pin VW 0 and the second connection pin VL 0 are electronically connected to the gate g 1 of the first MOSFET M 1 and the drive pin GATE of the first driver 21 respectively; and the first connection pin VH 0 is not connected.

When the DC power supply 200 is switched on, the enable pin EN of the first driver 21 switches to high to enable the first driver 21 . The first driver 21 outputs current from the drive pin GATE to charge the first charge capacitor C 1 via the first potentiometer of the digital potentiometer 30 . The voltage of the first charge capacitor C 1 is increased as the first drive 21 charges the first charge capacitor C 1 , until the first MOSFET M 1 is switched on. In the exemplary embodiment, when the first charge capacitor C 1 is fully charged, a voltage on the first charge capacitor C 1 drives the first MOSFET M 1 to switch on, and the output voltage Vout of the DC power supply 200 is output through the first MOSFET M 1 . A charge time constant T 1 of the first charge capacitor C 1 can be calculated by a formula: T 1 =R*C, where R is a resistance of the digital potentiometer 30 , and C is a capacitance of the first charge capacitor C 1 . The first charge capacitor C 1 is fully charged when a charge time of the first capacitor C 1 reaches to the charge time constant T 1 . That is, the charge time constant T 1 is the soft-start time of the DC power supply 200 . When the charge time constant T 1 of the first charge capacitor C 1 is changed, that is, when a charge speed of the first charge capacitor C 1 is changed, a switch-off duration of the first MOSFET M 1 will be changed accordingly. Thus, in use, the controller 10 calculates a resistance R according to different soft-start times input by the input unit 40 and the formula T 1 =R*C, and regulates the resistance of the first potentiometer of the digital potentiometer 30 , thereby controlling the soft-start time of the DC power supply 200 .

In the exemplary embodiment, the output voltage Vout range of the DC power supply 200 is 2.5V-80V. Since an input voltage of the first driver 21 in the exemplary embodiment is in a range of 2.5V-18V, thus when an input voltage of the first driver 21 is higher than 18V, the first driver 21 is unable to work. Thus, in one embodiment, the soft-time control circuit 100 further includes a second drive circuit 60 , a first gating circuit 70 , and a second gating circuit 80 .

FIG. 3 shows a circuit diagram of the second drive circuit 60 of the soft-start time control circuit 100 shown in FIG. 1 . The second drive circuit 60 includes a second driver 61 , a second MOSFET M 2 , a second charge capacitor C 4 , two filtering capacitor C 5 -C 6 , a second current detection resistor R 4 , a third voltage dividing resistor R 5 , a fourth voltage dividing resistor R 6 , and a fifth voltage dividing resistor R 7 . The second current detection resistor R 4 is electronically connected between the output of the DC power supply 200 and a drain d 2 of the second MOSFET M 2 . In the exemplary embodiment, the second current detection resistor R 4 is electronically connected to the DC power supply 200 via the second gating circuit 80 . A source s 2 of the second MOSFET M 2 is grounded via the filtering capacitor C 6 , and a node between the source s 2 and the filtering capacitor C 6 outputs the output voltage Vout of the DC power supply to the load. A node between the second current detection resistor R 4 and the output of the DC power supply 200 is grounded via the filtering capacitor C 5 . The third to fifth voltage dividing resistors R 5 -R 7 are connected in series between the output of the DC power supply and ground. The second driver 61 outputs drive current to the gate g 2 of the second MOSFET M 2 to switch on the second MOSFET M 2 . In one embodiment, an input voltage of the second driver 61 is in a range of 9V-80V. The second driver 61 includes an enable pin EN, a power pin VCC, a current detection pin SENSE, a drive pin GATE, an output pin OUT, and an over-voltage detection pin OV. The enable pin EN is electronically connected to a node between the third and fourth voltage dividing resistors R 5 and R 6 ; the over-voltage detection pin OV is electronically connected to a node between the fourth and fifth voltage dividing resistors R 6 and R 7 ; the power pin VCC and the current detection pin SENSE are electronically connected to two terminals of the second current detection resistor R 4 ; the drive pin GATE is electronically connected to the second connect connection PIN VL 1 ; and the output pin OUT is electronically connected to a node between the source s 2 of the second MOSFET M 2 and the filtering capacitor C 6 . A gate g 2 of the second MOSFET M 2 is electronically connected to the wiper pin VW 1 of the digital potentiometer 30 , and a node between the gate g 2 and the wiper pin VW 1 of the digital potentiometer 30 is grounded via the second charge capacitor C 4 .

The second driver 61 outputs current to charge the second charge capacitor C 4 via the digital potentiometer 30 , and when the second charge capacitor C 4 is fully charged, the second MOSFET M 2 is switched on, and the output voltage Vout of the DC power supply 200 is output via the second MOSFET M 2 . A charge time constant T 2 of the second charge capacitor C 4 is calculated by a formula: T 2 =R*C, where R is a resistance of the digital potentiometer 30 , and C is a capacitance of the second charge capacitor C 4 . The second charge capacitor C 4 is fully charged when a charge time of the second capacitor C 4 reaches the charge time constant T 2 .

FIG. 4 shows a circuit diagram of an embodiment of the first gating circuit 70 of the soft-start time control circuit shown 100 in FIG. 1 . FIG. 5 shows a circuit diagram of an embodiment of the second gating circuit 80 of the soft-start time control circuit shown 100 in FIG. 1 . The first gating circuit 70 is electronically connected to the controller 10 , to the DC power supply 200 , and to the first drive circuit 20 . The second gating circuit 80 is electronically connected to the controller 10 , to the DC power supply 200 , and to the second drive circuit 60 . The input unit 40 is further capable of inputting the output voltage Vout of the DC power supply 200 . The controller 10 determines whether output voltage Vout is in a first range (such as 2.5V-17V for example) or in a second range (such as 17V-80V for example), and controls the first and second gating circuits 70 and 80 to connect one of the first and second drive circuits 20 and 60 to the DC power supply 200 , according to the determination.

The first gating circuit 70 includes a relay K 1 . The relay K 1 includes a first control terminal 1 , a second control terminal 2 , an input terminal 3 , an output terminal 4 , and a coil L electronically connected between the first and second control terminals 1 and 2 . The controller 10 includes a first control pin P 1 and a second control pin P 2 . The first control terminal 1 of the relay K 1 is electronically connected to the first control pin P 1 ; the second control terminal 2 is grounded; the input terminal 3 is electronically connected to the DC power supply 200 , and the output terminal 4 is electronically connected to the first drive circuit 20 . The controller 10 switches the relay K 1 to make the electric connection between the DC power supply 200 and the first drive circuit 20 .

In detail, the first gating circuit 70 further includes a common emitter NPN type bipolar junction transistor (BJT) Q 1 , a common emitter PNP type BJT Q 2 , a first biasing circuit (not labeled), a second biasing circuit (not labeled), a discharge diode D 1 , and a filtering capacitor C 7 . An input of the common emitter NPN type BJT Q 1 is electronically connected to the controller 10 , an output of the BJT Q 1 is electronically connected to an input of the common emitter PNP type BJT Q 2 , and an emitter e 1 of the BJT Q 1 is grounded. An output of the BJT Q 2 is electronically connected to the first control terminal 1 of the relay K 1 via a resistor R 12 , and an emitter e 2 of the BJT Q 2 is electronically connected to a power supply, such as a +5V power supply for example. The first biasing circuit includes two resistors R 8 and R 9 connected in series between the first control pin P 1 of the controller 10 and ground. A base b 1 of the BJT Q 1 is electronically connected to a node between the two resistors R 8 and R 9 . The second biasing circuit includes two resistors R 10 and R 11 connected in series between the +5V power supply and a collector cl of the BJT Q 1 . A base b 2 of the BJT Q 2 is electronically connected to a node between the two resistors R 10 and R 11 . The filtering capacitor C 7 is electronically connected between the +5V power supply and ground. An anode of the discharge diode D 1 is electronically connected to the first control terminal 1 of the relay K 1 , and a cathode of the discharge diode D 1 is electronically connected to the second control terminal 2 of the relay K 1 ; the discharge diode D 1 discharges the coil L when the relay K 1 is opened.

When the controller 10 outputs a high voltage signal (e.g. logic 1) to the base b 1 of the BJT Q 1 , the BJT Q 1 is switched on, and the BJT Q 2 is also switched on. At this time, a current output from the +5V power supply flows to the coil L via the BJT Q 2 , to drive the input terminal 3 to connect to the output terminal 4 , thereby connecting the DC power supply 200 to the first drive circuit 20 . Alternatively, when the controller 10 outputs a low voltage signal (e.g. logic 0) to the base b 1 of the BJT Q 1 , the BJT Q 1 is switched off, and the BJT Q 2 is also switched off. At this time, the coil L of the relay K 1 is disconnected from the +5V power supply, and the input terminal 3 is disconnected from the output terminal 4 , thereby disconnecting the DC power supply 200 from the first drive circuit 20 .

The second gating circuit 80 has the same components and electronic connections relationship as the components and electronic connections relationship of the first gating circuit 70 , and differs from the first gating circuit 70 only in that the output terminal 4 of the relay K 1 of the second gating circuit 80 is electronically connected the second drive circuit 60 , and the base b 1 of the BJT Q 3 of the second gating circuit 80 is electronically connected to a second control pin P 2 of the controller 10 .

In use, the working process of the soft-start time control circuit 10 can be carried out by, but is not limited to the following steps. The input unit 40 inputs the desired soft-start time and the value of the output voltage Vout of the DC power supply 200 to the controller 10 . The controller 10 determines whether the output voltage Vout of the DC power supply 200 is in the first range or in the second range. If the output voltage Vout is in the first range, the controller 10 calculates the resistance of the first potentiometer of the digital potentiometer 30 according to the soft-start time and the capacitance of the first charge capacitor C 1 , and regulates the first potentiometer to the calculated resistance. After that, the controller 10 closes the relay K 1 of the first gating circuit 70 , and opens the relay K 1 of the second gating circuit 80 . Such that, when the first capacitor C 1 is fully charged, the output voltage Vout of the DC power supply 100 is output to the load via the first gating circuit 70 and the first drive circuit 20 . Alternatively, if the output voltage Vout is in the second range, the controller 10 calculates the resistance of the second potentiometer of the digital potentiometer 30 according to the soft-start time and the capacitance of the second charge capacitor C 2 , and regulates the second potentiometer to the calculated resistance. After that, the controller 10 closes the relay K 1 of the second gating circuit 80 , and opens the relay K 1 of the first gating circuit 70 . Such that, when the second charge capacitor C 2 is fully charged, the output voltage Vout of the DC power supply 100 is output to the load via the second gating circuit 80 and the second drive circuit 60 .

It is believed that the exemplary embodiments and their advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the disclosure or sacrificing all of its material advantages, the examples hereinbefore described merely being preferred or exemplary embodiments of the disclosure.