Radio frequency input circuit with ESD protection function

This application claims the priority of Korean Patent Application No. 10-2012-0134754 filed on Nov. 26, 2012, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.

1. Field of the Invention

The present invention relates to a radio frequency input circuit with an electrostatic discharge (ESD) protection function, for use in telecommunications devices.

2. Description of the Related Art

In general, cases in which an electrostatic discharge (ESD) having a high electric potential is instantaneously introduced into a portable telecommunications device (hereinafter, referred to as telecommunications devices) such as a smart phone through input terminals as users frequently contact portable devices, and thus, portable devices need to have an ESD protection function.

In existing telecommunications devices, a radio frequency input circuit includes an ESD protection circuit provided between a connection node between an input terminal and a DC blocking capacitor, and a ground.

In a case in which an ESD voltage is input through the input terminal, the ESD protection circuit forms a discharge path for the ESD voltage to allow the ESD voltage to flow to the ground. This operation may protect the DC blocking capacitor from the ESD voltage.

In this regard, the ESD protection circuit includes a forward diode circuit unit including a plurality of diodes connected to each other in series in a forward direction to form an ESD protection path for a positive (+) ESD voltage and a backward diode circuit unit including a plurality of diodes connected to each other in series in a backward direction to form an ESD protection path for a negative H) ESD voltage.

However, there may be a problem such as increasing a size of an ESD protection circuit according to the related art, since the higher the voltage level of an input signal becomes, the more the number of the diodes need to be connected to each other in series in such a manner that the ESD protection circuit does not operate at a voltage of the input signal but only operates at the ESD voltage.

Also, parasitic capacitance may occur to correspond to the number of diodes used for the ESD protection circuit, and thus, impedance mismatching is likely to occur, and an additional protection circuit is problematically necessary for compensating for the impedance mismatching.

The Related Art document below relates to a noise filter and a noise filter embedded amplifier circuit and does not disclose the matter for improving a defect in that the higher the voltage level of the input signal becomes, the more the size thereof increases.

Korean Patent Laid-Open Publication No. 10-2009-0103826

An aspect of the present invention provides a radio frequency input circuit with an electrostatic discharge (ESD) protection function that can be implemented in a previously set size, irrespective of a magnitude of an input signal.

According to an aspect of the present invention, there is provided a radio frequency input circuit including: a first direct current blocking unit provided between an input terminal and an input circuit unit and blocking a direct current voltage introduced through the input terminal; a first ESD protection circuit unit provided in parallel with the first direct current blocking unit and forming a bypass path according to an ESD voltage introduced through the input terminal; and a ground circuit unit provided between a first connection node between the first direct current blocking unit and the input circuit unit, and a ground, and forming a ground path according to the ESD voltage.

According to another aspect of the present invention, there is provided a radio frequency input circuit including: a first direct current blocking unit provided between an input terminal and an input circuit unit and blocking a direct current voltage introduced through the input terminal; a first ESD protection circuit unit provided in parallel with the first direct current blocking unit and forming a bypass path according to an ESD voltage introduced through the input terminal; a ground circuit unit provided between a first connection node between the first direct current blocking unit and the input circuit unit, and a ground, and forming a ground path according to the ESD voltage; and a second ESD protection circuit unit connected between a second connection node between the input circuit unit and an output terminal, and the ground, and forming a ground path according to an ESD voltage provided through the output terminal.

The first direct current blocking unit may include a first capacitor having one end connected to the input terminal and another end connected to the first connection node.

The first ESD protection circuit unit may include: a first bypass path unit forming a first bypass path according to a positive (+) ESD voltage through the input terminal; and a second bypass path unit forming a second bypass path according to a negative (−) ESD voltage through the input terminal.

The first bypass path unit may include at least one or more diodes connected to each other in series in a forward direction between the input terminal and the first connection node.

The second bypass path unit may include at least one or more diodes connected to each other in series in a backward direction between the input terminal and the first connection node.

The ground circuit unit may include a first inductor having one end connected to the first connection node and another end connected to the ground.

The radio frequency input circuit may further include: a second direct current blocking unit provided between the first connection node and the input circuit unit and blocking a direct current voltage introduced through the first ESD protection circuit unit.

The second ESD protection circuit unit may include: a third bypass path unit forming a third bypass path according to a positive (+) ESD voltage through the output terminal; and a fourth bypass path unit forming a fourth bypass path according to a negative (−) ESD voltage through the output terminal.

The third bypass path unit may include at least one or diodes connected to each other in series in a forward direction between the second connection node and the ground.

The fourth bypass path unit may include at least one or more diodes connected to each other in series in a backward direction between the second connection node and the ground.

The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a block diagram of a radio frequency input circuit according to an embodiment of the present invention;

FIG. 2 is a block diagram of a radio frequency input circuit according to another embodiment of the present invention;

FIGS. 3 and 4 are views illustrating a first ESD protection circuit unit of FIG. 1 by way of example; and

FIGS. 5 and 6 are views illustrating a second ESD protection circuit unit of FIG. 2 by way of example.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

In the drawings, the shapes and dimensions of elements may be exaggerated for clarity, and the same reference numerals will be used throughout to designate the same or like elements.

FIG. 1 is a block diagram of a radio frequency input circuit according to an embodiment of the present invention.

Referring to FIG. 1 , the radio frequency input circuit according to the embodiment of the present invention may include a first direct current blocking unit 100 , a first ESD protection circuit unit 200 , and a ground circuit unit 300 .

FIG. 2 is a block diagram of a radio frequency input circuit according to another embodiment of the present invention.

Referring to FIG. 2 , the radio frequency input circuit according to the embodiment of the present invention may further include a second ESD protection circuit unit 500 in addition to the radio frequency input circuit according to the embodiment of the present invention.

Referring to FIGS. 1 and 2 , the first direct current blocking unit 100 may be provided between an input terminal IN and an input circuit unit 50 and block a direct current voltage introduced through the input terminal IN. That is, the first direct current blocking unit 100 blocks the direct current voltage and allows an input signal that is an alternating current to pass therethrough.

For example, the first direct current blocking unit 100 may include a first capacitor C 10 having one end connected to the input terminal IN and another end connected to a first connection node N 1 . The first connection node N 1 is a node present between the first direct current blocking unit 100 and the input circuit unit 50 .

The first ESD protection circuit unit 200 may be provided in parallel to the first direct current blocking unit 100 to form a bypass path by an ESD voltage introduced through the input terminal IN.

For example, when a peak versus peak voltage of the input signal is 20V, the ESD voltage is much higher than a voltage of the input signal, and thus may be a voltage in the range of, for example, 100V˜1 kV.

The ground circuit unit 300 may be provided between the first connection node N 1 and a ground GND to form a ground path by the ESD voltage. For example, the ground circuit unit 300 may include a first inductor L 10 having one end connected to the first connection node N 1 and another end connected to the ground GND.

Meanwhile, the radio frequency input circuit according to the embodiments of the present invention may further include a second direct current blocking unit 400 .

The second direct current blocking unit 400 may be disposed between the first connection node N 1 and the input circuit unit 50 to block a direct current voltage introduced through the first ESD protection circuit unit 200 . For example, the second direct current blocking unit 400 may include a second capacitor C 40 having one end connected to the first connection node N 1 and another end connected to the input circuit unit 50 .

Accordingly, when the ESD voltage is input through the input terminal IN, the first ESD protection circuit unit 200 forms a bypass path of the first direct current blocking unit 100 so that the ESD voltage does not pass through the first direct current blocking unit 100 , but is applied to the first connection node N 1 through the bypass path of the first ESD protection circuit unit 200 , and then, is not applied to the input circuit unit 50 by the second direct current blocking unit 400 , but flows through the ground GND through the ground circuit unit 300 .

Accordingly, although a withstand voltage of the first direct current blocking unit 100 is set to be lower than the ESD voltage, the first direct current blocking unit 100 may be prevented from a functional loss or being damaged by the ESD voltage.

Referring to FIG. 2 , the second ESD protection circuit unit 500 may be connected between a second connection node N 2 between the input circuit unit 50 and an output terminal OUT, and the ground GND, to form a ground path by the ESD voltage provided through the output terminal OUT.

For example, in the case that the ESD voltage is provided through the output terminal OUT, the ESD voltage is provided through the ground GND through the second ESD protection circuit unit 500 . Accordingly, the input circuit unit 50 may be protected from the ESD voltage provided through the output terminal OUT by the second ESD protection circuit unit 500 .

FIGS. 3 and 4 are views illustrating the first ESD protection circuit unit 200 of FIG. 1 by way of example.

Referring to FIGS. 3 and 4 , the first ESD protection circuit unit 200 may include a first bypass path unit 210 that forms a first bypass path by a positive (+) ESD voltage through the input terminal IN and a second bypass path unit 220 that forms a second bypass path by a negative (−) ESD voltage through the input terminal IN.

The first bypass path unit 210 may include at least one diode D 10 or more diodes connected to each other in series in a forward direction between the input terminal IN and the first connection node N 1 . The second bypass path unit 220 may include at least one diode D 20 or more diodes connected to each other in series in a backward direction between the input terminal IN and the first connection node N 1 .

Referring to FIG. 3 , the first bypass path unit 210 may include the at least one diode D 10 connected in series in the forward direction between the input terminal IN and the first connection node N 1 .

The second bypass path unit 220 may include the at least one diode D 20 connected in series in the backward direction between the input terminal IN and the first connection node N 1 .

Referring to FIG. 4 , the first bypass path unit 210 may include a plurality of diodes D 10 - 1 ˜D 10 - n connected to one another in series in the forward direction between the input terminal IN and the first connection node N 1 . The second bypass path unit 220 may include a plurality of diodes D 20 - 1 ˜D 20 - m connected to one another in series in the backward direction between the input terminal IN and the first connection node N 1 .

In this regard, n and m are natural numbers equal to or greater than 1, may be the same number or different numbers, and may be determined in accordance with characteristics of an ESD voltage that may be introduced through an input terminal of a system according to the embodiment of the present invention.

For example, to perform a protection function with respect to an ESD voltage equal to or higher than +15V and an ESD voltage equal to or lower than −10V, in a case in which a conduction voltage of one diode is 1.2V, the first bypass path unit 210 may include 12 diodes (1.2V*12=14.4V). In the case in which a conduction voltage of one diode is 1.2V, the second bypass path unit 220 may include 8 diodes (1.2V*8=9.6V).

Meanwhile, in order to prevent the first ESD protection circuit unit 200 from generating a leakage current, a voltage difference between both ends of the first capacitor C 10 of the first direct current blocking unit 100 needs to be lower than a conduction voltage of diodes of the first ESD protection circuit unit 200 . To meet such a condition, the number of diodes required in the first EST protection circuit unit 200 will hereinafter be described.

For example, it is assumed that an input impedance of the input circuit unit 50 is 50 ohm, a frequency of an input signal is 2 Ghz, the first capacitor C 10 of the first direct current blocking unit 100 is 10 pF, a peak voltage of the input signal is DC 1V+AC 1V peak, and the conduction voltage of diodes of the first ESD protection circuit unit 200 is 1.2V.

The impedance of the first capacitor C 10 of the first direct current blocking unit 100 is defined according to equation 1 below.

In this regard, when f denotes a frequency, ω denotes an angular frequency (=2 nf).

A peak voltage Vb-peak of a voltage Vb applied to the input circuit unit 50 may be calculated as a voltage applied to an input impedance of the input circuit unit 50 with respect to the entire impedance of the impedance of the first capacitor C 10 and the input impedance of the input circuit unit 50 and is defined according to equation 2 below.

In this regard, since a peak voltage Vin-peak of the input signal is 2V, a voltage of the both ends of the first capacitor C 10 of the first direction current blocking unit 100 is defined according to equation 3 below.

C 10 =V in−peak− Vb −peak=2V−0.86V=1.14V  [Equation 3]

In Equation 3 above, the voltage of the both ends of the first capacitor C 10 is 1.14V that is smaller than 1.2V that is the conduction voltage of diodes of the first ESD protection circuit unit 200 , and thus the first ESD protection circuit unit 200 does not generate the leakage current, even in the case in which a single diode is used.

Unlike the above-described example, in a case in which a DC voltage of the input signal is relatively high or capacitance of the first capacitor C 10 is relatively small, the number of diodes needs to be increased in order to prevent the first ESD protection circuit unit 200 from generating the leakage current.

FIGS. 5 and 6 are views illustrating a second ESD protection circuit unit of FIG. 2 by way of example.

Referring to FIGS. 5 and 6 , the second ESD protection circuit unit 500 may include a third bypass path unit 510 that forms a third bypass path by a positive (+) ESD voltage through the output terminal OUT and a fourth bypass path unit 520 that forms a fourth bypass path by a negative (−) ESD voltage through the output terminal OUT.

The third bypass path unit 510 may include at least one diode D 30 connected in series in a forward direction between the second connection node N 2 and the ground GND. The fourth bypass path unit 520 may include at least one diode D 40 connected in series in a backward direction between the second connection node N 2 and the ground GND.

Referring to FIG. 5 , the third bypass path unit 510 may include the at least one diode D 30 connected in series in the forward direction between the second connection node N 2 and the ground GND. The fourth bypass path unit 520 may include the at least one diode D 40 connected in series in the backward direction between the second connection node N 2 and the ground GND.

Referring to FIG. 6 , the third bypass path unit 510 may include a plurality of diodes D 30 - 1 ˜D 30 - n connected to one another in series in the forward direction between the second connection node N 2 and the ground GND. The fourth bypass path unit 520 may include a plurality of diodes D 40 - 1 ˜D 40 - m connected to one another in series in the backward direction between the second connection node N 2 and the ground GND.

In this regard, n and m, natural numbers equal to or greater than 1, may be the same number or different numbers, and may be determined in accordance with characteristics of an ESD voltage that may be provided through an output terminal of the input circuit unit of a system to which the present invention is applied.

For example, to perform a protection function with respect to an ESD voltage equal to or higher than +16V and an ESD voltage equal to or lower than −11V, in a case in which a conduction voltage of one diode is 1.2V, the third bypass path unit 510 may include 13 diodes (1.2V*13=15.6V). In the case in which a conduction voltage of one diode is 1.2V, the fourth bypass path unit 520 may include 9 diodes (1.2V*9=10.8V).

As set forth above, according to the embodiments of the invention, an ESD protection circuit is connected in parallel to a direct current blocking capacitor, and thus, irrespective of a magnitude of an input signal, a size thereof may be reduced and a parasitic capacitance may be reduced.

While the present invention has been shown and described in connection with the embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the invention as defined by the appended claims.