Control circuit for offline power converter without input capacitor

This application claims the benefit of U.S. Provisional Application No. 61/547,989, filed on Oct. 17, 2011, the contents of which are incorporated herein by reference.

1. Field of the Invention

The present invention relates to an offline power converter, more specifically, the present invention relates to a control circuit of the offline power converter.

2. Description of the Related Art

In conventional offline power converters, a bridge rectifier is utilized to rectify an AC (alternating current) input voltage into a pulsating DC (direct current) input voltage. An input capacitor, such as an electrolytic bulk capacitor, is usually applied at an output of the bridge rectifier to filter the pulsating DC input voltage as a smoother input voltage with small ripple. This bulk capacitor is utilized to store the energy and provide a minimum input voltage to guarantee a proper operation of the offline power converter. However, without the filtering operation of the bulk capacitor, the pulsating direct current input voltage will result in higher output line ripple and none-linearly power converting operation compared to the convention arts. Furthermore, the bulk capacitor generally occupies significant space of the power converter. Whenever the bulk capacitor can be eliminated, the advantages to the power converter will be longer life, smaller size, and greatly reduced manufacturing cost. Therefore, a control circuit capable of regulating an output of the power converter without the need of the bulk capacitor connected to its input is desired by the industries.

The present invention provides a control circuit for a power converter. The control circuit of a power converter comprises a switching circuit, an input-voltage detection circuit and a current-limit threshold. The switching circuit generates a switching signal coupled to switch a transformer of the power converter for regulating an output of the power converter in response to a feedback signal. The input-voltage detection circuit generates a control signal when an input voltage of the power converter is lower than a low-input threshold. The feedback signal is generated in response to the output of the power converter. A maximum duty of the switching signal is increased in response to the control signal. A maximum value of a switching current flowing through the transformer is limited by a current-limit threshold. The current-limit threshold is increased in response to the control signal. An input of the power converter doesn't connect with electrolytic bulk capacitors. The input-voltage detection circuit detects a DC input voltage of the power converter via the transformer. The input voltage of the power converter is correlated to the DC input voltage of the power converter.

The present invention also provides a controller for a power converter. The controller comprises a switching circuit, an input-voltage detection circuit, a threshold-generation circuit and a maximum-duty circuit. The switching circuit generates a switching signal coupled to switch a transformer of the power converter for regulating an output of the power converter in response to a feedback signal. The input-voltage detection circuit generates a control signal when an input voltage of the power converter is lower than a low-input threshold. The threshold-generation circuit generates a current-limit threshold for limiting a maximum value of a switching current flowing through the transformer. The feedback signal is generated in response to the output of the power converter. The current-limit threshold is increased in response to the control signal. The maximum-duty circuit generates a maximum-duty signal for limiting a maximum duty of the switching signal. The maximum duty of the switching signal is increased in response to the control signal. An input of the power converter doesn't connect with electrolytic bulk capacitors. The input-voltage detection circuit detects a DC input voltage of the power converter via the transformer. The input voltage of the power converter is correlated to the DC input voltage of the power converter.

The present invention also provides a control circuit for an offline converter. The control circuit comprises a switching circuit, an input-voltage detection circuit, a threshold-generation circuit and a maximum-duty circuit. The switching circuit generates a switching signal coupled to switch a transformer of the offline power converter for regulating an output of the offline power converter in response to a feedback signal. The input-voltage detection circuit generates a control signal when an input voltage of the power converter is lower than an input-voltage threshold. The threshold-generation circuit generates a current-limit threshold for limiting a maximum value of a switching current flowing through the transformer. The maximum-duty circuit generates a maximum-duty signal for limiting a maximum duty of the switching signal. The feedback signal is generated in response to the output of the offline power converter. The current-limit threshold is increased in response to the control signal. The maximum duty of the switching signal is increased in response to the control signal. The input of the power converter doesn't connect with electrolytic bulk capacitors. The input-voltage detection circuit detects the input voltage of the offline power converter via the transformer.

A detailed description is given in the following embodiments with reference to the accompanying drawings.

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 shows a secondary-side controlled power converter without an input bulk capacitor connected to its input;

FIG. 2 shows an exemplary embodiment of a control circuit of the power converter in FIG. 1 ;

FIG. 3 shows an exemplary embodiment of a signal generation circuit of the controller in FIG. 2 ;

FIG. 4 shows a magnitude of a low-input threshold and the waveforms of an input signal and a control signal of the signal generation circuit in FIG. 3 ;

FIG. 5 shows a primary-side controlled power converter without an input bulk capacitor connected to its input; and

FIG. 6 shows an exemplary embodiment of a control circuit of the primary-side controlled power converter in FIG. 5 .

The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

FIG. 1 shows an offline power converter without a bulk capacitor, such as an electrolytic capacitor, connected to its input. The power converter comprises a bridge rectifier 35 , a transformer 10 having a primary winding NP, a secondary winding NS and an auxiliary winding NA, a power switch 20 , a sensing resistor 30 , a control circuit 100 , a detection resistor 31 , a rectifier 40 , an output capacitor 45 and a feedback circuit. The feedback circuit comprises a resistor 52 , a voltage regulator (zener diode) 60 and an opto-coupler 50 . The bridge rectifier 35 converts an AC input voltage VAC to a DC input voltage VIN. The control circuit 100 generates a switching signal SW coupled to switch the transformer 10 via the power switch 20 . A switching current IP flowing through the transformer 10 generates a current-sense signal VI across a current-sense device, such as the sensing resistor 30 . The detection resistor 31 is connected to the auxiliary winding NA of the transformer 10 for obtaining a detection signal VS. The detection signal VS is supplied to a detection terminal VS of the control circuit 100 . The switching signal SW is generated in response to a feedback signal VFB for regulating an output of the power converter. The feedback signal VFB is obtained from an output of the power converter via the resistor 52 , the voltage regulator 60 and the opto-coupler 50 . The rectifier 40 and the output capacitor 45 are coupled to the secondary winding NS of the transformer 10 for generating an output voltage VO at the output of the power converter.

An output power P O of the power converter can be expressed as,

P = 1 2 × L P × I P 2 × F W ⁢

⁢ P O = V O × I O = V IN 2 × T ON 2 2 × L P × T ( 1 ) P O = V O × I O = V IN 2 × T ON 2 2 × L P × T + [ V IN × I A × ( T ON T ) ] ( 2 )

where V IN represents the level of the DC input voltage V IN ; T ON represents an on-time of the switching signal S W ; L P represents an inductance of the primary winding N P of the transformer 10 ; T represents a switching period of the switching signal S W ; F W represents the switching frequency of the switching signal S W ; and I A represents a continuous current (energy) existed in the transformer 10 when the next switching cycle is started.

Equation (1) shows an output power P O of the power converter operated in discontinuous-current mode (DCM) and/or boundary-current mode (BCM). Equation (2) shows an output power P O of the power converter operated in continuous-current mode (CCM).

For the most of the power converters, a maximum of the on-time T ON of the switching signal S W is limited to prevent the transformer 10 from saturation. Thus, the output power P O (the output voltage V O ) of the power converter will be lower once the DC input voltage V IN become low, which will result a higher output ripple (line ripple). The present invention provides a control circuit that can reduce the output ripple without saturating the transformer.

FIG. 2 shows an exemplary embodiment of the control circuit 100 according to present invention. The control circuit 100 comprises a level-shift circuit, a pulse generation circuit 160 , a signal generation circuit (CKT) 200 and a switching circuit. The level-shift circuit comprises a transistor 110 and resistors 115 , 116 and 117 . The switching circuit comprises comparators 150 and 151 , AND gates 153 and 175 , and a flip-flop 170 . The feedback signal VFB is supplied to a gate of the transistor 110 . A first terminal of the resistor 115 and a drain of the transistor 110 are supplied with a supply voltage VCC of the control circuit 100 . The resistors 116 and 117 are connected in series between a source of the transistor 110 and a ground reference. A feedback voltage VB is generated at a joint of the resistors 116 and 117 in response to the feedback signal VFB at the gate of the transistor 110 . The feedback voltage VB is supplied to a positive terminal of the comparator 150 . The current-sense signal VI is supplied to negative terminals of the comparators 150 and 151 . The signal generation circuit 200 generates an over-current threshold VT in response to the detection signal VS. The over-current threshold VT is a current-limit threshold for limiting a maximum value of the switching current IP flowing through the transformer 10 . The over-current threshold VT is supplied to a positive terminal of the comparator 151 . The comparator 150 compares the feedback voltage VB and the current-sense signal VI to generate a first reset signal SRST 1 . The comparator 151 compares the over-current threshold VT and the current-sense signal VI to generate a second reset signal SRST 2 . The first reset signal SRST 1 and the second reset signal SRST 2 are supplied to inputs of the AND gate 153 . An output of the AND gate 153 is connected to a reset terminal of the flip-flop 170 . Once the first reset signal SRST 1 or the second reset signal SRST 2 becomes logic-low, the flip-flop 170 will be reset. The pulse generation circuit 160 generates a pulse signal PLS to enable the flip-flop 170 . The flip-flop 170 generates a driving signal SX. The signal generation circuit 200 generates a maximum-duty signal SM in response to the detection signal VS and the driving signal SX. The maximum-duty signal SM and the driving signal SX are supplied to inputs of the AND gate 175 to generate the switching signal SW. Whenever the current-sense signal VI is greater than the feedback voltage VB, the output of the AND gate 153 will reset the flip-flop 170 in response to the first reset signal SRST 1 for disabling the driving signal SX. The flip-flop 170 is enabled by the pulse signal PLS for generating the driving signal SX and the switching signal SW. The driving signal SX and the switching signal SW can further be disabled once the current-sense signal VI is higher than the over-current threshold VT.

When the power converter is operated in BCM (Boundary Current Mode) and CCM (Continuous Current Mode), the output voltage V O can be expressed as,

⁢ V IN × T ON = V O × N P N S × ( T - T ON ) ⁢

⁢ V O = V IN × N S N P × ( T ON T - T ON ) ⁢

⁢ ∂ V O ∂ T ON = V IN × N S N P × [ ( 1 T - T ON ) + T ON ( T - T ON ) 2 ] ⁢

⁢ ∂ V O ∂ T ON = V IN × N S N P × [ T ( T - T ON ) 2 ] ( 3 )

where φ TON is the magnetic-flux charged into the transformer 10 ; φ TOFF is the magnetic-flux discharged from the transformer 10 .

Equations (1) and (2) show that the output power P O of the power converter is dominated by the DC input voltage V IN and the on-time T ON . A higher duty cycle (T ON /T) can increase the output power P O in case the DC input voltage V IN is relatively lower. However, in term of loop stability, equation (3) shows that the higher duty cycle and/or a higher DC input voltage V IN will result in a high loop gain. This high loop gain may cause the stability problem to the feedback loop. Therefore, according to the present invention, the control circuit 100 will increase the maximum on-time T ON of the switching signal S W to reduce the output ripple only when the DC input voltage V IN is lower than a low-input threshold V T1 . Besides, the over-current threshold V T will increase to allow a higher switching current I P once the DC input voltage V IN is lower than the low-input threshold V T1 . The higher switching current I P can deliver higher output power P O to reduce the line ripple, particularly for the power converter operated in CCM.

FIG. 3 shows an exemplary embodiment of the signal generation circuit 200 according to the present invention. The signal generation circuit 200 comprises an input voltage detector 210 , a comparator 215 , a threshold-generation circuit and a maximum-duty circuit. The threshold-generation circuit comprises an inverter 216 , current sources 225 and 226 , a switch 220 and a resistor 227 . The maximum-duty circuit comprises an inverter 240 , current sources 235 and 236 , a switch 230 , a transistor 241 , a capacitor 237 and a comparator 245 . The input voltage detector 210 and the comparator 215 form an input-voltage detection circuit. The input voltage detector 210 is coupled to detect the DC input voltage V IN by receiving the detection signal V S to generate an input voltage V INX . The magnitude of the input voltage V INX is correlated to that of the input voltage V IN . The detailed operation of the input voltage detector 210 can be found in the prior arts of “Detection Circuit for Sensing the Input Voltage of Transformer”, U.S. Pat. No. 7,671,578; and “Control Method and Circuit with Indirect Input Voltage Detection by Switching Current Slope Detection”, U.S. Pat. No. 7,616,461 and will be omitted herein. The input voltage V INX is further coupled to the comparator 215 to be compared with the low-input thresholds V T1 for generating a control signal S IN . The control signal S IN will become logic-high whenever the input voltage V INX is greater than the low-input threshold V T1 and vice versa. The control signal S IN controls the switch 220 via the inverter 216 . The current source 225 , the switch 220 and the resistor 227 are connected in series between the supply voltage V CC and the ground reference. The current source 226 is connected between the supply voltage V CC and a joint of the switch 220 and the resistor 227 . The over-current threshold V T is generated at the joint of the switch 220 and the resistor 227 . When the input voltage V INX is higher than the low-input threshold V T1 , the control signal S IN will become logic-high, and a first magnitude of the over-current threshold V T is determined by the current source 226 and the resistor 227 . When the input voltage V INX is lower than the low-input threshold V T1 , the control signal S IN will become logic-low, and a second magnitude of the over-current threshold V T is determined by the current sources 225 and 226 and the resistor 227 . The second magnitude of the over-current threshold V T is greater than the first magnitude of the over-current threshold V T . That is, a higher over-current threshold V T can be obtained when the input voltage V INX is lower than the low-input threshold V T1 .

The current source 235 , the switch 230 and the transistor 241 are connected in series between the supply voltage V CC and the ground reference. The current source 236 is connected between the supply voltage V CC and a joint of the switch 230 and the transistor 241 . The capacitor 237 is connected between the joint of the switch 230 and the transistor 241 and the ground reference. The driving signal S X controls the transistor 241 via the inverter 240 . As the control signal S IN is disabled (logic-low) and the driving signal S X is being enabled, the capacitor 237 is charged by the current source 236 . As the control signal S IN is enabled (logic-high), the switch 230 will be turned on and the capacitor 237 will be charged by the current sources 235 and 236 simultaneously. As the driving signal S X is disabled, the capacitor 237 will be discharged immediately. A voltage across the capacitor 237 is supplied to a negative terminal of the comparator 245 . A positive terminal of the comparator 245 is supplied with a threshold V T2 . The comparator 245 generates the maximum-duty signal S M by comparing the voltage across the capacitor 237 and the threshold V T2 . The control signal S IN is coupled to control the switch 230 for programming the maximum-duty signal S M . A maximum duty of the switching signal S W is increased in response to the control signal S IN . The maximum-duty signal S M is enabled whenever the driving signal S X is enabled. The capacitor 237 and the current sources 235 and 236 determine the pulse width of the maximum-duty signal S M when the input voltage V INX is higher than the low-input threshold V T1 . Once the input voltage V INX is lower than the low-input threshold V T1 , only the capacitor 237 and the current source 236 will determine the pulse width of the maximum-duty signal S M . Therefore, the maximum-duty signal S M and the switching signal S W with wider pulse width can be obtained when the input voltage V INX is lower than the low-input threshold V T1 .

FIG. 4 shows a magnitude of the threshold V T1 and the waveforms of the input voltage V INX and the control signal S IN . The pulse width of the control signal S IN increases whenever the low-input threshold V T2 decreases, and vice versa.

FIG. 5 shows a primary-side controlled power converter without an input bulk capacitor connected to its input. Different to the embodiment in FIG. 1 , the feedback signal representing the output voltage V O is obtained from a voltage divider connected to the auxiliary winding N A of the transformer 10 . The voltage divider is formed by resistors 31 and 32 . A control circuit 500 generates the switching signal S W in response to the detection signal V S from the auxiliary winding N A of the transformer 10 .

FIG. 6 shows an exemplary embodiment of the control circuit 500 according to the present invention. The control circuit 500 comprises a reflected voltage detector 510 , an error amplifier 515 , a filter 516 , a pulse generation circuit 560 , a signal generation circuit 200 and a switching circuit. The switching circuit comprising comparators 550 and 551 , AND gates 553 and 575 , and a flip-flop 570 operates the same as the switching circuit in FIG. 2 . The reflected voltage detector 510 generates a feedback signal V fb supplied to a negative terminal of the error amplifier 515 by sampling the detection signal V S . The detailed operation of the primary-side controlled power converter can be found in the prior art of “Close-loop PWM controller for primary-side controlled power converters”, U.S. Pat. No. 7,016,204.

A positive terminal of the error amplifier 515 receives a reference voltage V REF . An output of the error amplifier 515 generates the feedback voltage V B via the filter 516 . The feedback voltage V B is supplied to the comparator 550 to be compared with the current-sense signal V I to disable the driving signal S X via the AND gate 553 and the flip-flop 570 . The driving signal S X generated by the flip-flop 570 is supplied to an input of the AND gate 575 . Another input of the AND gate 575 is coupled to receive the maximum-duty signal S M . An output of the AND gate 575 generates the switching signal S W . The signal generation circuit 200 generates the maximum-duty signal S M in response to the detection signal V S . The flip-flop 570 is enabled by the pulse signal PLS for generating the switching signal S W via the AND gate 575 . The pulse signal PLS is generated by the pulse generation circuit 560 . The signal generation circuit 200 generates the over-current threshold V T . The driving signal S X and the switching signal S W can further be disabled once the current-sense signal V I is higher than the over-current threshold V T . The over-current threshold V T is utilized for limiting the maximum value of the switching current I P . The comparator 551 is coupled to receive the current-sense signal V I and the over-current threshold V T for disabling the flip-flop 570 via the AND gate 553 .

While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.