Error indication circuit

1. Technical Field

The present disclosure relates to a circuit for indicating errors when a computer system performs power-on self-test (POST).

2. Description of Related Art

Some motherboards have an onboard buzzer for indicating errors occurred when a computer system during POST when the computer system is booting up. When there are errors occurred during POST, the buzzer is activated. For example, when there is a keyboard controller error, the buzzer is activated with three long beeps. However, for the hearing impaired, the buzzer may not be of any help. Therefore there is room for improvement in the art.

Many aspects of the embodiments can be better understood with reference to the following drawing. The components in the drawing are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawing, like reference numerals designate corresponding parts throughout the several views.

The FIGURE is a circuit diagram of an exemplary embodiment of an indication circuit.

The disclosure, including the accompanying drawing, is illustrated by way of examples and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.

Referring to the FIGURE, an exemplary embodiment of an indication circuit is used for a computer system. The indication circuit includes three bipolar junction transistors (BJTs) Q 1 -Q 3 , seven resistors R 1 -R 7 , and two light-emitting diodes (LEDs) L 1 and L 2 . In the embodiment, the LED L 1 is a yellow LED, and the LED L 2 is a green LED. The transistors Q 1 -Q 3 are npn type BJTs.

A base of the BJT Q 1 is connected to a general purpose input output (GPIO) pin GPIO 1 on a motherboard through the resistor R 1 . A node between the resistor R 1 and the GPIO pin GPIO 1 is further connected to a power supply +3V_SB through the resistor R 2 . An emitter of the BJT Q 1 is grounded. A collector of the BJT Q 1 is connected to the power supply +3V_SB through the resistor R 3 . The collector of the BJT Q 1 is further connected to a base of the BJT Q 2 . An emitter of the BJT Q 2 is grounded. A collector of the BJT Q 2 is connected to a power supply +5V_SB through the resistor R 4 . The collector of the BJT Q 2 is connected to a cathode of the LED L 1 and an anode of the LED L 2 .

A base of the BJT Q 3 is connected to a GPIO pin GPIO 2 on the motherboard through the resistor R 5 . Anode between the resistor R 5 and the GPIO pin GPIO 2 is further connected to the power supply +3V_SB through the resistor R 6 . An emitter of the BJT Q 3 is grounded. A collector of the BJT Q 3 is connected to the power supply +5V_SB through the resistor R 7 . The collector of the BJT Q 3 is further connected to an anode of the LED L 1 and a cathode of the LED L 2 .

Signals output from the GPIO pins GPIO 1 and GPIO 2 , which can be set by the basic input output system (BIOS) are shown in Table 1 below:

In the table 1 above, “0” stands for Low Level, “1” stands for High Level, “Blinking/1 Hz” stands for a frequency of the signal output from the GPIO pin is 1 Hz, and “Blinking/0.5 Hz” stands for a frequency of the signal output from the GPIO pin is 0.5 Hz.

When the computer system is working normally, the GPIO pins GPIO 1 and GPIO 2 output high level signals. In the condition, the BJTs Q 1 and Q 3 are turned on, and the BJT Q 2 is turned off. As a result, the LED L 1 is deactivated, and the LED L 2 is activated. In other words, the indication circuit emits green lights.

When there are random-access memory (RAM) errors, the GPIO pin GPIO 1 outputs a high level signal with a frequency of 1 Hz, and the GPIO pin GPIO 2 outputs a high level signal. In this condition, the transistor Q 3 is turned on. When the GPIO pin GPIO 1 outputs a high level signal, the BJT Q 1 is turned on, and the BJT Q 2 is turned off. As a result, the LED L 1 is deactivated, and the LED L 2 is activated. In other words, the indication circuit emits green lights. When the GPIO pin GPIO 1 does not output the high level signal, the BJT Q 1 is turned off, and the BJT Q 2 is turned on. As a result, the LEDs L 1 and L 2 are deactivated. In other words, the indication circuit emits no light. As a result, when there are RAM errors, the indication circuit blinks with green lights at a frequency of 1 Hz.

When there are display or video graphics array (VGA) card errors, the GPIO pin GPIO 1 outputs a low level signal, and the GPIO pin GPIO 2 outputs a high level signal with a frequency of 1 Hz. In this condition, the BJT Q 1 is turned off, and the BJT Q 2 is turned on. When the GPIO pin GPIO 2 outputs a high level signal, the BJT Q 3 is turned on. As a result, the LEDs L 1 and L 2 are deactivated. In other words, the indication circuit emits no light. When the GPIO pin GPIO 2 does not output the high level signal, the BJT Q 3 is turned off. As a result, the LED L 1 is activated, and the LED L 2 is deactivated. The indication circuit emits yellow lights. As a result, when there are display or VGA card errors of the computer system, the indication circuit blinks with yellow lights at a frequency of 1 Hz.

When there are keyboard controller errors, the GPIO pin GPIO 1 outputs a high level signal with a frequency of 0.5 Hz, and the GPIO pin GPIO 2 outputs a high level signal. In this condition, the BJT Q 3 is turned on. When the GPIO pin GPIO 1 outputs a high level signal, the BJT Q 1 is turned on, and the BJT Q 2 is turned off. As a result, the LED L 1 is deactivated, and the LED L 2 is activated. The indication circuit emits green lights. When the GPIO pin GPIO 1 does not output the high level signal, the BJT Q 1 is turned off, and the BJT Q 2 is turned on. As a result, the LEDs L 1 and L 2 are deactivated. The indication circuit emits no light. As a result, when there are keyboard controller errors, the indication circuit blinks with green lights at a frequency of 0.5 Hz.

When there are memory errors, the GPIO pin GPIO 1 outputs a low level signal, and the GPIO pin GPIO 2 outputs a high level signal with a frequency of 0.5 Hz. In this condition, the BJT Q 1 is turned off, and the BJT Q 2 is turned on. When the GPIO pin GPIO 2 outputs a high level signal, the BJT Q 3 is turned on. As a result, the LEDs L 1 and L 2 are deactivated. The indication circuit emits no light. When the GPIO pin GPIO 2 does not output the high level signal, the BJT Q 3 is turned off. As a result, the LED L 1 is activated, and the LED L 2 is deactivated. The indication circuit emits yellow lights. As a result, when there are memory errors, the indication circuit blinks with yellow lights at a frequency of 0.5 Hz.

In the embodiment, the BJTs Q 1 -Q 3 function as electronic switches. Moreover, the signals output from the GPIO pins GPIO 1 and GPIO 2 as shown in the table 1 are defined by users. In other embodiments, the signals output from the GPIO pins GPIO 1 and GPIO 2 can be different from the signals shown in table 1.

The LEDs L 1 and L 2 flash in different colors or at different frequencies to indicate specific error conditions during POST.

The foregoing description of the exemplary embodiments of the disclosure has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Many modifications and variations are possible in the light of everything above. The embodiments were chosen and described in order to explain the principles of the disclosure and their practical application so as to enable others of ordinary skill in the art to utilize the disclosure and various embodiments with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those of ordinary skills in the art to which the present disclosure pertains without departing from its spirit and scope. Accordingly, the scope of the present disclosure is defined by the appended claims rather than the foregoing description and the exemplary embodiments described therein.