Control device

The present invention relates to a control device, and particularly to a control device controlling a plurality of switching elements in a power conversion device.

Conventionally, an uninterruptible power supply device is widely used as a power supply device for stably supplying alternating-current (AC) power to an essential load such as a computer system. For example, as disclosed in Japanese Patent Laying-Open No. 07-298516 (Patent Literature 1), the uninterruptible power supply device generally includes a converter converting commercial AC power into direct-current (DC) power, an inverter converting the DC power into AC power and supplying the AC power to a load, a chopper supplying the DC power generated by the converter to a battery at the time of receiving the commercial AC power and supplying the DC power of the battery to the inverter at the time of interruption of the commercial AC power, and a control unit controlling the entire device.

Patent Literature

PTL 1: Japanese Patent Laying-Open No. 07-298516

Technical Problem

In such an uninterruptible power supply device, a converter, an inverter and a chopper each consist of a plurality of power modules. Each power module includes a plurality of IGBT elements connected in series and a diode connected in anti-parallel to each IGBT element. The control unit also includes a signal generation circuit generating a plurality of control signals for controlling the plurality of IGBT elements, and output terminals for outputting the plurality of control signals.

The number of power modules varies depending on the type of the uninterruptible power supply device. For example, in the case of the type of the device having relatively large rated power, a plurality of power modules are connected in parallel and these power modules are greater in number than the type of the device having a relatively small rated power. The layout of the plurality of power modules is changed for each type of the device in order to minimize the size of the device.

Furthermore, since the plurality of power modules connected in parallel are controlled by the same control signal, the signal generation circuit is used in common among the plurality of types of uninterruptible power supply devices. However, when the layout of the power modules is changed, it becomes necessary also to change the layout of the output terminals in consideration of the path and the like of the wiring for connecting each power module and the output terminals of the control unit. Accordingly, the control unit conventionally needs to be changed for each type of the device, which causes a problem that the cost is increased.

Therefore, a main purpose of the present invention is to provide a control device that allows cost reduction for a power conversion device.

Solution To Problem

A control device according to the present invention is a control device in a power conversion device including a plurality of switching elements, this control device controlling the plurality of switching elements. A layout of the plurality of switching elements is different for each type of the power conversion device. The control device includes a signal generation circuit generating a plurality of control signals controlling the plurality of switching elements; a plurality of output terminals for supplying the plurality of control signals to the plurality of switching elements; and a switching circuit arranging the plurality of control signals in order in accordance with the type of the power conversion device and supplying the plurality of control signals to the plurality of output terminals.

Preferably, the plurality of output terminals are grouped by a predetermined number of output terminals into a plurality of first groups. The plurality of switching elements are grouped by a predetermined number of switching elements into a plurality of second groups. The control device further includes a drive circuit provided corresponding to each of the second groups and driving each of the switching elements in a corresponding one of the second groups; and a multicore cable connecting the predetermined number of output terminals belonging to each of the first groups and the corresponding drive circuit.

Further preferably, the power conversion device is an uninterruptible power supply device.

Advantageous Effects Of Invention

In the control device according to the present invention, since a plurality of control signals generated by a signal generation circuit are arranged in order in accordance with the type of the power conversion device and supplied to a plurality of output terminals, the control device can be shared among a plurality of types of power conversion devices. Therefore, the power conversion device can be reduced in cost.

FIG. 1 is a circuit block diagram showing the entire configuration of an uninterruptible power supply device according to one embodiment of the present invention.

FIG. 2 is a circuit block diagram showing the configuration and the operation of a control unit in the case where the uninterruptible power supply device shown in FIG. 1 is of the first type.

FIG. 3 is a circuit block diagram showing the configuration and the operation of the control unit in the case where the uninterruptible power supply device shown in FIG. 1 is of the second type.

FIG. 4 is a circuit block diagram showing the configuration of a drive unit and a power conversion unit in the case where the uninterruptible power supply device shown in FIG. 1 is of the first type.

FIG. 5 is a circuit diagram showing the configuration of the power conversion unit shown in FIG. 4 .

FIG. 6 is a circuit block diagram showing the configuration of a gate drive circuit substrate and a gate resistor shown in FIG. 4 .

FIG. 7 is a circuit block diagram showing the configuration of the drive unit and the power conversion unit in the case where the uninterruptible power supply device shown in FIG. 1 is of the second type.

As shown in FIG. 1 , an uninterruptible power supply device of the present application includes capacitors C 1 to C 6 , reactors L 1 to L 8 , a control unit 1 , a drive unit 2 , a power conversion unit 3 , and a battery 4 . Control unit 1 detects an input voltage and an output voltage of power conversion unit 3 , a voltage across the terminals of battery 4 , and the like. Based on the detected results, control unit 1 generates a PWM (Pulse Width Modulation) signal for controlling power conversion unit 3 . Drive unit 2 drives power conversion unit 3 in accordance with the PWM signal generated by control unit 1 .

At the time of the normal operation in which a commercial AC power supply 5 supplies AC power, power conversion unit 3 converts the AC power into DC power. Then, while charging battery 4 with the DC power, power conversion unit 3 converts the DC power into AC power of a commercial frequency and supplies the AC power to a load 6 . Furthermore, at the time of the interruption in which commercial AC power supply 5 stops supplying the AC power, power conversion unit 3 converts the DC power stored in battery 4 into AC power of a commercial frequency and supplies the AC power to load 6 . Therefore, according to this uninterruptible power supply device, even when an interruption occurs, the operation of load 6 can be continued until the DC power of battery 4 is consumed.

Capacitors C 1 to C 3 each have one electrode connected to an R-phase terminal T 1 , an S-phase terminal T 2 and a T-phase terminal T 3 , respectively, of commercial AC power supply 5 , and also have the other electrode connected to a virtual neutral line NL. Reactors L 1 to L 3 each have one terminal connected to R-phase terminal T 1 , S-phase terminal T 2 and T-phase terminal T 3 , respectively, of commercial AC power supply 5 , and also have the other terminal connected to an R-phase terminal TR, an S-phase terminal TS and a T-phase terminal TT, respectively, of power conversion unit 3 .

Capacitors C 1 to C 3 and reactors L 1 to L 3 constitute an input filter (low pass filter) that passes the signal of a commercial frequency (for example, 60 Hz) and interrupts the signal of a carrier frequency (for example, 10 kHz) generated in power conversion unit 3 . The AC voltage is transmitted from commercial AC power supply 5 through the input filter to power conversion unit 3 while the signal of a carrier frequency generated in power conversion unit 3 is interrupted by the input filter. Therefore, the signal of a carrier frequency generated in power conversion unit 3 is prevented from causing an adverse effect on commercial AC power supply 5 .

Reactors L 4 to L 6 each have one terminal connected to a U-phase terminal TU, a V-phase terminal TV and a W-phase terminal TW, respectively, of power conversion unit 3 , and also have the other terminal connected to a U-phase terminal T 4 , a V-phase terminal T 5 and a W-phase terminal T 6 , respectively, of load 6 . Capacitors C 4 to C 6 each have one electrode connected to U-phase terminal T 4 , V-phase terminal T 5 and W-phase terminal T 6 , respectively, of load 6 , and also have the other electrode connected to virtual neutral line NL.

Reactors L 4 to L 6 and capacitors C 4 to C 6 constitute an output filter (low pass filter) that passes the signal of a commercial frequency and interrupts the signal of a carrier frequency generated in power conversion unit 3 . The AC voltage is transmitted from power conversion unit 3 through the output filter to load 6 while the signal of a carrier frequency generated in power conversion unit 3 is interrupted in the output filter. Therefore, the signal of a carrier frequency generated in power conversion unit 3 is prevented from causing an adverse effect on load 6 .

Reactors L 7 and L 8 each have one terminal connected to battery terminals TBP and TBN, respectively, of power conversion unit 3 , and also have the other terminal connected to a positive electrode and a negative electrode, respectively, of battery 4 . Reactors L 7 and L 8 constitute a normal mode reactor to suppress generation of noise.

FIG. 2 is a circuit block diagram showing the configuration of control unit 1 . In FIG. 2 , control unit 1 includes a substrate 10 , a PWM circuit 11 mounted on substrate 10 , a switching circuit 12 , and four output ports 13 to 16 . PWM circuit 11 generates PWM signals ΦR 1 , ΦR 2 , ΦU 1 , ΦU 2 , ΦS 1 , ΦS 2 , ΦV 1 , ΦV 2 , ΦT 1 , ΦT 2 , ΦW 1 , ΦW 2 , and ΦC 1 to ΦC 4 for controlling power conversion unit 3 . Output port 13 includes output terminals T 11 to T 14 , output port 14 includes output terminals T 15 to T 18 , output port 15 includes output terminals T 19 to T 22 , and output port 16 includes output terminals T 23 to T 26 .

When a gate selection signal GS is brought into an “L” level, switching circuit 12 supplies PWM signals ΦR 1 , ΦR 2 , ΦU 1 , ΦU 2 , ΦS 1 , ΦS 2 , ΦV 1 , ΦV 2 , ΦT 1 , ΦT 2 , ΦW 1 , ΦW 2 , and ΦC 1 to ΦC 4 to output terminals T 11 to T 26 , respectively, as shown in FIG. 2 . Furthermore, when gate selection signal GS is brought into an “H” level, switching circuit 12 supplies PWM signals ΦR 1 , ΦR 2 , ΦS 1 , ΦS 2 , ΦU 1 , ΦU 2 , ΦV 1 , ΦV 2 , ΦT 1 , ΦT 2 , ΦC 1 , ΦC 2 , ΦW 1 , ΦW 2 , ΦC 3 , and ΦC 4 to output terminals T 11 to T 26 , respectively, as shown in FIG. 3 .

Gate selection signal GS is brought into an “L” level when the uninterruptible power supply device is of the first type, and is brought into an “H” level when the uninterruptible power supply device is of the second type. The rated power of the first type is, for example, 100 kVA while the rated power of the second type is, for example, 225 kVA. Output ports 13 to 16 are connected to drive unit 2 via four-core cables CB 1 to CB 4 , respectively.

FIG. 4 is a block diagram showing the configuration and the layout of drive unit 2 and power conversion unit 3 in the case where the uninterruptible power supply device is of the first type. In FIG. 4 , drive circuit 2 includes four gate drive circuit substrates 21 to 24 and eight gate resistors 31 to 38 while power conversion unit 3 includes a wiring board 39 of a rectangular shape, eight power modules MR, MU, MS, MV, MT, MW, MC 1 and MC 2 , and a capacitor C 7 .

Gate drive circuit substrates 21 to 24 are arranged in one row vertically as seen in FIG. 4 , and connected to their respective output ports 13 to 16 in FIG. 2 via four-core cables CB 1 to CB 4 , respectively. PWM signals ΦR 1 , ΦR 2 , ΦU 1 , and ΦU 2 are supplied from PWM circuit 11 via four-core cable CB 1 to gate drive circuit substrate 21 . PWM signals ΦS 1 , ΦS 2 , ΦV 1 , and ΦV 2 are supplied from PWM circuit 11 via four-core cable CB 2 to gate drive circuit substrate 22 . PWM signals ΦT 1 , ΦT 2 , ΦW 1 , and ΦW 2 are supplied from PWM circuit 11 via four-core cable CB 3 to gate drive circuit substrate 23 . PWM signals ΦC 1 to ΦC 4 are supplied from PWM circuit 11 via four-core cable CB 4 to gate drive circuit substrate 24 .

Gate resistors 31 to 38 are arranged in one row adjacent to gate drive circuit substrates 21 to 24 . Power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 are arranged adjacent to gate resistors 31 to 38 , respectively, in one row along one of the long sides of wiring board 39 and fixed to wiring board 39 .

Each of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 has the first to third output terminals. The first output terminal of each of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 is connected to a positive voltage node N 1 . The second output terminals of power modules MR, MU, MS, MV, MT, and MW are connected to R-phase terminal TR, U-phase terminal TU, S-phase terminal TS, V-phase terminal TV, T-phase terminal TT, and W-phase terminal TW, respectively. The second output terminal of each of power modules MC 1 and MC 2 is connected to battery terminal TBP. The third output terminal of each of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 is connected to a negative voltage node N 2 and battery terminal TBN. Capacitor C 7 is connected between nodes N 1 and N 2 .

Gate drive circuit substrate 21 drives power module MR via gate resistor 31 in accordance with PWM signals φR 1 and φR 2 , and also drives power module MU via gate resistor 32 in accordance with PWM signals φU 1 and φU 2 . Gate drive circuit substrate 22 drives power module MS via gate resistor 33 in accordance with PWM signals φS 1 and φS 2 , and also drives power module MV via gate resistor 34 in accordance with PWM signals φV 1 and φV 2 .

Gate drive circuit substrate 23 drives power module MT via gate resistor 35 in accordance with PWM signals ΦT 1 and ΦT 2 , and also drives power module MW via gate resistor 36 in accordance with PWM signals ΦW 1 and ΦW 2 . Gate drive circuit substrate 24 drives power module MC 1 via gate resistor 37 in accordance with PWM signals ΦC 1 and ΦC 2 , and also drives power module MC 2 via gate resistor 38 in accordance with PWM signals ΦC 3 and ΦC 4 .

FIG. 5 is a circuit diagram showing the configuration of power conversion unit 3 . In FIG. 5 , power modules MR, MS and MT constitute a converter 40 . Power module MR includes two IGBT elements QR 1 and QR 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DR 1 and DR 2 connected in anti-parallel to IGBT elements QR 1 and QR 2 , respectively. The node between IGTB elements QR 1 and QR 2 is connected to R-phase terminal TR.

Power module MS includes two IGBT elements QS 1 and QS 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DS 1 and DS 2 connected in anti-parallel to IGBT elements QS 1 and QS 2 , respectively. The node between IGTB elements QS 1 and QS 2 is connected to S-phase terminal TS.

Power module MT includes two IGBT elements QT 1 and QT 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DT 1 and DT 2 connected in anti-parallel to IGBT elements QT 1 and QT 2 , respectively. The node between IGTB elements QT 1 and QT 2 is connected to T-phase terminal TT.

Each of IGBT elements QR 1 , QR 2 , QS 1 , QS 2 , QT 1 , and QT 2 is driven by drive unit 2 . In the normal operation in which commercial AC power supply 5 supplies AC power, each of IGBT elements QR 1 , QR 2 , QS 1 , QS 2 , QT 1 , and QT 2 is turned on/off at the timing in accordance with the phase of the three-phase AC voltage from commercial AC power supply 5 , and this three-phase AC voltage is converted into a DC voltage. At the time of interruption in which commercial AC power supply 5 stops supplying the AC power, IGBT elements QR 1 , QR 2 , QS 1 , QS 2 , QT 1 , and QT 2 each are fixed in the OFF state, and the operation of converter 40 is stopped.

Capacitor C 7 is connected between positive voltage node N 1 and negative voltage node N 2 . The voltage between nodes N 1 and N 2 is smoothed by capacitor C 7 .

Power modules MC 1 and MC 2 constitute a chopper 41 . Power module MC 1 includes two IGBT elements QC 1 and QC 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DC 1 and DC 2 connected in anti-parallel to IGBT elements QC 1 and QC 2 , respectively. The node between IGTB elements QC 1 and QC 2 is connected to battery terminal TBP. Negative voltage node N 2 is connected to battery terminal TBN.

Power module MC 2 includes two IGBT elements QC 3 and QC 4 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DC 3 and DC 4 connected in anti-parallel to IGBT elements QC 3 and QC 4 , respectively. The node between IGTB elements QC 3 and QC 4 is connected to battery terminal TBP.

Each of IGBT elements QC 1 to QC 4 is driven by drive unit 2 . In the normal operation in which commercial AC power supply 5 supplies AC power, each of IGBT elements QC 1 to QC 4 is turned on/off at a prescribed timing, and a part of the DC power generated by converter 10 is supplied to battery 4 , to thereby charge battery 4 .

At the time of interruption in which commercial AC power supply 5 stops supplying the AC power, each of IGBT elements QC 1 to QC 4 is turned on/off at the timing different from that in the normal operation, and battery 4 supplies DC power to inverter 12 . When the voltage across the terminals of battery 4 is higher than an upper limit voltage or lower than a lower limit voltage, each of IGBT elements QC 1 to QC 4 is fixed in the OFF state, and the operation of chopper 41 is stopped.

Power modules MU, MV and MW constitute an inverter 42 . Power module MU includes two IGBT elements QU 1 and QU 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DU 1 and DU 2 connected in anti-parallel to IGBT elements QU 1 and QU 2 , respectively. The node between IGTB elements QU 1 and QU 2 is connected to U-phase terminal TU.

Power module MV includes two IGBT elements QV 1 and QV 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DV 1 and DV 2 connected in anti-parallel to IGBT elements QV 1 and QV 2 , respectively. The node between IGTB elements QV 1 and QV 2 is connected to V-phase terminal TV.

Power module MW includes two IGBT elements QW 1 and QW 2 connected in series between positive voltage node N 1 and negative voltage node N 2 , and two diodes DW 1 and DW 2 connected in anti-parallel to IGBT elements QW 1 and QW 2 , respectively. The node between IGTB elements QW 1 and QW 2 is connected to W-phase terminal TW.

Each of IGBT elements QU 1 , QU 2 , QV 1 , QV 2 , QW 1 , and QW 2 is driven by drive unit 2 . In the normal operation in which commercial AC power supply 5 supplies AC power, each of IGBT elements QU 1 , QU 2 , QV 1 , QV 2 , QW 1 , and QW 2 is turned on/off at the timing in accordance with the phase of the three-phase AC voltage from commercial AC power supply 5 , and the DC voltage generated by converter 10 is converted into a three-phase AC voltage of a commercial frequency.

At the time of interruption in which commercial AC power supply 5 stops supplying the AC power, each of IGBT elements QU 1 , QU 2 , QV 1 , QV 2 , QW 1 , and QW 2 is turned on/off at the timing in accordance with the phase of the three-phase AC voltage from commercial AC power supply 5 , and the DC voltage supplied from battery 4 is converted into a three-phase AC voltage of a commercial frequency. When the voltage across the terminals of battery 4 is lower than a lower limit voltage, each of IGBT elements QU 1 , QU 2 , QV 1 , QV 2 , QW 1 , and QW 2 is fixed in the OFF state, and the operation of inverter 42 is stopped.

FIG. 6 is a circuit block diagram showing the configuration of gate drive circuit substrate 21 and gate resistors 31 and 32 . In FIG. 6 , gate drive circuit substrate 21 includes four drivers 50 to 53 , gate resistor 31 includes two resistance elements 54 and 55 , and gate resistor 32 includes two resistance elements 56 and 57 . Resistance elements 54 to 57 each have one terminal connected to the output nodes of drivers 50 to 53 , respectively, and also have the other terminal connected to the gates of IGBT elements QR 1 , QR 2 , QU 1 , and QU 2 , respectively. Drivers 50 to 53 have their respective reference voltage nodes connected to emitters of IGBT elements QR 1 , QR 2 , QU 1 , and QU 2 , respectively.

Drivers 50 to 53 output voltages of the levels in accordance with PWM signals ΦR 1 , ΦR 2 , ΦU 1 , and ΦU 2 , respectively, between their respective output terminals and reference voltage nodes. Each of IGBT elements QR 1 , QR 2 , QU 1 , and QU 2 is turned on when a voltage of an “H” level is applied between the gate and the emitter, and is turned off when a voltage of an “L” level is applied between the gate and the emitter. The configuration of gate drive circuit substrate 21 , gate resistors 31 and 32 is identical to each of the configuration of gate drive circuit substrate 22 , gate resistors 33 and 34 ; the configuration of gate drive circuit substrate 23 , gate resistors 35 and 36 ; and the configuration of gate drive circuit substrate 24 , gate resistors 37 and 38 .

FIG. 7 is a block diagram showing the configuration and the layout of drive unit 2 and power conversion unit 3 in the case where the uninterruptible power supply device is of the second type, and shows a diagram compared with FIG. 4 . In FIG. 7 , since the rated power of the second-type uninterruptible power supply device is approximately twice as much as the rated power of the first-type uninterruptible power supply device, two sets of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 are used. Furthermore, two sets of power modules MR, MU, MS, MV, MT MW, MC 1 , and MC 2 are arranged in one row, which lengthens the device dimension. Accordingly, two sets of power modules MR, MU, MS, MV MT, MW, MC 1 , and MC 2 are arranged in two rows.

In other words, in the second-type uninterruptible power supply device, drive circuit 2 includes two sets of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 , four gate drive circuit substrates 61 to 64 , 16 gate resistors 71 to 78 and 81 to 88 , a wiring board 89 of a rectangular shape, and capacitor C 7 .

Gate drive circuit substrates 61 and 62 are arranged in one row vertically as seen in FIG. 7 on one side of wiring board 89 , and connected via their respective four-core cables CB 1 and CB 3 to output ports 13 and 15 , respectively, in FIG. 3 . Gate drive circuit substrates 63 and 64 are arranged in one row vertically as seen in FIG. 7 on the other side of wiring board 89 , and connected via their respective four-core cables CB 2 and CB 4 to output ports 14 and 16 , respectively, in FIG. 3 .

PWM signals ΦR 1 , ΦR 2 , ΦS 1 , and ΦS 2 are supplied from PWM circuit 11 via four-core cable CB 1 to gate drive circuit substrate 61 . PWM signals ΦT 1 , ΦT 2 , ΦC 1 , and ΦC 2 are supplied from PWM circuit 11 via four-core cable CB 3 to gate drive circuit substrate 62 . PWM signals ΦU 1 , ΦU 2 , ΦV 1 , and ΦV 2 are supplied from PWM circuit 11 via four-core cable CB 2 to gate drive circuit substrate 63 . PWM signals ΦW 1 , ΦW 2 , ΦC 3 , and ΦC 4 are supplied from PWM circuit 11 via four-core cable CB 4 to gate drive circuit substrate 64 .

Gate resistors 71 to 78 are arranged in one row adjacent to gate drive circuit substrates 61 and 62 . Power modules MR, MR, MS, MS, MT, MT, MC 1 , and MC 1 are adjacent to gate resistors 71 to 78 , respectively, arranged in one row along one of the long sides of wiring board 89 , and fixed to wiring board 89 .

Gate resistors 81 to 88 are arranged in one row adjacent to gate drive circuit substrates 63 and 64 . Power modules MU, MU, MV, MV, MW, MW, MC 2 , and MC 2 are adjacent to gate resistors 81 to 88 , respectively, arranged in one row along the other of the long sides of wiring board 89 , and fixed to wiring board 89 .

Each of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 has the first to third output terminals. The first output terminal of each of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 is connected to positive voltage node N 1 . The second output terminals of power modules MR, MU, MS, MV, MT, and MW are connected to R-phase terminal TR, U-phase terminal TU, S-phase terminal TS, V-phase terminal TV, T-phase terminal TT, and W-phase terminal TW, respectively. The second output terminal of each of power modules MC 1 and MC 2 is connected to battery terminal TBP. The third output terminal of each of power modules MR, MU, MS, MV, MT, MW, MC 1 , and MC 2 is connected to negative voltage node N 2 and battery terminal TBN. Capacitor C 7 is connected between nodes N 1 and N 2 .

Gate drive circuit substrate 61 drives one power module MR via gate resistor 71 in accordance with PWM signals ΦR 1 and ΦR 2 , and also drives the other power module MR via gate resistor 72 in accordance with PWM signals ΦR 1 and ΦR 2 . Furthermore, gate drive circuit substrate 61 drives one power module MS via gate resistor 73 in accordance with PWM signals ΦS 1 and ΦS 2 , and also drives the other power module MS via gate resistor 74 in accordance with PWM signals ΦS 1 and ΦS 2 .

Gate drive circuit substrate 62 drives one power module MT via gate resistor 75 in accordance with PWM signals ΦT 1 and ΦT 2 , and also drives the other power module MT via gate resistor 76 in accordance with PWM signals ΦT 1 and ΦT 2 . Furthermore, gate drive circuit substrate 62 drives one power module MC 1 via gate resistor 77 in accordance with PWM signals ΦC 1 and ΦC 2 , and also drives the other power module MC 1 via gate resistor 78 in accordance with PWM signals ΦC 1 and ΦC 2 .

Gate drive circuit substrate 63 drives one power module MU via gate resistor 81 in accordance with PWM signals ΦU 1 and ΦU 2 , and also drives the other power module MU via gate resistor 82 in accordance with PWM signals ΦU 1 and ΦU 2 . Furthermore, gate drive circuit substrate 63 drives one power module MV via gate resistor 83 in accordance with PWM signals ΦV 1 and ΦV 2 , and also drives the other power module MV via gate resistor 84 in accordance with PWM signals ΦV 1 and ΦV 2 .

Gate drive circuit substrate 64 drives one power module MW via gate resistor 85 in accordance with PWM signals ΦW 1 and ΦW 2 , and also drives the other power module MW via gate resistor 86 in accordance with PWM signals ΦW 1 and ΦW 2 . Furthermore, gate drive circuit substrate 64 drives one power module MC 2 via gate resistor 87 in accordance with PWM signals ΦC 3 and ΦC 4 , and also drives the other power module MC 2 via gate resistor 88 in accordance with PWM signals ΦC 3 and ΦC 4 .

In this embodiment, a plurality of PWM signals generated in PWM circuit 11 are arranged in order in accordance with the type of the uninterruptible power supply device and supplied to a plurality of output terminals, which allows control unit 1 to be shared among a plurality of types of uninterruptible power supply devices. Therefore, the uninterruptible power supply device can be reduced in cost.

It should be understood that the embodiments disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 control unit, 2 drive unit, 3 power conversion unit, 4 battery, 5 commercial AC power supply, 6 load, 10 substrate, 11 PWM circuit, 12 switching circuit, 13 to 16 output port, 21 to 24 , 61 to 64 gate drive circuit substrate, 31 to 38 , 71 to 78 , 81 to 88 gate resistor, 39 , 89 wiring board, 40 converter, 41 chopper, 42 inverter, 50 to 53 driver, 54 to 57 resistance element, C capacitor, L reactor, T terminal, CB four-core cable, Q IGBT element, D diode.