Image sensor and row averaging method for image sensor

The present invention claims priority to Korean Patent Application No. 10-2011-0100722 (filed on Oct. 4, 2011), which is hereby incorporated by reference in its entirety.

In an image sensor, in particular, a. CMOS (Complementary Metal-Oxide Semiconductor) image sensor, each frame is constituted by N×M unit pixels. When the image sensor is operating in a low-resolution mode, the outputs of only some of the unit pixels, not all the unit pixels, are sent.

The low-resolution mode in which the image sensor operates includes a sub-sampling mode and a binning mode.

For example, when the image sensor is operating with a resolution which is a quarter of the full resolution, it should suffice that only the outputs of the N/2×M/2 pixels from among all the N×M pixels are sent. In the sub-sampling mode, an operation is performed such that the outputs of the N/2 row pixels are sent, and the outputs of the remaining N/2 row pixels are not sent. Meanwhile, in the binning mode, the outputs of pixels of the same color in two adjacent pixels are added and output as a single pixel output value. In the binning mode, there is no pixel output value to be discarded, so that an image is formed using all the pixel output values, thereby obtaining a high-quality image as compared to the sub-sampling mode.

FIG. 1 illustrates the sub-sampling mode and the binning mode.

As illustrated in FIG. 1 , in the sub-sampling mode, only pixel information of the pixels in the first and second rows from among the pixels in the four total rows of the pixel array 10 can be output, for example, only pixel information of Gb 41 -B 41 -Gb 42 -B 42 -Gb 43 -B 43 and R 31 -Gr 31 -R 32 -Gr 32 -R 33 -Gr 33 can be output.

In order to minimize noise for the pixel information to be read in the sub-sampling mode, the binning mode may be executed in which the read pixel information and unread pixel information of the pixels in the third and fourth rows, for example, pixel information of Gb 21 -B 21 -Gb 22 -B 22 -Gb 23 -B 23 and R 11 -Gr 11 -R 12 -Gr 12 -R 13 -Gr 13 are added (averaged).

At this time, in the sub-sampling mode and the binning mode of the whole pixel array, the pixel information of Gb 41 -B 41 -Gb 42 -B 42 -Gb 43 -B 43 of the first row is temporarily stored in a line memory 12 and added to the pixel information of Gb 21 -B 21 -Gb 22 -B 22 -Gb 23 -B 23 of the third row having the same color arrangement as the pixel information of the first row, and averaging is performed. Next, the pixel information of R 31 -Gr 31 -R 32 -Gr 32 -R 33 -Gr 33 of the second row is temporarily stored in the line memory 12 and added to the pixel information of R 11 -Gr 11 -R 12 -Gr 12 -R 13 -Gr 13 of the fourth row having the same color arrangement as the pixel information of the second row, and averaging is performed.

In the image sensor of the related art, since it is necessary to store previous information so as to obtain an average in the sub-sampling mode and the binning mode, there is a need for the additional line memory 12 , and it is necessary to separately read pixel information of two rows for obtaining an average two times.

This leads to an increase in a whole memory area and a decrease in the sensing timing of the pixels to be equal to or lower than 50%.

In view of the above, embodiments relate to an image sensor and a row averaging method for an image sensor capable of preventing an increase in an area and a decrease in the sensing speed of pixels in a sub-sampling mode and a Binning mode.

Embodiments also relate to an image sensor and a row averaging method for an image sensor capable of simultaneously selecting the pixels of the same color in the same column of different rows in a pixel array and performing a signal process, thereby preventing an increase in a memory area and a decrease in a sensing speed in the sub-sampling mode and the binning mode of an image sensor.

In accordance with embodiments, there is provided an image sensor having a pixel array with a plurality of pixels arranged in rows and columns. The image sensor may include light-receiving units which are respectively formed in the pixels in the pixel array, a signal processing unit for reading pixel signals generated by the light-receiving units and performs a signal process, and a timing control unit controlling the switching timing of the signal processing unit such that pixels of the same color in the same column of different rows in the pixel array may be simultaneously selected and subjected to the signal process.

The average value of the signals of the pixels of the same color may be output through the signal processing unit.

The timing control unit may perform control such that selection transistors of different rows may be turned on to select different rows, reset transistors of the pixels in the same column may be simultaneously turned on/off to simultaneously initialize the pixels in the same column of different rows, and transfer transistors of the pixels in the same column may be simultaneously turned on/off to simultaneously transfer the signals of the pixels in the same column to a signal detection unit.

The signal processing unit may include selection transistors for simultaneously selecting different rows having the same color arrangement in the pixel array, reset transistors for simultaneously initializing the pixels in the same column of different rows to be selected, and transfer transistors for simultaneously transferring the signals of the pixels in the same column to a signal detection unit in the corresponding column.

The timing control unit may perform control such that selection transistors of different rows may be simultaneously turned on to select different rows, reset transistors of the pixels in the same column may be simultaneously turned on/off to simultaneously initialize the pixels in the same column of different rows, and transfer transistors of the pixels in the same column may be simultaneously turned on/off to simultaneously transfer the signals of the pixels in the same column to a signal detection unit.

In accordance with embodiments, there is provided a row averaging method for an image sensor. The row averaging method may include simultaneously performing a signal process on the signals of the pixels of the same color in the same column of different rows in the pixel array and outputting the average value of the signals of the pixels.

In embodiments, outputting the average value may include simultaneously selecting different rows having the same color arrangement in the pixel array.

Further, outputting the average value may include simultaneously initializing the pixels in the same column of different rows and/or simultaneously outputting the signals of the pixels in the same column of different rows.

In accordance with embodiments, the pixels of the same color in the same column of different rows in the pixel array may be simultaneously selected and subjected to the signal process, thereby leading, to a decrease in a memory area and/or memory usage and the fast sensing timing of the pixels in the sub-sampling mode and the binning mode of the image sensor.

The objects and features of the present invention will become apparent from the following description of an embodiment given in conjunction with the accompanying drawings, in which:

FIG. 1 illustrates the operation of an image sensor of the related art in a sub-sampling mode and a binning mode.

Example FIG. 2 illustrates an image sensor and a row averaging method for an image sensor in a sub-sampling mode and a binning mode in accordance with embodiments.

Example FIG. 3 is a functional block diagram illustrating an image sensor capable of performing row averaging with no line memory in accordance with embodiments.

Example FIG. 4 is a detailed circuit diagram of the functional blocks of an image sensor in accordance with embodiments.

Example FIG. 5 is a control timing waveform chart illustrating row averaging in an image sensor in accordance with embodiments.

Example FIG. 6 illustrates the final output result of row averaging in an image sensor in accordance with embodiments.

Embodiments will be described herein, and variations of these embodiments may become apparent to those of ordinary skill in the art upon reading the foregoing description. Accordingly, embodiments also include all modifications and equivalents of the subject matter recited in the claims appended hereto as permitted by applicable law.

In the following description of embodiments, if structures and operations are already well established to one of ordinary skill in the art, further detailed description thereof may be omitted.

Further, in embodiments, functions described in the blocks or the sequences may be reversed in order. For example, two successive blocks and sequences may be substantially executed simultaneously or in reverse order according to corresponding functions.

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings which form a part hereof.

Example FIG. 2 illustrates an image sensor and a row averaging method for an image sensor in a sub-sampling mode and a binning mode in accordance with embodiments.

As illustrated in example FIG. 2 , in embodiments, the pixel information of the pixels in the first and second rows from among the four total rows in a sub-sampling mode of a pixel array 100 , for example, only the pixel information of Gb 41 -B 41 -Gb 42 -B 42 -Gb 43 -B 43 and R 31 -Gr 31 -R 32 -Gr 32 -R 33 -Gr 33 are output. In order to minimize noise for the row pixel information to be read in the sub-sampling mode, the read pixel information and the unread pixel information of the pixels in the third and fourth rows, for example, the pixel information of Gb 21 -B 21 -Gb 22 -B 22 -Gb 23 -B 23 and R 11 -Gr 11 -R 12 -Gr 12 -R 13 -Gr 13 are added.

At this time, in embodiments, the switching timing of the pixels is controlled such that the pixels of the same color in the same column of different rows in the pixel array 100 , for example, the pixels of the odd-numbered first and third rows in the pixel array 100 , that is, Gb 41 and Gb 21 pixels are simultaneously selected and subjected to a signal process.

Similarly, in embodiments, the switching timing of the pixels is controlled such that the pixels of the same color in the same column of different rows in the pixel array 100 , for example, the pixels in the even-numbered second and fourth rows in the pixel array 100 , that is, R 31 and R 11 pixels are simultaneously selected and subjected to a signal process.

In embodiments, the switching timing of the pixels is controlled such that the pixels having the same color arrangement in the same color of different rows in the pixel array 100 , for example, the pixels in the odd-numbered first and third rows in the pixel array 100 , that is, Gb 4 -B 41 -Gb 42 -B 42 -Gb 43 -B 43 and Gb 21 -B 21 -Gb 22 -B 22 -Gb 23 -B 23 pixels are simultaneously selected and subjected to the signal process.

Similarly, in embodiments, the switching timing of the pixels is controlled such that the pixels having the same color arrangement in the same column of different rows in the pixel array 100 , for example, the pixels in the even-numbered second and fourth rows in the pixel array 100 , that is, R 31 -Gr 31 -R 32 -Gr 32 -R 33 -Gr 33 and R 11 -Gr 11 -R 12 -Gr 12 -R 13 -Gr 13 pixels are simultaneously selected and subjected to the signal process.

In embodiments, the signal process includes, for example, a step of reading and converting the signals of the pixels.

Example FIG. 3 is a functional block diagram of an image sensor capable of performing row averaging without using a line memory in accordance with embodiments. The image sensor may include a light-receiving unit 101 , a signal processing unit 102 , and a timing control unit 104 .

The light-receiving unit 101 may include a plurality of pixels arranged in a pixel array in rows and columns, such as the pixel array 100 . For example, an odd-numbered column may have a structure in which four pixels are repeated in order of G, B, G, and B (G is a green filter, and B is a blue filter), and an even-numbered column may have a structure in which four pixels are repeated in order of R, G, R, and G (R is a red filter).

The signal processing unit 102 reads the pixel signal of the light-receiving unit 101 and performs a signal process. For example, the signal processing unit 102 may be switched under the control of the timing control unit 104 as described below to simultaneously select the pixels (or a plurality of pixels) of the same color (or having the same color arrangement) in the same column of different rows in the pixel array 100 of the light-receiving unit 101 and to perform the signal process including, for example, reading and converting.

The average value of the signals of the pixels having the same color is output through the signal processing unit 102 .

The timing control unit 104 may control the switching timing of the signal processing unit 102 such that the light-receiving units of the pixels of the same color in the same column of different rows in the pixel array 100 are simultaneously selected and the signal process is performed.

As shown in example FIG. 4 , the signal processing unit 102 which is controlled by the timing control unit 104 may include selection transistors Sx< 0 > and Sx< 1 > which simultaneously select the light-receiving units of the pixels (for example, Gb 41 and Gb 21 ) of the same color in the pixel array 100 , for example, PD< 0 > and PD< 2 >, reset transistors Rx< 0 > and Rx< 1 > which simultaneously initialize the pixels selected by the selection transistors Sx< 0 > and Sx< 1 > in the same column of different rows, and transfer transistors Tx< 0 > and Tx< 2 > which simultaneously transfer the signals of the pixels in the same column to a signal detection unit Vpixel in the corresponding column.

Thus, the timing control unit 104 may perform control such that the selection transistors Sx< 0 > and Sx< 1 > in different rows are simultaneously turned on to select different rows, the reset transistors Rx< 0 > and Rx< 1 > are simultaneously turned on/off to simultaneously initialize the pixels in the same column of different rows, and the transfer transistors Tx< 0 > and Tx< 2 > of the pixels in the same column are simultaneously turned on/off to simultaneously transfer the signals of the pixels in the same column to the signal detection unit Vpixel.

Although the pixels of the same color in the same column of different rows have been illustrated in embodiments, it should be noted that a plurality of pixels (for example, Gb 41 -B 41 -Gb 42 -B 42 -Gb 43 -B 43 ) having the same color arrangement may also be applied. The operation of the pixels (for example, R 31 and R 11 ) of the same color in different rows having different light-receiving units PD< 1 > and PD< 3 > is similar to the operation of the pixels Gb 41 and Gb 21 described above, thus further detailed description thereof will not be repeated.

The characteristics in accordance with embodiments will be specifically described with reference to a control timing waveform chart of example FIG. 5 illustrating row averaging in the image sensor and example FIG. 6 illustrating an output result.

First, the timing control unit 104 may simultaneously turn on the selection transistors Sx< 0 > and Sx< 1 > of the signal processing unit 102 to simultaneously select the pixels (for example, Gb 41 and Gb 21 ) of the same color in different rows.

Thereafter, the timing control unit 104 may simultaneously turn on/off the reset transistors Rx< 0 > and Rx< 1 > of the pixels in the same column of different colors selected by the selection transistors to simultaneously initialize the pixels.

As will be more apparent from example FIG. 6 , with this operation, source-follower areas FD 1 and FD 2 are refreshed, and FD reset noise generated at that time and temporary noise generated in FD 1 and FD 2 are averaged and output on a bit line voltage (VBIT) node. The output average signal may be stored in a sampling capacitor.

The timing control unit 104 may perform control such that the transfer transistors Tx< 0 > and Tx< 2 > of the pixels in the same column are simultaneously turned on/off to simultaneously transfer the signals of the pixels in the same column to the signal detection unit Vpixel. That is, as shown in example FIG. 6 , the electric charges of PD< 0 > and PD< 2 > move to FD 1 and FD 2 , are converted to a voltage, and are output to VBIT. At this time, noise stored in PD< 0 > and PD< 2 > and temporary noise generated in the source-follower areas are averaged and output on the node VB 1 T.

In accordance with embodiments described above, the pixels of the same color in the same column of different rows in the pixel array may be simultaneously selected and subjected to the signal process, thereby preventing an increase in a memory area and/or memory usage and a decrease in the sensing speed of the pixels in the sub-sampling mode and the binning mode of the image sensor.

While embodiments have been shown and described above, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the scope of the invention as defined in the following claims.