Active electronically scanned array (AESA) card

This patent application is a continuation-in-part to application Ser. No. 12/484,626, filed Jun. 15, 2009 and titled “PANEL ARRAY,” which is incorporated herein in its entirety.

As is known in the art, a phased array antenna includes a plurality of active circuits spaced apart from each other by known distances. Each of the active circuits is coupled through a plurality of phase shifter circuits, amplifier circuits and/or other circuits to either or both of a transmitter and receiver. In some cases, the phase shifter, amplifier circuits and other circuits (e.g., mixer circuits) are provided in a so-called transmit/receive (T/R) module and are considered to be part of the transmitter and/or receiver.

The phase shifters, amplifier and other circuits (e.g., T/R modules) often require an external power supply (e.g., a DC power supply) to operate correctly. Thus, the circuits are referred to as “active circuits” or “active components.” Accordingly, phased array antennas which include active circuits are often referred to as “active phased arrays.” An active phased array radar is also known as an active electronically scanned array (AESA).

Active circuits dissipate power in the form of heat. High amounts of heat can cause active circuits to be inoperable. Thus, active phased arrays should be cooled. In one example heat-sink(s) are attached to each active circuit to dissipate the heat.

In one aspect, an active electronically scanned array (AESA) card includes a printed wiring board (PWB) that includes a first set of metal layers used to provide RF signal distribution, a second set of metal layers used to provide digital logical distribution, a third set of metal layers used to provide power distribution and a fourth set of metal layers used to provide RF signal distribution. The PWB comprises at least one transmit/receive (T/R) channel used in an AESA.

In another aspect, an active electronically scanned array (AESA) assembly includes an AESA card that includes a printed wiring board (PWB). The PWB includes a first set of metal layers used to provide RF signal distribution, a second set of metal layers used to provide digital logical distribution, a third set of metal layers used to provide power distribution and a fourth set of metal layers used to provide RF signal distribution. The PWB also includes one or more monolithic microwave integrated circuits (MMICs) disposed on the surface of the PWB. The PWB includes at least one transmit/receive (T/R) channel used in an AESA.

FIG. 1A is a diagram of an active electronically scanned array (AESA) with an array of active electronically scanned array (AESA) cards disposed on a mobile platform.

FIG. 1B is a diagram of the array of AESA cards in FIG. 1A .

FIG. 2 is a diagram of an example of an AESA card with monolithic microwave integrated circuits (MMICs) disposed on the surface of the AESA card.

FIG. 3 is a cross-sectional view of an AESA assembly with an AESA card, MMICs and a cooling mechanism.

FIG. 4 is a cross-sectional view of a printed wiring board (PWB).

Previous approaches to integrating active Monolithic Microwave Integrated Circuits (MMIC) for each active electronically scanned array (AESA) Transmit/Receive (T/R) Channel included disposing these components in a metal container (sometimes called a “T/R Module”), which results in an expensive assembly. In addition to high material and test labor costs, extensive non-recurring engineering (NRE) is required for changes in AESA architecture (e.g., changes in active aperture size, lattice changes, number of T/R channels per unit cell and so forth) or cooling approach. These previous approaches also use wire bonds that are used for radio frequency (RF), power and logic signals for the T/R module; however, RF wire bonds can cause unwanted electromagnetic coupling between T/R channels or within a T/R channel.

Described herein is a new T/R Channel architecture, an AESA card. The AESA card reduces assembly recurring cost and test time and significantly reduces NRE for new applications or the integration of new MMIC technologies into AESA applications. The AESA card may be fabricated using fully automated assembly process and allows for ease of modifying lattice dimensions and the number of T/R channel cells per assembly. The AESA card includes no wire bonds thereby significantly reducing if not eliminating electromagnetic coupling between T/R channels or within a T/R channel and other electromagnetic interference (EMI). Thus, there is consistent channel-to-channel RF performance.

Referring to FIGS. 1A and 1B , an AESA card may be used in a number of applications. For example, as shown in FIG. 1A , an array 12 of AESA cards 100 may be used in a mobile environment such as in a mobile platform unit 10 . In this example, the AESA cards 100 are arranged in a 4×4 array. Though FIGS. 1A and 1B depict AESA cards 100 that are in a shape of a rectangle, they may be constructed to be a circle, triangle or any polygon shape. Also, though the array 12 is in a shape of a square the array may be a rectangle, circle, triangle or any polygon arrangement. Further, the number of AESA cards 100 may be one to any number of AESA cards 100 .

In other applications, one or more AESA cards 100 may be used on the side of naval vessels, on ground structures and so forth. As will be shown herein an AESA card 100 is a “building block” to building an AESA system.

Referring to FIG. 2 , an example of an AESA card 100 is an AESA card 100 ′ that includes a printed wiring board (PWB) 101 and MMICs 104 (e.g., flip chips) on a surface of the PWB 101 (e.g., a surface 120 shown in FIG. 3 ). In this example, the AESA card 100 ′ includes a 4×8 array of T/R channel cells 102 or 32 T/R channel cells 102 . Each T/R channel cell 102 includes the MMICs 104 , a drain modulator 106 (e.g., a drain modulator integrated circuit (IC)), a limiter and low noise amplifier (LNA) 108 (e.g., a gallium-arsenide (GaAs) LNA with limiter), a power amplifier 110 (e.g., a gallium-nitride (GaN) power amplifier). The AESA card 100 ′ also includes one or more power and logic connectors 112 . Though the T/R channel cells 102 are arranged in a rectangular array, the T/R channel cells 102 may be arranged in a circle, triangle or any type of arrangement.

Referring to FIG. 3 , an AESA assembly 150 includes an AESA card (e.g., an AESA card 100 ″) with the PWB 101 and MMICs 104 disposed on the surface 120 of the PWB 101 by solder balls 105 . The AESA assembly 150 also includes a thermal spreader plate 160 coupled to each of the MMICs through thermal epoxy 152 and a cold plate 170 . The cold plate 170 includes a channel 172 to receive a fluid such as a gas or a liquid to cool the MMICs 104 . Thus, each MMIC 104 is heat sunk in parallel. That is, the thermal resistance from the heat source (e.g., MMICs 104 ) to the heat sink (cold plate 170 ) is the same for all MMICs 104 and components (e.g., the drain modulator 106 , the LNA 108 , the power amplifier 110 and so forth) in each T/R channel cell 102 across the AESA card 100 ″ thereby reducing the thermal gradient between T/R channel cells 102 . The AESA card 100 ″ radiates RF signals in the R direction.

Referring to FIG. 4 , an example of a printed wiring board (PWB) 101 is a PWB 101 ′. In one example, the thickness, t of the PWB 101 ′ is about 64 mils.

The PWB 101 ′ includes metal layers (e.g., metal layers 202 a - 202 t ) and one of an epoxy-resin layer (e.g., epoxy-resin layers 204 a - 204 m ), a polyimide dielectric layer (e.g., polyimide dielectric layers 206 a - 206 d ) or a composite layer (e.g., composite layers 208 a , 208 b ) disposed between each of the metal layers ( 202 a - 202 t ). In particular, the composite layer 208 a is disposed between the metal layers 210 e , 210 f and the composite layer 208 b is disposed between the metal layers 210 o , 210 p . The polyimide dielectric layer 206 a is disposed between the metal layers 202 g , 202 h , the polyimide dielectric layer 206 b is disposed between the metal layers 202 i , 202 j , the polyimide dielectric layer 206 c is disposed between the metal layers 202 k , 202 l and the polyimide dielectric layer 206 d is disposed between the metal layers 202 m , 202 n . The remaining metals layers include an epoxy-resin layer (e.g., one of epoxy-resin layers 204 a - 204 m ) disposed between the metal layers as shown in FIG. 4 .

The PWB 101 ′ also includes RF vias (e.g., RF vias 210 a , 210 b ) coupling the metal layer 202 d to the metal layer 202 q . Each of the RF vias 210 a , 210 b includes a pair of metal plates (e.g., the RF via 210 a includes metal plates 214 a , 214 b and the RF via 210 b includes metal plates 214 c , 214 d ). The metal plates 214 a , 214 b are separated by an epoxy resin 216 a and the metal plates 214 c , 214 d are separated by an epoxy resin 216 b . Though not shown in FIG. 4 , one of ordinary skill in the art would recognize that other type vias exist for the digital logic layers and the power layers to bring these signals to a surface of the AESA card 100 ″ or to other metal layers.

The PWB 101 ′ also includes metal conduits (e.g., metal conduits 212 a - 212 l ) to electrically couple the RF vias 210 a , 210 b to the metal layers 202 a , 202 t . For example, the metal conduits 212 a - 212 c are stacked one on top of the other with the metal conduit 212 a coupling the metal layer 202 a to the metal layer 202 b , the metal conduit 212 b coupling the metal layer 202 b to the metal layer 202 c and the metal conduit 212 c coupling the metal layer 202 c to the metal layer 202 d and to the RF via 210 a . The metal conduits 212 a - 212 l are formed by drilling holes (e.g., about 4 or 5 mils in diameter) into the PWB 101 ′ and filling the holes with a metal.

Further, the metal conduits 212 d - 212 f are stacked one on top of the other with the metal conduit 212 d coupling the metal layer 202 r and the RF via 210 a to the metal layer 202 s , the metal conduit 212 e coupling the metal layer 202 s to the metal layer 202 t and the metal conduit 212 f coupling the metal layer 202 t to the metal layer 202 u.

The metal layers 202 a - 202 c and the epoxy-resin layers 204 a - 204 b are used to distribute RF signals. The metal layers 202 p - 202 t , the epoxy-resin layers 204 j - 204 m are also used to distribute RF signals. The metal layers 202 c - 202 e and the epoxy-resin layers 204 c - 204 d are used to distribute digital logic signals. The metal layers 202 f - 202 o , the epoxy-resin layers 204 e - 204 i and the polyimide dielectric layers 206 a - 206 d are used to distribute power.

In one example, one or more of the metal layers 202 a - 202 r includes copper. Each of metal layers 202 a - 202 t may vary in thickness from about 0.53 mils to about 1.35 mils, for example. In one example the RF vias 210 a , 210 b are made of copper. In one example, the metal conduits 212 a - 212 l are made of copper.

In one example, each of the epoxy-resin layers 204 a - 204 m includes a high-speed/high performance epoxy-resin material compatible with conventional FR-4 processing and has mechanical properties that make it a lead-free assembly compatible to include: a glass transition temperature, Tg, of about 200° C. (Differential scanning calorimetry (DSC)), a coefficient of thermal expansion (CTE)<Tg 16, 16 & 55 ppm/° C. and CTE>Tg 18, 18 & 230 ppm/° C. The low CTE and a high Td (decomposition temperature) of 360° C. are also advantageous in the sequential processing of the stacked metal conduits 212 a - 212 l . Each of the epoxy-resin layers 204 a - 204 m may vary in thickness from about 5.6 mils to about 13.8 mils, for example. In one particular example, the epoxy-resin material is manufactured by Isola Group SARL under the product name, FR408HR. In one example, the epoxy resin 216 a , 216 b is the same material used for the epoxy-resin layers 204 a - 204 m.

In one example, each of the polyimide dielectric layers 206 a - 206 d includes a polyimide dielectric designed to function as a power and ground plane in printed circuit boards for power bus decoupling and provides EMI and power plane impedance reduction at high frequencies. In one example, each of the polyimide dielectric layers is about 4 mils. In one particular example, the polyimide dielectric is manufactured by DUPONT® under the product name, HK042536E.

In one example, each of the composite layers 208 a , 208 b includes a composite of epoxy resin and carbon fibers to provide CTE control and thermal management. In one example, the composite layers may be function as a ground plane and also may function as a mechanical restraining layer. In one example, each of the composite layers is about 1.8 mils. In one particular example, the composite of epoxy resin and carbon fibers is manufactured by STABLCOR® Technology, Inc. under the product name, ST10-EP387.

In one example, the materials described above with respect to fabricating an AESA card are lead-free. Thus, the solution proposed herein is meets environmental regulations requiring products that are lead-free.

The processes described herein are not limited to the specific embodiments described. Elements of different embodiments described herein may be combined to form other embodiments not specifically set forth above. Other embodiments not specifically described herein are also within the scope of the following claims.