USPatent applicationPatented

Systems and methods for vertically stacking a sensor on an integrated circuit chip

Granted 2 Jul 2013 · 2 office actions

Assignee: Honeywell International

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Attorney: Attorney · Log in to unlock

Inventors: Chia-Ming Liu · Examiner: Minh-Loan T Tran

Life of the application

10 dated events
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Abstract

A sensing unit package with reduced size and improved thermal sensing capabilities. An exemplary package includes a printed circuit board with a plurality of electrical traces, an application-specific integrated circuit (Analog ASIC) chip, and a micromachined sensor formed on a microelectromechanical system (MEMS) die. The Analog ASIC chip is electrically and mechanically attached to the printed circuit board. The MEMS die is in direct electrical communication with only a portion of the electrical traces of the printed circuit board and is mechanically and thermally attached directly to the Analog ASIC chip. A thermally conducting compound is located between the MEMS die and the Analog ASIC chip. One or more solder balls electrically attach the Analog ASIC chip to the printed circuit board and one or more solder traces electrically attach the MEMS die to the printed circuit board.

Description

4 parts
›BACKGROUND OF THE INVENTION

Previous approaches have placed the application-specific integrated circuit (Analog ASIC) chip on the opposite side of a printed circuit board (PCB) from where a microelectromechanical system (MEMS) sensor, such as an accelerometer or gyroscope, is located. The Analog ASIC chip includes a temperature sensor designed to sense the temperature of the MEMS sensor, but the sensed temperature value is greatly dissipated with this approach because the heat produced by the MEMS sensor must be conducted through the PCB. Thus, the accuracy of sensed MEM sensor temperature is greatly reduced.

U.S. Patent Application Publication No. 2009/0282917 to Acar provides an integrated micromachined inertial sensing unit with multi-access angular rate and acceleration sensors. Acar discloses placing one or more sensors on top of an ASIC chip, as shown in FIGS. 1-3 . However, Acar is unconcerned with providing adequate thermal conduction between the sensor and the ASIC chip. Acar shows that the sensors are electrically attached to the ASIC chip through metal vias. The ASIC chip includes electrical traces and signal condition circuitry for receiving and amplifying/processing signals produced by the sensor. Because there appears to be a physical gap between the sensor and the ASIC chip, the thermal conduction capabilities between the sensor and the ASIC chip would be possibly worse than the design in which the sensor is located on one side of a PCB and the ASIC chip is located on the opposite side of the PCB.

›SUMMARY OF THE INVENTION

The present invention provides a sensing unit package with reduced size and improved thermal sensing capabilities. An exemplary package includes a printed circuit board with a plurality of electrical traces, an analog application-specific integrated circuit (Analog ASIC) chip, and a micromachined sensor formed on a microelectromechanical system (MEMS) die. The Analog ASIC chip is electrically and mechanically attached to the printed circuit board. The MEMS die is in direct electrical communication with only a portion of the electrical traces of the printed circuit board and is mechanically and thermally attached directly to the Analog ASIC chip.

In one aspect of the invention, the sensor includes at least one of an accelerometer or an angular rate sensor.

In another aspect of the invention, the MEMS die is a leadless chip carrier package or a wafer-level chip-scale package (WLCSP).

In still another aspect of the invention, a thermally conducting compound/epoxy is located between the MEMS die and the Analog ASIC chip.

In yet another aspect of the invention, one or more solder balls electrically attach the Analog ASIC chip to the printed circuit board and one or more solder traces electrically attach the MEMS die to the printed circuit board.

›BRIEF DESCRIPTION OF THE DRAWINGS

Preferred and alternative embodiments of the present invention are described in detail below with reference to the following drawings:

FIG. 1-1 illustrates a side cross-sectional view of a sensor package formed in accordance with an embodiment of the present invention;

FIG. 1-2 illustrates a perspective view of the sensor package shown in FIG. 1 ;

FIG. 2 illustrates a schematic block diagram of an Analog ASIC chip used in the package shown in FIG. 1 ; and

FIG. 3 illustrates a top schematic view of a three-axis accelerometer or gyroscope formed in accordance with an embodiment of the present invention.

›DETAILED DESCRIPTION OF THE INVENTION

FIGS. 1-1 and 1 - 2 illustrate a package 20 formed in accordance with an embodiment of the present invention. The package 20 includes a sensor 28 that is mounted to an analog application-specific integrated circuit (Analog ASIC) chip 26 that is mounted to a printed circuit board (PCB) 24 .

The Analog ASIC chip 26 is electrically attached to the PCB 24 using one or more solder balls 32 . The PCB 24 includes a circuit previously patterned for receiving the solder balls, thereby creating an electrical connection between components within the Analog ASIC chip 26 and circuitry on the PCB 24 .

In one embodiment, a nonelectrically conductive epoxy 34 is injected with syringe on the corner between the Analog ASIC chip 26 and the PCB 24 . The area under the Analog ASIC chip 26 is filled through the capillary action. After the Analog ASIC chip 26 is attached to the PCB 24 , a thermally conductive, low coefficient of thermal expansion (CTE) epoxy 36 , such as Master Bond EP30LTE-LO or thermal compound, is applied on the topside of the Analog ASIC chip 26 . The sensor 28 is then placed on top of the Analog ASIC chip 26 and secured in place with a metal clip with non-abrasive tips during the epoxy cure stage. The sensor 28 may have been previously packaged a number of different ways, such as by leadless chip carrier (LCC) packaging or wafer-level chip-scale packaging (WLCSP).

The sensor 28 is then electrically connected to electrical pads or traces located on the surface of the PCB 24 . In one embodiment, one or more solder leads 38 are used to electrically connect the sensor 28 to the PCB 24 . In one embodiment, wire bonds may be used for electrically connecting the sensor 28 to the PCB 24 .

FIG. 2 shows a block diagram of the Analog ASIC chip 26 shown in FIG. 1 . The Analog ASIC chip 26 includes a processor 40 , a temperature sensor 42 , a memory device 44 , and a communication device 46 . The processor 40 is in signal communication with the temperature sensor 42 , the memory 44 , and the communication device 46 . The communication device 46 receives signals to and from the attached sensor 28 and a Digital ASIC (not shown) via the circuit traces on the PCB 24 , the solder leads 38 , and the solder balls 32 . The temperature sensor 42 senses temperature of the sensor 28 via the thermally conductive compound/epoxy 36 .

FIG. 3 shows a top view of a sensor package 100 . The sensor package 100 includes a PCB 102 , three sensor/Analog ASIC chip packages 120 that are similar to that shown in FIG. 1 , a Digital ASIC 122 , and a connector device 104 . The Digital ASIC 122 connects the sensor package 100 (i.e., all of the packages 120 ) via the circuit traces on the PCB 102 . The connector device 104 allows the Digital ASIC 122 to electrically connect to an external component, such as micro board with Central Process Unit (CPU) for data process and management. The PCB 102 includes electrical traces between the sensor Analog ASIC chip packages 120 , Digital ASIC 122 , and the connector device 104 .

While the preferred embodiment of the invention has been illustrated and described, as noted above, many changes can be made without departing from the spirit and scope of the invention. Accordingly, the scope of the invention is not limited by the disclosure of the preferred embodiment. Instead, the invention should be determined entirely by reference to the claims that follow.

Claims as granted

7 claims

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Classifications

9 codes
IPC · International Patent Classification
Section H — Electricity
  • H10D48/50
USPC · US Patent Classification
257/415257/E29.324257/737438/121257/E21.506438/48257/656438/118

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File wrapper

⤢ drag to zoomJul 2011Oct 2011Jan 2012Apr 2012Jul 2012Oct 2012Jan 2013Apr 2013Jul 2013USPTOApplicantNon-final rejectionResponse after non-finalFinal rejectionResponse after final
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Pendency
2.0 y
734 days filing → grant
Office actions
2
non-final + final
Responses
2
no RCE
Examiner
Minh-Loan T Tran
art unit —
Citations: 10 back · 2 forward

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Chain of title

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