Semiconductor light-emitting structure having low thermal stress

1. Technical Field

The present disclosure relates to a semiconductor structure, and more particularly, to a semiconductor light-emitting structure having low thermal stress.

2. Description of Related Art

As new type light source, LEDs are widely used in various applications. An LED includes an LED chip to emit light. A conventional LED chip includes a substrate, and an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer sequentially grown on the substrate. The substrate is generally made of sapphire (Al 2 O 3 ) for providing growing environment to the layers. However, such a sapphire substrate has a low heat conductivity, causing that heat generated by the layers cannot be timely dissipated. Therefore, a new type substrate made of Si is developed. Such a Si substrate has a heat conductivity larger than that of the sapphire substrate so that the heat generated by the layers can be effectively removed.

Nevertheless, the coefficient of thermal expansion (CTE) of the Si substrate does not well match with that of the layers. Thus, during operation of the LED chip, the Si substrate has a deformation different from that of the layers, resulting in a thermal stress concentrated at an interface between the substrate and the layers. Such concentrated thermal stress may cause fracture of the layers or even damage of the LED chip.

What is needed, therefore, is a semiconductor light-emitting structure which can overcome the limitations described above.

Many aspects of the present disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.

FIG. 1 shows a schematic cross-section of a semiconductor light-emitting structure of a first embodiment of the present disclosure.

FIG. 2 shows a schematic cross-section of a semiconductor light-emitting structure of a second embodiment of the present disclosure.

FIG. 3 shows a schematic cross-section of a semiconductor light-emitting structure of a third embodiment of the present disclosure.

FIG. 4 shows a schematic cross-section of a semiconductor light-emitting structure of a fourth embodiment of the present disclosure.

Referring to FIG. 1 , a first embodiment of a semiconductor light-emitting structure 10 is provided. The semiconductor light-emitting structure 10 includes a silicon substrate 12 , a distributed Bragg reflector (DBR) 14 , a semiconductor structures layer 16 , and an epitaxy connecting layer 18 .

The silicon substrate 12 has a top surface 122 and an opposite bottom surface 124 . The distributed Bragg reflector 14 is formed on the top surface 122 of the silicon substrate 12 . The distributed Bragg reflector 14 is generally made of Ta 2 O 5 /SiO 2 , TiO 2 /SiO 2 , SiO 2 /HfO 2 or other oxides, for reflecting upwardly a portion of light generated by the semiconductor structures layer 16 which moves originally downwards towards the silicon substrate 12 , such that the luminescence efficiency of the semiconductor light-emitting structure 10 can be enhanced. The distributed Bragg reflector 14 is structured by multi-layers film. The epitaxy connecting layer 18 is formed between the distributed Bragg reflector 14 and semiconductor structures layer 16 , which is a dielectric layer for providing growing environment to the semiconductor structures layer 16 .

A method for manufacturing the epitaxy connecting layer 18 generally includes forming a patterned photoresist layer on a continuous aluminum film which is placed on the distributed Bragg reflector 14 , etching the aluminum film until to expose the top surface 122 of the silicon substrate 12 , removing the photoresist layer by etching or other methods, and oxidizing or nitriding the aluminum film on the distributed Bragg reflector 14 . The epitaxy connecting layer 18 is an Al 2 O 3 or AN film. The epitaxy connecting layer 18 can be formed on the distributed Bragg reflector 14 by other methods, such as TE (Thermal Evaporation), EBE (E-beam Evaporation), IBS (Ion beam Sputter), CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), etc.

In addition, a number of grooves 100 are extended through the distributed Bragg reflector 14 and epitaxy connecting layer 18 to divide the distributed Bragg reflector 14 and epitaxy connecting layer 18 into a plurality of individual parts.

The top surface 122 of the substrate 12 defines a plurality of concaves 126 corresponding to the grooves 100 . Each concave 126 aligns with one of the grooves 100 . A blocking layer 102 is filled in the concaves 126 of the silicon substrate 12 . In present embodiment, the blocking layer 102 is consisted of a plurality of separated pads (not labeled) in the concaves 126 of the substrate 12 .

The semiconductor structures layer 16 includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer (not shown) sequentially grown from a top face of the epitaxy connecting layer 18 . The N-type semiconductor layer may be an N-doped GaN, AlGaN, InGaN or AlInGaN layer, the P-type semiconductor layer may be a P-doped GaN, AlGaN, InGaN or AlInGaN layer, and the light-emitting layer may be a muti-quantum well structure. Since the semiconductor structures layer 16 is well known to a person skilled in the art, the details of the different layers thereof are not shown in the drawings. Since the blocking layer 102 prevents the semiconductor structures layer 16 from growing on a top surface thereof, the semiconductor structures layer 16 can only be grown on the top face of the epitaxy connecting layer 18 vertically and upwardly. During vertical growth, the semiconductor structures layer 16 also has a lateral growing trend so that discrete parts of the semiconductor structures layer 16 grown from the top face of the epitaxy connecting layer 18 would join with each other at places over the blocking layer 102 . The semiconductor structures layer 16 is thus grown to a continuous layer. Preferably, the width W of the groove 100 and the thickness d of the semiconductor structures layer 16 should conform to the relation of W<2d, the semiconductor structures layer 16 forms a plurality of triangular slots 104 over the blocking layer 102 and communicating with the grooves 100 , respectively. Each of the triangular slots 104 has a width gradually decreasing along a direction away from the silicon substrate 12 towards the semiconductor structures layer 16 .

The grooves 100 can effectively relieve concentrated thermal stress between the semiconductor structures layer 16 and the silicon substrate 12 , thereby protecting the semiconductor structures layer 16 from facture. In addition, the multi-layers distributed Bragg reflector 14 is configured for reflecting the light generated by the semiconductor structures layer 16 and originally toward the silicon substrate 12 to be away from the silicon substrate 12 ; therefore, the luminescence efficiency of the semiconductor light-emitting structure 10 can be enhanced.

Referring to FIG. 2 , a second exemplary embodiment of a semiconductor light-emitting structure 20 is provided. The semiconductor light-emitting structure 20 includes a silicon substrate 22 , a distributed Bragg reflector 24 , a semiconductor structures layer 26 , an epitaxy connecting layer 28 and a blocking layer 202 . A number of grooves 200 are formed between the semiconductor structures layer 26 and the silicon substrate 22 to divide the distributed Bragg reflector 24 and epitaxy connecting layer 28 into a plurality of individual parts. The top surface 222 of the substrate 22 defines a plurality of concaves 226 corresponding to the grooves 200 . Each concave 226 aligns with one of the grooves 200 . The blocking layer 202 is filled in the concaves 226 of the silicon substrate 22 . The semiconductor light-emitting structure 20 differs from that of the first exemplary embodiment in the distributions and configuration of the grooves 200 .

In this embodiment, the width W of the groove 22 and the thickness d of the semiconductor structures layer 26 conform to the relation of W>d, preferably W>3d. The semiconductor structures layer 26 includes a plurality of dispersed portions, and an opening 204 is formed between each two neighboring portions, over the blocking layer 202 and communicating with a corresponding groove 200 . A distance D between two adjacent openings 204 of the semiconductor structures layer 26 is equal to a width of a single light-emitting diode chip, for facilitating the cutting process of the semiconductor light-emitting structure 20 into a plurality of light-emitting diode chips and to improve the heat dissipation efficiency and luminescence efficiency of the semiconductor light-emitting structure 20 .

Referring to FIG. 3 , a third exemplary embodiment of a semiconductor light-emitting structure 30 is provided. The semiconductor light-emitting structure 30 includes a silicon substrate 32 , a distributed Bragg reflector 34 , a semiconductor structures layer 36 , and an epitaxy connecting layer 38 . A number of grooves 300 are formed between the semiconductor structures layer 36 and the silicon substrate 32 . A plurality of triangular slots 304 communicates with the grooves 300 . The triangular slots 304 are the same as the triangular slots 104 of the semiconductor light-emitting structure 10 in the first exemplary embodiment. The semiconductor light-emitting structure 30 differs from that of the first exemplary embodiment in the configuration of the silicon substrate 32 .

In this embodiment, the silicon substrate 32 includes a number of channels 306 communicating with the grooves 300 , respectively. The channels 306 extend to a bottom surface 324 of the silicon substrate 32 and each contain an electrically conductive material 308 therein. The electrically conductive material 308 extends in the groove 300 and the triangular slot 304 . The semiconductor structures layer 36 can be electrically connected to the silicon substrate 32 by the electrically conductive materials 308 .

Referring to FIG. 4 , a fourth exemplary embodiment of a semiconductor light-emitting structure 40 is provided. The semiconductor light-emitting structure 40 includes a silicon substrate 42 , a distributed Bragg reflector 44 , a semiconductor structures layer 46 , and an epitaxy connecting layer 48 . A number of grooves 400 like the grooves 200 in the second exemplary embodiment and a number of grooves 500 like the grooves 300 in the third exemplary embodiment are alternately formed between the semiconductor structures layer 46 and the silicon substrate 42 . Furthermore, an electrically conductive material 408 placed in each groove 500 extends onto the bottom surface 424 of the silicon substrate 42 .

It is believed that the present disclosure and its advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the present disclosure or sacrificing all of its material advantages, the examples hereinbefore described merely being preferred or exemplary embodiments.