Driving circuit

1. Technical Field

The present disclosure relates to circuits, and particularly, to a driving circuit.

2. Description of Related Art

Driving circuits generally include a driving chip and at least one transistor. The driving chip is connected between a power source and the at least one transistor. The transistor is connected to a load. The driving chip is configured for controlling connection/disconnection of the power source to the load. The routine driving voltage of the driving chip is a constant value. However, when the load works at a lower power draw, the actual driving voltage could be lower than the routine driving voltage and the driving circuits waste power.

Therefore, it is desirable to provide a driving circuit which can overcome the limitations described above.

The FIGURE is a circuit diagram of a driving circuit, according to an exemplary embodiment.

Exemplary embodiments of the disclosure will be described in detail, with reference to the accompanying drawing.

Referring to the drawing, a driving circuit 100 connected between a power source Vcc and a load 200 , according to an exemplary embodiment is shown. The driving circuit 100 includes a switching circuit 10 , an acquiring circuit 20 , an amplifying circuit 30 , and an adjusting circuit 40 .

The switching circuit 10 includes a driving chip 11 and a switching unit 12 . The switching unit 12 is connected between the power source Vcc and the load 200 . The driving chip 11 is configured for controlling connection and disconnection of the switching unit 12 . The driving chip 11 includes a voltage controlling terminal 111 and a driving terminal 112 . The switching unit 12 includes a transistor M 1 . The transistor M 1 includes a drain D, a source S, and a gate G. The drain D is connected to the power source Vcc. The source S is connected to the load 200 . The gate G is connected to the driving terminal 112 . The driving chip 11 is configured for outputting a driving voltage to the gate G of the transistor M 1 to control connection and disconnection of the drain D to the source S. When the driving voltage is greater than a threshold voltage of the transistor M 1 , the drain D connects to the source S. It should be understood that the switching unit 12 can further includes a number of electrical elements to regulate the voltage of the source S.

The acquiring circuit 20 is connected between the switching unit 12 and the load 200 , and is configured for providing a feedback to the amplifying circuit 30 . The acquiring circuit 20 includes an inductor L 1 , a first resistor R 1 , a second resistor R 2 , and a first capacitor C 1 . The inductor L 1 is connected between the source S of the transistor M 1 and the load 200 . The first resistor R 1 includes a first terminal connected between the inductor L 1 and the source S, and a second terminal. The second resistor R 2 includes a first terminal connected between the inductor L 1 and the load 200 , and a second terminal. The first capacitor C 1 is connected between the second terminal of the first resistor R 1 and the second terminal of the second resistor R 2 .

The amplifying circuit 30 includes two amplifying input terminals 31 and an amplifying output terminal 32 . One of the amplifying input terminals 31 is connected to the second terminal of the first resistor R 1 , and another amplifying input terminal 31 is connected to the second terminal of the second resistor R 2 . The amplifying circuit 30 includes a first amplifier A 1 , a second amplifier A 2 , a third amplifier A 3 , a slide rheostat Rf, a second capacitor C 2 , a third capacitor C 3 , a fourth capacitor C 4 , a fifth capacitor C 5 , a third resistor R 3 , a fourth resistor R 4 , a fifth resistor R 5 , a sixth resistor R 6 , a seventh resistor R 7 , an eighth resistor R 8 , a ninth resistor R 9 , and a tenth resistor R 10 . The first amplifier A 1 includes a first positive input terminal A 11 , a first negative input terminal A 12 , and a first output terminal A 13 . The second amplifier A 2 includes a second positive input terminal A 21 , a second negative input terminal A 22 , and a second output terminal A 23 . The third amplifier A 3 includes a third positive input terminal A 31 , a third negative input terminal A 32 , and a third output terminal A 33 .

The slide rheostat Rf is connected between the first negative input terminal A 12 and the second negative input terminal A 22 . The second capacitor C 2 is connected between the first positive input terminal A 11 and the first negative input terminal A 12 . The third capacitor C 3 is connected between the second positive input terminal A 21 and the second negative input terminal A 22 . One terminal of the fourth capacitor C 4 is connected to the first positive input terminal A 11 , and another terminal of capacitor C 4 is grounded. One terminal of the fifth capacitor C 5 is connected to the second positive input terminal A 21 , and another terminal is grounded. The third resistor R 3 is connected between the first output terminal A 13 and the first negative input terminal A 12 . The fourth resistor R 4 is connected between the second output terminal A 23 and the second negative input terminal A 22 . The fifth resistor R 5 is connected between the third output terminal A 33 and the third negative input terminal A 32 . The sixth resistor R 6 includes a first terminal connected the third positive input terminal A 31 and a second terminal being grounded. The seventh resistor R 7 is connected between the first positive input terminal A 11 and the second terminal of the first resistor R 1 . The eighth resistor R 8 is connected between the second positive input terminal A 21 and the second terminal of the second resistor R 2 . The ninth resistor R 9 is connected between the first output terminal A 13 and the third negative input terminal A 32 . The tenth resistor R 10 is connected between the second output terminal A 23 and the third positive input terminal A 31 . The third output terminal A 33 serves as the amplifying output terminal 32 , and the first positive input terminal A 11 and the second positive input terminal A 21 serve as the two amplifying input terminals 31 respectively.

The adjusting circuit 40 includes a voltage adjusting module 41 , an eleventh resistor R 11 , a twelfth resistor R 12 , a thirteenth resistor R 13 , a fourteenth resistor R 14 , a fifteenth resistor R 15 , a sixth capacitor C 6 , a seventh capacitor C 7 , an eighth capacitor C 8 , and a bipolar junction transistor (BJT) Q 1 . The voltage adjusting module 41 includes a voltage input terminal 411 , a voltage output terminal 412 , and a feedback terminal 413 . The voltage adjusting module 41 output a reference voltage Vadj from the feedback terminal 413 . The voltage input terminal 411 is connected to the power source Vcc. The voltage output terminal 412 is connected to the voltage controlling terminal 111 of the driving chip 11 . The eleventh resistor R 11 is connected between the voltage output terminal 412 and the feedback terminal 413 . One terminal of the twelfth resistor R 12 is connected to the feedback terminal 413 , and another terminal is grounded. The BJT Q 1 includes a collector C, an emitter E, and a base B. When the voltage of the base B is greater than a threshold voltage of the BJT Q 1 , the collector C connects to the emitter E. The collector C is connected between the eleventh resistor R 11 and the twelfth resistor R 12 via the thirteenth resistor R 13 . The emitter E is grounded. The base B is connected to the third output terminal A 33 via the fourteenth resistor R 14 . One terminal of the fifteenth resistor R 15 is connected to the base B, and another terminal is grounded. One terminal of the sixth capacitor C 6 is connected to the voltage input terminal 411 , and another terminal is grounded. One terminal of the seventh capacitor C 7 is connected to the voltage output terminal 412 , and another terminal is grounded. One terminal of the eighth capacitor C 8 is connected to the base B, and another terminal is grounded.

In use, the driving chip 11 outputs a driving voltage greater than the threshold voltage to the gate G of the transistor M 1 . The drain D connects to the source S, and the power source Vcc supplies power to the load 200 . The input terminals 31 respectively acquire a first voltage V 1 and a second voltage V 2 from the two terminals of the inductor L 1 . The first voltage V 1 and the second voltage V 2 are input from the first positive terminal A 11 and the second positive terminal A 21 and amplified by the first, second, third amplifiers A 1 , A 2 , A 3 . The third amplifier A 3 outputs a third voltage V 3 from the third output terminal A 33 . The value of the third voltage V 3 changes according to the power consumption of the load 200 . When the load 200 works at a lower power draw, the third voltage V 3 is a low level; when the load 200 works at a higher power draw, the third voltage V 3 is a high level.

The voltage adjusting module 41 outputs different control voltages Pvcc from the voltage output terminal 412 according to the third voltage V 3 . When the third voltage V 3 is lower than the threshold voltage of the BJT Q 1 , the thirteenth resistor R 13 is not electrically connected to the feedback terminal 413 . The voltage adjusting module 41 outputs one control voltage Pvcc from the voltage output terminal 412 equal to Vadj*(R 11 +R 12 )/R 12 . When the third voltage V 3 is greater than the threshold voltage of the BJT Q 1 , the thirteenth resistor R 13 is connected with the twelfth resistor R 12 in parallel. The voltage adjusting module 41 outputs another control voltage Pvcc from the voltage output terminal 412 equal to Vadj*(R 11 +R 12 //R 13 )/R 12 //R 13 .

The driving chip 11 is configured for outputting different driving voltages to the gate G of the transistor M 1 according to the control voltage Pvcc input from the voltage controlling terminal 111 . When the value of the control voltage Pvcc is equal to Vadj*(R 11 +R 12 )/R 12 , the driving chip 11 outputs a first driving voltage from the driving terminal 112 . When the value of the control voltage Pvcc is equal to Vadj*(R 11 +R 12 //R 13 )/R 12 //R 13 , the driving chip 11 outputs a second driving voltage from the driving terminal 112 . The second driving voltage will be greater than the first driving voltage.

It will be understood that particular exemplary embodiments are shown and described by way of illustration only. The principles and the features of the present disclosure may be employed in various and numerous exemplary embodiments thereof without departing from the scope of the disclosure as claimed. The above-described exemplary embodiments illustrate the scope of the disclosure but do not restrict the scope of the disclosure.