LED driving device

This application claims the benefits of the Taiwan Patent Application Serial Number 099115944, filed on May 19, 2010, the subject matter of which is incorporated herein by reference.

1. Field of the Invention

The present invention relates to a driving device and, more particularly, to light emitting diode (LED) driving device.

2. Description of Related Art

Alternating current LED (AC-LED) module can be directly driven by utility power for thus providing the advantage of simple architecture, as shown in FIG. 1 . However, it suffers a disadvantage in that, when the received AC voltage v ac is being increased, the current i ac flowing through AC-LED module is getting large, resulting in a droop effect that may lower the luminous efficiency. Furthermore, because the AC-LED module is sensitive to the variation of voltage, a slight change of AC voltage v ac will cause a large variation in the light output. Thus, when the AC voltage is unstable, it is likely to have a flicking effect. In addition, in order to bear the peak value of the AC voltage, the AC-LED is typically made to have a high turn-on voltage by, for example, connecting several LEDs in series, which results in a low power factor and low LED efficiency.

In the known patents, U.S. Pat. No. 6,989,807 granted to Chiang discloses an “LED driving device” that receives utility power and has high power factor and high LED efficiency. As shown in FIG. 2 , this LED driving device includes a bridge rectifier circuit 30 , a current switching circuit 10 , a plurality of LEDs and a voltage detecting circuit 20 . The bridge rectifier circuit 30 receives the AC voltage of an external power supply and converts the same into a rectified voltage. The voltage detecting circuit 20 controls the current switching circuit 10 to change the number of LEDs that are turned on according to the variation of the rectified voltage, so as to improved the power factor and the LED efficiency. However, such a constant current control architecture is complicated and the control there of is difficult, resulting in that the number of devices used in the overall circuit is excessive and thus the volume becomes large and the manufacturing cost is increased.

Therefore, it is desirable to provide an improved LED driving device to mitigate and/or obviate the aforementioned problems.

The object of the present invention is to provide an LED driving device capable of increasing the LED efficiency while avoiding complicated control architecture.

To achieve the object, the LED driving device of the present invention includes: a rectifier circuit including a pair of input terminals and first and second output terminals, for receiving an AC voltage from the pair of input terminals and rectifying the AC voltage so as to output a pulsed rectified voltage at the first and second output terminals; a first LED module and a first switch connected in series, which are electrically connected between the first and second output terminals of the rectifier circuit, wherein the first switch is controllable to switch between on and off states; a second LED module and a second switch connected in series, which are electrically connected between the first and second output terminals of the rectifier circuit, wherein the second switch is controllable to switch between on and off states; and a diode module connected between a common node of the first LED module and the first switch and a common node of the second LED module and the second switch.

Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

FIG. 1 is a schematic diagram of a typical AC-LED module;

FIG. 2 is a schematic diagram of a prior LED driving device;

FIG. 3 is a circuit diagram of the LED driving device in accordance with a first embodiment of the present invention;

FIG. 4 is a timing diagram of the LED driving device in accordance with the first embodiment of the present invention;

FIG. 5 is a circuit diagram of the LED driving device in accordance with a second embodiment of the present invention;

FIG. 6 is a timing diagram of the LED driving device in accordance with the second embodiment of the present invention;

FIG. 7 is a circuit diagram of the LED driving device in accordance with a third embodiment of the present invention; and

FIG. 8 is a timing diagram of the LED driving device in accordance with the third embodiment of the present invention.

Reference will now be made in detail to present three embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

With reference to FIG. 3 , there is shown an LED driving device in accordance with a first embodiment of the present invention, which includes: a rectifier circuit 1 , a first LED module D 1 , a first switch Q 1 , a second LED module D 2 , a second switch Q 2 , a diode module D and a control circuit 2 .

The rectifier circuit 1 includes a pair of input terminals in 1 , in 2 , and first and second output terminals o 1 , o 2 . The rectifier circuit 1 is suitable for receiving an AC voltage v in from the pair of input terminals and rectifying the AC voltage v in , so as to output a pulsed rectified voltage at the first and second output terminals o 1 , o 2 .

The serially connected first LED module D 1 and first switch Q 1 are electrically connected between the first and second output terminals o 1 , o 1 of the rectifier circuit 1 . The first switch Q 1 is controllable to switch between on and off states.

In this embodiment, the first LED module D 1 has a first terminal electrically connected to the first output terminal o 1 of the rectifier circuit 1 , and a second terminal, and is able to establish a current path from the first terminal to the second terminal. The first switch Q 1 includes a first N-type metal oxide semiconductor field effect transistor NMOS 1 . The transistor NMOS 1 has a drain electrically connected to the second terminal of the first LED module D 1 , a source electrically connected to the second output terminal o 2 of the rectifier circuit 1 , and a gate electrically connected to the control circuit 2 .

The serially connected second LED module D 2 and second switch Q 2 are electrically connected between the first and second output terminals o 1 , o 1 of the rectifier circuit 1 . The second switch Q 2 is controllable to switch between on and off states.

The second LED module D 2 has a first terminal and a second terminal electrically connected to the second output terminal o 2 of the rectifier circuit 2 , and is able to establish a current path from the first terminal to the second terminal. The second switch Q 2 includes a P-type metal oxide semiconductor field effect transistor PMOS. The transistor PMOS has a drain electrically connected to the first terminal of the second LED module D 2 , a source electrically connected to the first output terminal o 1 of the rectifier circuit 1 , and a gate electrically connected to the control circuit 2 .

The diode module D is connected between the common node of the first LED module D 1 and the first switch Q 1 and the common node of the second LED module D 2 and the second switch Q 2 .

In this embodiment, the diode module D has a first terminal electrically connected to the common node of the first LED module D 1 and the first switch Q 1 , and a second terminal electrically connected to the common node of the second LED module D 2 and the second switch Q 2 , and is able to establish a current path from the first terminal to the second terminal.

The control circuit 2 is electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 and the two switches Q 1 , Q 2 for controlling whether to turn on the first and second switches or not according to the rectified voltage.

In this embodiment, the control circuit 2 includes a first resistor R 1 , a second N-type metal oxide semiconductor field effect transistor NMOS 2 and a control unit 21 .

The first resistor R 1 is electrically connected between the first output terminal o 1 of the rectifier circuit 1 and the gate of the P-type metal oxide semiconductor field effect transistor PMOS.

The second N-type metal oxide semiconductor field effect transistor NMOS 2 has a drain electrically connected to the gate of the P-type metal oxide semiconductor field effect transistor PMOS, a source electrically connected to the second output terminal o 2 of the rectifier circuit 1 , and a gate. Preferably, there may be an optional voltage-dividing resistor Rv provided so that the drain of the second N-type metal oxide semiconductor field effect transistor NMOS 2 is connected to the gate of the P-type metal oxide semiconductor field effect transistor PMOS and the resistor R 1 via this voltage-dividing resistor Rv for protecting the P-type metal oxide semiconductor field effect transistor PMOS from over-voltage when the second N-type metal oxide semiconductor field effect transistor NMOS 2 is turned on.

The control unit 21 is electrically connected between the first and second output terminals o 1 , 02 of the rectifier circuit 1 and the gates of the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 for controlling whether to turn on the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 or not according to the rectified voltage. When the second N-type metal oxide semiconductor field effect transistor NMOS 2 is turned on, the voltage across on the first resistor R 1 is large enough to turn on the P-type metal oxide semiconductor field effect transistor PMOS. When the second N-type metal oxide semiconductor field effect transistor NMOS 2 is turned off, the voltage across on the first resistor R 1 is not large enough to turn on the P-type metal oxide semiconductor field effect transistor PMOS.

The control unit 21 has a second resistor R 2 , a third resistor R 3 , a fourth resistor R 4 , a fifth resistor R 5 , and a third N-type metal oxide semiconductor field effect transistor NMOS 3 .

The serially connected second and third resistors R 2 , R 3 are electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 . The common node of the second and third resistors R 2 , R 3 is electrically connected to the gates of the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 , and a first voltage VB is provided at this common node.

The serially connected fourth and fifth resistors R 4 , R 5 are electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 , and a second voltage VA is provided at the common node of the fourth and fifth resistors R 4 , R 5 .

The third N-type metal oxide semiconductor field effect transistor NMOS 3 has a drain electrically connected to the common node of the second and third resistors R 2 , R 3 , a source electrically connected to the ground, and a gate electrically connected to the common node of the fourth and fifth resistors R 4 , R 5 .

When the rectified voltage is between a first reference voltage and a second reference voltage, the control unit 21 turns on the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 ; otherwise, the control unit 21 turns off the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 .

The first reference voltage is smaller than the second reference voltage. The first reference voltage is determined by the resistances of the second and third resistors R 2 , R 3 and the threshold voltages of the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 . The second reference voltage is determined by the resistances of the fourth and fifth resistors R 4 , R 5 and the threshold voltage of the third N-type metal oxide semiconductor field effect transistor NMOS 3 .

As shown in FIG. 4 , the parameters I D1 , I D2 , I Q1 , I Q2 represent currents flowing through the first LED module D 1 , the second LED module D 2 , the transistor NMOS 1 and the transistor PMOS, respectively; the parameters V B , V A , V sg2 represent the first voltage (i.e., the control signal of the first and second switches Q 1 , Q 2 ), the second voltage (i.e., the control signal of the third N-type metal oxide semiconductor field effect transistor) and the source-gate voltage of the PMOS, respectively. When the AC voltage v in is in the positive half cycle, a description is given for five operation modes in the following. Further, in this embodiment, the voltage of the first LED module D 1 for starting to establish a current path is substantially the same as that of the second LED module D 2 for starting to establish a current path.

When the AC voltage v in is zero, the transistors NMOS 1 -NMOS 3 , PMOS are all turned off, and thus there is no current flowing through the first and second LED modules D 1 , D 2 .

Mode 1 :

When the AC voltage v in is gradually increased from zero and the rectified voltage is larger than the first reference voltage, the first voltage VB is increased to exceed the threshold voltages of the two transistors NMOS 1 , NMOS 2 , and thus the two transistors NMOS 1 , NMOS 2 are turned on. Because the transistor NMOS 2 is turned on, the source-gate voltage Vsg 2 of the transistor PMOS is increased so that the transistor PMOS is also turned on and, at this time, the first and second LED modules D 1 , D 2 are deemed to be connected in parallel between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 . At this moment, the AC voltage v in does not reach the initial turn-on voltage (i.e., the voltage for starting to establish a current path) of the first and second LED modules D 1 , D 2 , and thus there is no current flowing through. When the AC voltage v in is gradually increased to turn on the first and second LED modules D 1 , D 2 , mode 2 is entered.

Mode 2 :

The AC voltage v in is gradually increased to turn on and connect the first and second LED modules D 1 , D 2 in parallel. With the increasing of the AC voltage v in , the currents I D1 , I D2 are also gradually increased.

When the AC voltage v in is increased to make the rectified voltage larger than the second reference voltage, the second voltage VA is large enough to turn on the transistor NMOS 3 , and mode 3 is entered.

Mode 3 :

The AC voltage v in is gradually increased to make the second voltage VA large enough to turn on the transistor NMOS 3 , and the first voltage VB is pulled to ground level, so that the two transistors NMOS 1 , NMOS 2 are turned off and the transistor PMOS is cut off. At this moment, the first and second LED modules D 1 , D 2 are instantly transited from parallel-connection to be serially connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 . Therefore, the voltage across on the first and second LED modules D 1 , D 2 is decreased by half, and the currents I D1 , I D2 are abruptly decreased and then are increased again as the AC voltage v in is gradually increased. When the AC voltage is decreased and the rectified voltage is smaller than the second reference voltage, the value of the second voltage VA is not large enough to turn on the transistor NMOS 3 , and mode 4 is entered.

Mode 4 :

The transistor NMOS 3 is turned off, and the two transistors NMOS 1 , NMOS 2 and the transistor PMOS are turned on. The first and second LED modules D 1 , D 2 are transited from series-connection to be connected in parallel between the two output terminals o 1 , o 2 of the rectifier circuit 1 . Therefore, the voltage across on the first and second LED modules D 1 , D 2 is abruptly increased by two times, and the currents I D1 , I D2 are abruptly increased and then are decreased as the AC voltage v in is gradually decreased. When the AC voltage is decreased and the rectified voltage is smaller than the first reference voltage, the first voltage VB is lower than the threshold voltages of the two transistors NMOS 1 , NMOS 2 , and mode 5 is entered.

Mode 5 :

The two transistors NMOS 1 , NMOS 2 and the transistor PMOS are turned off, and the AC voltage v in is not large enough to turn on the first and second LED modules D 1 , D 2 . When the AC voltage v in is decreased to zero, the operation of the positive half cycle comes to an end.

When the AC voltage v in is in the negative half cycle, the operation of the circuit is similar and thus a detailed description is deemed unnecessary.

With reference to FIG. 5 , there is shown an LED driving device in accordance with a second embodiment of the present invention, which is similar to that of the first embodiment except for the following.

The voltage of the first LED module D 1 for starting to establish a current path is substantially smaller than that of the second LED module D 2 for starting to establish a current path.

When the rectified voltage is between the first and second reference voltages, the control unit 2 turns on the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 . When the rectified voltage is between the second reference voltage and a third reference voltage, the first N-type metal oxide semiconductor field effect transistor NMOS 1 is turned off and the second N-type metal oxide semiconductor field effect transistor NMOS 2 is turned on. Otherwise, the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 are turned off. The first reference voltage is smaller than the second reference voltage, and the second reference voltage is smaller than the third reference voltage.

Further, the control unit 21 includes: second to ninth resistors R 2 -R 9 , a third N-type metal oxide semiconductor field effect transistor NMOS 3 , a fourth N-type metal oxide semiconductor field effect transistor NMOS 4 .

The serially connected second and third resistors R 2 , R 3 are electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 . The common node of the second and third resistors R 2 , R 3 is electrically connected to the gate of the first N-type metal oxide semiconductor field effect transistor NMOS 1 , and a first voltage VB is outputted at this common node.

The serially connected fourth and fifth resistors R 4 , R 5 are electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 . The common node of the fourth and fifth resistors R 4 , R 5 is electrically connected to the gate of the second N-type metal oxide semiconductor field effect transistor NMOS 2 , and a third voltage VD is outputted at this common node.

The serially connected sixth and seventh resistors R 6 , R 7 are electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 , and a second voltage VA is outputted at the common node of the sixth and seventh resistors R 6 , R 7 .

The serially connected eighth and ninth resistors R 8 , R 9 are electrically connected between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 , and a fourth voltage VC is outputted at the common node of the eighth and ninth resistors R 8 , R 9 .

The third N-type metal oxide semiconductor field effect transistor NMOS 3 has a drain electrically connected to the common node of the second and third resistors R 2 , R 3 , a source electrically connected to the ground, and a gate electrically connected to the sixth and seventh resistors R 6 , R 7 .

The fourth N-type metal oxide semiconductor field effect transistor NMOS 4 has a drain electrically connected to the common node of the fourth and fifth resistors R 4 , R 5 , a source electrically connected to the ground, and a gate electrically connected to the eighth and ninth resistors R 8 , R 9 .

The first reference voltage is determined by the resistances of the second, third, fourth and fifth resistors R 2 -R 5 and the threshold voltages of the first and second N-type metal oxide semiconductor field effect transistors NMOS 1 , NMOS 2 . The second reference voltage is determined by the resistances of the sixth and seventh resistors R 6 , R 7 and the threshold voltage of the third N-type metal oxide semiconductor field effect transistor NMOS 3 . The third reference voltage is determined by the resistances of the eighth and ninth resistors R 8 , R 9 and the threshold voltage of the fourth N-type metal oxide semiconductor field effect transistor NMOS 4 .

In this embodiment, the ratio of the resistance of the second resistor R 2 to that of the third resistor R 3 is equal to the ratio of the resistance of the fourth resistor R 4 to that of the fifth resistor R 5 . When the transistors NMOS 3 , NMOS 4 are turned off, the value of third voltage VD is equal to the value of the first voltage VB.

As shown in FIG. 6 , the first voltage VB, second voltage VA, third voltage VD and fourth voltage VC represent the control signals of the transistors NMOS 1 , PMOS, NMOS 2 , NMOS 4 , respectively. Hereinafter, a description is given for nine operation modes when the AC voltage v in is in the negative half cycle.

When the AC voltage v in is zero, the transistors NMOS 1 -NMOS 3 , PMOS are all turned off, and thus there is no current flowing through the first and second LED modules D 1 , D 2 .

Mode 1 :

When the rectified voltage is gradually increased from zero to be larger than the first reference voltage, the first and third voltages VB, VD are increased to exceed the threshold voltages of the two transistors NMOS 1 , NMOS 2 , and thus the two transistors NMOS 1 , NMOS 2 are turned on. Because the transistor NMOS 2 is turned on, the source-gate voltage Vsg 2 of the transistor PMOS is increased so that the transistor PMOS is also turned on and, at this time, the first and second LED modules D 1 , D 2 are deemed to be connected in parallel between the first and second output terminals o 1 , o 2 of the rectifier circuit 1 . At this moment, the rectified voltage does not reach the initial turn-on voltage of the first and second LED modules D 1 , D 2 , and thus there is no current flowing through. When the rectified voltage is gradually increased to turn on the first LED module D 1 , mode 2 is entered.

Mode 2 :

The rectified voltage is gradually increased to turn on the first LED module D 1 . Different from the first embodiment, the rectified voltage at this time is not large enough to turn on the second LED module D 2 (in this embodiment, the turn-on voltage of D 2 is assumed to be twice of the turn-on voltage of D 1 for illustrative purpose only). Therefore, with the increasing of the AC voltage v in , the current I D1 is also gradually increased. When the rectified voltage is increased to be larger than the second reference voltage, the second voltage VA is large enough to turn on the transistor NMOS 3 , and mode 3 is entered.

Mode 3 :

The rectified voltage is increased to make the second voltage VA large enough to turn on the transistor NMOS 3 , and the first voltage VB is pulled to ground level, so that the transistor NMOS 1 is cut off. At this moment, however, the fourth voltage VC is not large enough to turn on the transistor NMOS 4 due to the relation of voltage-dividing ratio. Thus, the transistor NMOS 2 is still in on state, and the current I D1 is decreased to zero. When the rectified voltage is large enough to turn on the second LED module D 2 , mode 4 is entered.

Mode 4 :

The rectified voltage is increased to be large enough to turn on the second LED module D 2 , the current I D2 is increased. When the rectified voltage is increased to be larger than the third reference voltage, the fourth voltage VC is large enough to turn on the transistor NMOS 4 and mode 5 is entered.

Mode 5 :

When the rectified voltage is increased and the fourth voltage VC is large enough to turn on the transistor NMOS 4 , the third voltage VD is pulled to the ground level, and the transistor NMOS 2 and the transistor PMOS are both cut off. At this moment, the current I D2 is decreased to zero. When the AC voltage v in is large enough to turn on and connect the two LED modules D 1 , D 2 in series, mode 6 is entered.

Mode 6 :

When the rectified voltage is increased to be large enough to turn on and connect the two LED modules D 1 , D 2 in series, the currents I D1 , I D2 are gradually increased as the rectified voltage is increased. When the rectified voltage is gradually decreased, the currents I D1 , I D2 are slowly decreased to zero. When the rectified voltage is decreased to be smaller than the third reference voltage and the fourth voltage VC is too low to turn on the transistor NMOS 4 , mode 7 is entered.

Mode 7 :

The transistor NMOS 4 is cut off so that the transistor NMOS 2 is turned on and the transistor PMOS is also turned on. At this moment, the rectified voltage is directly across on the second LED module D 2 , and thus the current I D2 is increased abruptly and then is decreased as the rectified voltage is decreased. When the rectified voltage is decreased to be smaller than the second reference voltage so that the second voltage VA is smaller than threshold voltage of the transistor NMOS 3 , mode 8 is entered.

Mode 8 :

The rectified voltage is decreased to make the second voltage VA lower than the threshold voltage of the transistor NMOS 3 , and thus the transistor NMOS 3 is cut off and the transistor NMOS 1 is turned on. At this moment, the rectified voltage is directly across on the first LED module D 1 , and thus the current I D2 is increased abruptly and then is gradually decreased to zero as the rectified voltage is decreased. When the rectified voltage is decreased to be smaller than the first reference voltage so that the first and third voltages VB, VD are all smaller than threshold voltages of the two transistors NMOS 1 , NMOS 2 , mode 9 is entered.

Mode 9 :

The rectified voltage is decreased to make both the first and third voltages VB, VD smaller than the threshold voltages of the two transistors NMOS 1 , NMOS 2 , and thus the two transistors NMOS 1 , NMOS 2 and the transistor PMOS are cut off. The rectified voltage is not large enough to turn on the first and second LED modules D 1 , D 2 . When the rectified voltage is decreased to zero, the operation of the negative half cycle comes to an end.

When the AC voltage v in is in the positive half cycle, the operation of the circuit is similar and thus a detailed description is deemed unnecessary.

With reference to FIG. 7 , there is shown an LED driving device in accordance with a third embodiment of the present invention, which is similar to that of the first embodiment except for further including: a third LED module D 3 .

The third LED module D 3 has a first terminal electrically connected to the first output terminal o 1 of the rectifier circuit 1 and a second terminal electrically connected to the second output terminal o 2 of the rectifier circuit 1 , and is able to establish a current path from the first terminal to the second terminal.

As shown in FIG. 8 , the parameter I D3 represents current flowing through the third LED module D 3 . Furthermore, in this embodiment, the voltage of the third LED module D 3 for starting to establish a current path is substantially the same as that of the first and second LED modules D 1 , D 2 connected in series for establishing a current path, but is not limited to this. Alternatively, the voltage of the third LED module D 3 for starting to establish a current path can be changed according to the actual requirement.

In view of the foregoing, it is known that the preferred embodiments of the present invention can be applied to drive an LED with the following advantages:

(1) The architecture is simple and the design is easy, in comparison with the voltage detecting circuit 20 of the prior LED driving device, so as to reduce the design cost; and (2) The LED can be turned on when the AC voltage v in is relatively low, thereby greatly increasing the efficiency.

Although the present invention has been explained in relation to its preferred embodiment, it is to be understood that many other possible modifications and variations can be made without departing from the spirit and scope of the invention as hereinafter claimed.