Hybrid drive migrating data from disk to non-volatile semiconductor memory based on accumulated access time

The present application claims priority from provisional U.S. Patent Application Ser. No. 61/373,753, filed on Aug. 13, 2010, the specification of which is incorporated herein by reference.

Hybrid drives are conventional disk drives augmented with a non-volatile semiconductor memory (NVSM) such as a flash which helps improve certain aspects of the disk drive. For example, the non-volatile semiconductor memory may store boot data in order to expedite the boot operation of a host computer. Another use of a NVSM may be to store frequently accessed data and/or non-sequential data for which the access time is typically much shorter than the disk (which suffers from mechanical latency including seek and rotational latency). Other policies may reduce write amplification of the NVSM in order to maximize its longevity, such as storing frequently written data to the disk (or data having a write/read ratio that exceeds a predetermined threshold).

FIG. 1A shows a disk drive according to an embodiment of the present invention comprising a head actuated over disk, and a non-volatile semiconductor memory (NVSM).

FIG. 1B is a flow diagram according to an embodiment of the present invention wherein a seek time is accumulated for a target LBA mapped to the disk, and when the accumulated seek time exceeds a threshold, the target LBA is migrated to the NVSM.

FIG. 2 is a flow diagram according to an embodiment of the present invention wherein the accumulated access time is decreased when the target LBA is written.

FIG. 3 shows an embodiment of the present invention wherein the accumulated access time is biased in response to a number of consecutive LBAs in an access command.

FIG. 4A shows an embodiment of the present invention wherein an accumulated access time is maintained for a plurality of LBA ranges, wherein an LBA ranges is migrated to the NVSM when its accumulated access time exceeds a threshold.

FIG. 4B shows an embodiment of the present invention wherein the accumulated access time is biased based on the length of seeks (within an LBA range or between LBA ranges).

FIG. 5 is a flow diagram according to an embodiment of the present invention wherein when the access time of single access command is less than a threshold (short seek), the accumulated access time is decreased to reduce the chance of migrating the LBA to the NVSM.

FIG. 6 shows an embodiment of the present invention wherein the migration threshold is increased as the life remaining of the NVSM decreases.

FIG. 7 shows an embodiment of the present invention wherein the migration threshold is decreased as the disk workload increases.

FIG. 8 shows an embodiment of the present invention wherein the migration threshold is decreased as an access frequency of the target LBA increases.

FIG. 1A shows a hybrid drive comprising a head 2 actuated over a disk 4 comprising a plurality of data tracks 6 , and a non-volatile semiconductor memory (NVSM) 8 . The hybrid drive further comprises control circuitry 10 operable to execute the flow diagram of FIG. 1B wherein an access command is received from a host (step 12 ), the access command identifying at least one target logical block address (LBA). When the target LBA is mapped to a target data track on the disk (step 14 ), the head is positioned over the target data track (step 16 ) and an accumulated access time is updated for the target LBA (step 18 ). The accumulated access time is compared to a first threshold (step 20 ), and the target LBA is migrated to the NVSM in response to the comparison (step 22 ).

In the embodiment of FIG. 1A , the disk 4 comprises embedded servo sectors 24 0 - 24 N that define the data tracks 6 . The control circuitry 10 processes a read signal 26 emanating from the head 2 to demodulate the servo sectors 24 0 - 24 N and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target track. The control circuitry 10 filters the PES using a suitable compensation filter to generate a control signal 28 applied to a voice coil motor (VCM) 30 which rotates an actuator arm 32 about a pivot in order to actuate the head 2 radially over the disk in a direction that reduces the PES.

Any suitable NVSM 8 may be employed in the embodiments of the present invention such as a suitable flash memory. In one embodiment, the NVSM 8 comprises a plurality of blocks, wherein each block comprises a plurality of memory segments referred to as pages, and each page may store one or more data sectors. The blocks are programmed a page at a time, and an entire block is erased in a unitary operation. The NVSM 8 typically provides better performance because it avoids the access latency of the disk (seek and rotational latency). However, since the capacity of the NVSM 8 is limited, in one embodiment the data migrated from the disk 4 to the NVSM 8 is selected based on the accumulated access time for the data.

In one embodiment, there is a limit to the number of times the blocks of the NVSM may be programmed and erased (referred to as endurance). When the NVSM reaches the limit of program/erase cycles it essentially reaches end of life (for subsequent write operations). Accordingly, in one embodiment of the present invention the accumulated access time is biased based on the frequency that the data is written to the disk such that frequently written data is less likely to be migrated to the NVSM. This embodiment is understood with reference to the flow diagram of FIG. 2 wherein when the access command received from the host (step 12 ) is a read command (step 34 ), the data for the LBA is read from the disk (step 36 ) and the accumulated access time adjusted by a first value (step 38 ). If the accumulated access time exceeds a threshold (step 40 ), then the data is migrated (written) to the NVSM and the LBA mapping updated to reflect the migration (step 42 ). If the access command received from the host is a write command (step 34 ), then the data for the LBA is written to the disk (step 44 ) and the accumulated access time adjusted by a second value less than the first value (step 46 ). In the embodiment of FIG. 2 , the second value decreases the accumulated access time (step 46 ) which reduces the likelihood that the data will be migrated to the NVSM.

Other factors may bias the accumulated access time, or bias the threshold, or otherwise bias the comparison that determines whether to migrate data from the disk to the NVSM. FIG. 3 shows an embodiment of the present invention wherein the control circuitry maps the LBAs of an access command to physical block addresses (PBAs) representing data sectors in the target data track. The comparison for migrating the data is biased in response to a number of consecutive PBAs so as to reduce the likelihood of migrating the data of long consecutive PBAs to the NVSM. In the example of FIG. 3 , the accumulated access time is decreased (lesser weighting) for longer sequences of PBAs and increased (higher weighting) for shorter sequences of PBAs. In one embodiment, the disk provides better performance when accessing long sequences of PBAs so there is less benefit of migrating long sequences of PBAs to the NVSM.

In one embodiment, an accumulated access time is maintained for each LBA and updated each time the LBA is accessed, and in one embodiment the degree to which the accumulated access time is adjusted is based on the access time for the current access command (which is based on the seek and rotational latency for the current access command). Referring again to the example of FIG. 3 , when the first three LBAs are accessed as part of a long sequence, the accumulated access time for each LBA is adjusted by a first value (e.g., the access time divided by the total number of LBAs in the sequence), and when the first three LBAs are accessed as part of a shorter sequence, the accumulated access time for each LBA is adjusted by a second value greater than the first value (e.g., the access time divided by the lesser number of LBAs in the shorter sequence). In one embodiment, the first value may be a negative value so that the accumulated access time is reduced when an LBA is accessed as part of a long consecutive sequence of PBAs.

FIG. 4A shows an embodiment of the present invention wherein a plurality of PBA ranges are defined, and each PBA range spans a plurality of consecutive PBAs. An accumulated access time is maintained for each PBA range, and when the accumulated access time exceeds a threshold, the LBAs assigned to the entire PBA range are migrated to the NVSM. In one embodiment, the accumulated access time is increased slower or even decreased the longer the head remains within a PBA range. This embodiment is understood with reference to the flow diagram of FIG. 5 in view of FIG. 4B . When an access command is received from the host (step 12 ) and the access time is greater than a threshold (step 48 ) (e.g., due to a long seek from PBA range 2 to PBA range 6 of FIG. 4B ), the accumulated access time for the target PBA range is increased (step 50 ). If the accumulated access time for the PBA range exceeds a threshold (step 52 ), the LBAs mapped to the PBA range are migrated to the NVSM (step 54 ). If the access time is less than the threshold (step 48 ) (e.g., due to a short seek within the same PBA range), the accumulated access time for the target PBA range is decreased (step 56 ) thereby reducing the likelihood of migration to the NVSM. Referring again to FIG. 4B , if the head remains within PBA range 2 for an extended period but periodically seeks to PBA range 6 and then back to PBA range 2, the accumulated access time for PBA range 6 will eventually exceed the migration threshold. After migrating the LBAs mapped to PBA range 6 to the NVSM, the seeks to PBA range 6 are avoided thereby increasing the performance of the hybrid drive.

In one embodiment, the hybrid drive employs static LBA mapping wherein each LBA remains statically mapped to a corresponding PBA of the disk (unless a data sector is relocated due to a grown defect). In another embodiment, the hybrid drive employs dynamic LBA mapping (log structured) wherein the LBAs are mapped to different PBAs during each write operation. For example, dynamic LBA mapping may employ a circular buffer on the disk wherein the LBAs of a new write command are mapped to the PBAs corresponding to the head of the circular buffer. In this manner, a seek to a target data track may be needed to read previously written LBAs but not to service a new write command if the head is already located at the head of the circular buffer. In one embodiment, the PBA ranges shown in FIG. 4A correspond to sections of the same circular buffer. In an alternative embodiment, the PBA ranges shown in FIG. 4A each correspond to a different circular buffer, wherein an LBA range is assigned to each circular buffer.

In one embodiment, after migrating an LBA (or LBAs of a PBA range) to the NVSM, the control circuitry tracks how frequently the migrated LBAs are accessed. When the access frequency of a migrated LBA falls below a threshold, the control circuitry migrates the LBA (or LBAs) back to the disk in order to free space in the NVSM.

FIG. 6 shows an embodiment of the present invention wherein the migration threshold is increased as the life remaining of the NVSM decreases (due to the number of program/erase cycles increasing). This embodiment biases the comparison of the accumulated access time so as to reduce the likelihood of migration as the life remaining of the NVSM decreases, thereby extending the life of the NVSM by reducing write amplification.

FIG. 7 shows an embodiment of the present invention wherein the migration threshold is decreased as the workload of disk access commands increases. This embodiment biases the comparison of the accumulated access time so as to increase the likelihood of migration when the disk workload increases. The disk workload may be determined in any suitable manner, such as by evaluating the frequency of access commands or an estimated execution time for the access commands pending in a disk command queue.

FIG. 8 shows an embodiment of the present invention wherein the migration threshold is decreased as an access frequency of a target LBA increases. This embodiment biases the comparison of the accumulated access time so as to increase the likelihood of migration when a particular LBA is accessed frequently relative to a predetermined number of consecutive access commands. If an LBA is accessed infrequently, there is less performance benefit derived from migrating the LBA to the NVSM.

Any suitable control circuitry may be employed to implement the flow diagrams in the embodiments of the present invention, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller and/or NVSM controller, or certain steps described above may be performed by a read channel and others by a disk controller and/or NVSM controller. In one embodiment, the read channel and controllers are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into an SOC.

In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the steps of the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the hybrid drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.