USPatent applicationPatented

Input common mode voltage compensation circuit

Granted 2 Apr 2013 · no office action yet

Assignee: Analog Devices

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Inventors: Khiem Quang Nguyen, Robert Libert · Examiner: Patricia Nguyen · AU 2817 · TC 2800

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Abstract

A voltage level shifter for a direct coupling of an external voltage source to a common mode of a circuit may include an amplifier, a voltage-controlled current source, a first and second resistors. A first input of the amplifier may be connected to the common mode. A second input of the amplifier may, via the first and second resistors, receive a voltage indicative of the external voltage source. The output of the amplifier may indicate a voltage difference between the first and second inputs. The voltage-controlled current source may be controlled by the voltage difference to supply a current to a common node of the first and second resistors so that the voltage difference between the first and second inputs may be minimized.

Description

5 parts
›FIELD OF THE INVENTION

The present invention is directed to coupling circuits for coupling an external voltage source to a common mode of a circuit. In particular, the present invention is directed to coupling circuits that adaptively compensate the voltage differences between an external voltage source and an internal common mode voltage for direct current (DC) coupling.

›BACKGROUND INFORMATION

It is commonly understood that when a first circuit is coupled to a second circuit (or an external circuit) so that signals may be transmitted from the external circuit to the first circuit, a proper coupling circuit is needed to connect the external circuit to the first circuit because the external circuit may have a different DC bias than that of the first circuit. A capacitive coupling circuit is commonly used in signal paths to isolate the first circuit from the external circuit so that the DC bias of the external circuit does not directly affect the operation of the first circuit.

FIG. 1 illustrates a capacitive coupling between two circuits with different DC biases. Referring to FIG. 1 , a first circuit 20 and an external circuit 12 are coupled together in signal paths via capacitors 18 A, 18 B that form a capacitive coupling. The external circuit 12 is supplied with a DC bias V ext 16 that provides a DC operating point for the external circuit 12 . Further, the external circuit 12 includes outputs 14 A, 14 B that output a signal to capacitors 18 A, 18 B. Circuit 20 may include a differential amplifier 30 that is coupled to capacitors 18 A, 18 B for receiving the signal from the external circuit 12 . The amplifier 30 also includes differential outputs 26 A, 26 B that provide the signal to other portions of circuit 20 . Additionally, the amplifier 30 includes a common mode input 22 that receives a DC bias V com 28 based on which the amplifier 30 operates. Commonly, the DC bias V com 28 on circuit 20 is not leveled with the DC bia V ext 16 for the external circuit 12 . Therefore, capacitive coupling circuits such as capacitors 18 A, 18 B may be used to isolate the external circuit 12 from circuit 20 and to ensure that circuit 20 operates properly without the DC interference from V ext 16 .

While a capacitive coupling may help isolate circuit 20 from the DC bias of external circuit 12 , the capacitive coupling degraded the low frequency performance of the circuit system. Capacitors 18 A, 18 B, along with the finite input impedance network in amplifier 30 , act as a high-pass filter that removes low frequency components contained in the signal received from the external circuit 12 , and thus degrade the low frequency performance for the whole system 10 .

To reduce the side effects of degrading low frequency performance, the capacitive coupling is commonly designed to include high-capacitance capacitors. High capacitance means that the physical sizes of capacitors 18 A, 18 B need to be very large. However, large capacitors may not be realistic in certain applications such as cell phones.

›BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an exemplary capacitive coupling between two circuits.

FIG. 2 illustrates a diagram for a DC-to-DC coupling according to an exemplary embodiment of the present invention.

FIG. 3 illustrates a DC-to-DC coupling circuit according to an exemplary embodiment of the present invention.

›DETAILED DESCRIPTION · 1 of 2

Thus, there is a need for coupling circuits that may bridge between circuits without degrading low frequency performance or increasing the size of the coupling circuit. Instead of capacitive coupling, the present invention provides a direct DC-to-DC coupling that adaptively compensates the bias differences between an external circuit and a common mode voltage so as to eliminate the need for capacitive isolators. In this way, the low frequency performance of the circuit system is enhanced without using large capacitors.

Embodiments of the present invention may include a voltage level shifter for a direct coupling of an amplifier including a common mode at a common-mode level. The voltage level shifter may include an amplifier including a first input, a second input, and an output, the first input being coupled to the common mode and the output indicating a voltage difference between the first and second inputs; a voltage-controlled current source having a control input coupled to the output of the amplifier and an output for supplying an output current as a function of a voltage at the control input; a first resistor being coupled between the external voltage source and the output of the voltage-controlled current source; and a second resistor being coupled between the output of the voltage-controlled current source and the second input of the amplifier, in which the output current from the voltage-controlled current source supplies to the second resistor so as to minimize the voltage difference between the first and second inputs of the amplifier.

FIG. 2 illustrates a DC-to-DC coupling according to an exemplary embodiment of the present invention. The circuit 20 as illustrated in FIG. 2 may similarly include the same differential amplifier 30 that may directly receive signals at its inputs 24 A, 24 B from an external circuit (not shown) that has a DC bias V ext 16 . The term “directly receive” means that the input signal may be received without a capacitive coupling for isolating direct biases and thus without a high pass filtering process.

A level shifter 38 may bridge the DC bias V ext 16 from the external circuit to the common mode voltage V com 28 of the amplifier 30 . The level shifter 38 may include a voltage amplifier 34 and a voltage controller 36 . The voltage amplifier 34 may include a first input being coupled to the common mode 22 of the amplifier 30 and a second input being coupled to the an output of the voltage controller 36 . The voltage amplifier 34 may also include an output that may be coupled to a first input of the voltage controller 36 . A second input of the voltage controller 36 may receive the DC bias V ext 16 for the external circuit.

In operation, the voltage amplifier 34 may compare voltages at the first and second inputs and produce an output of difference voltage 40 . Thus, the voltage amplifier 34 may compare V com 28 relating to the external DC bias at the common mode of the amplifier 30 with the output of voltage controller 36 and generate a difference voltage signal 40 between the two inputs. The difference voltage signal 40 from the voltage controller 36 may be fed to the controller 36 where the controller 36 may regulate the DC bias V ext 16 based on the difference voltage signal 40 to generate an output V con 42 . In one embodiment, the controller 36 may include a voltage-controlled current source and resistive load devices that may form a negative feedback to the amplifier 34 so that the difference voltage signal 40 is minimized via the negative feedback loop of amplifier 34 and controller 36 . Thus, if the difference voltage signal 40 is positive indicating that V con 42 is higher than V com 28 , the controller may act to lower V con 42 . Conversely, if the difference voltage signal 40 is negative indicating that V con 42 is lower than W com 28 , the controller may act to increase V con 42 . In this way, the voltage difference between the DC bias V ext 16 and the common mode V com 28 is minimized to 0V or substantially close to 0V, and the external circuit and circuit 20 may be directly coupled without a bias difference or using capacitive coupling.

FIG. 3 illustrates an adaptive DC-to-DC coupling circuit according to an exemplary embodiment of the present invention. In addition to the amplifier 30 as already shown in FIG. 2 , the DC-to-DC coupling circuit may include a differential amplifier 44 , voltage-controlled current sources 50 A, 50 B, resistors 52 A to 52 H, voltage sources 54 A, 54 B, and current sources 54 C, 54 D. Amplifier 44 may include differential inputs 46 A, 46 B and differential outputs 48 A, 48 B. Thus, the first input 46 B may be coupled to the common mode voltage V com 28 of the amplifier 30 and the second input 46 A may be coupled to a node 56 at which a voltage signal V cdiv relating to an external bias is measured. Amplifier 44 may act as a voltage comparator for comparing V com at input 46 B with V cdiv at input 46 A and for outputting a difference voltage signal V X indicating the voltage difference between V com and V cdiv . A first differential output 48 B may be coupled to a reference voltage such as the ground. A second differential output 48 A (V X ) may be coupled to a respective control input for the voltage-controlled current sources 50 A, 50 B which may be joined at one end to the ground. The voltage-controlled current sources 50 A, 50 B may each include an output for outputting a current based on the voltage at their respective control inputs. The output currents from the voltage-controlled current sources 50 A, 50 B may be injected into load resistors 52 A to 52 D, and the strength of the output currents may be adjusted as a function of the voltage signal at the control inputs. Thus, if the V X is positive indicating that V cdiv is higher than V com , current sources 50 A, 50 B may inject currents to nodes 58 A, 58 B where the amount of injected currents may be proportional to the absolute value of V X . Conversely, if the V X is negative indicating that V cdiv is lower than V com , current sources 50 A, 50 B may withdraw currents from nodes 58 A, 58 B where the amount of withdrawn currents may be proportional to the absolute value of V X .

›DETAILED DESCRIPTION · 2 of 2

To form a negative feedback loop, the overall resistive load may be split into interconnected resistors 52 A to 52 D. Resistors 52 A, 52 B may each include a first end that is coupled to current sources 54 C, 54 D, respectively and a second end that is coupled to nodes 58 A, 58 B, respectively. Resistors 52 C, 52 D may each include a first end that is coupled to nodes 58 A, 58 B, respectively and a second end that is jointly coupled to node 56 or the input 46 A of amplifier 44 . The outputs of current sources 50 A, 50 B may be coupled to nodes 58 A, 58 B, respectively for injecting current to nodes 58 A, 58 B. Voltage sources 54 A, 54 B may supply steady voltage references with respect to ground. Voltage source 54 B may supply a DC reference voltage of V com 28 to the common mode node 22 of amplifier 30 and input 46 b of amplifier 44 . Voltage source 54 A may supply a DC reference voltage representing an external voltage bias to node 60 based on which current sources 54 C, 54 D may supply constant currents to resistors 52 A, 52 B, respectively. Further, resistors 52 E, 52 F may be coupled between node 58 A, 58 B, and inputs 24 A, 24 B of amplifier 30 , respectively. Resistors 52 G, 52 H may be coupled between inputs 24 A, 24 B and outputs 26 A, 26 B, respectively. Resistors 52 E to 52 H are general load resistors for receiving input signals.

In operation, to operate amplifier 30 properly, the common mode 22 of amplifier may be held to a substantially constant voltage of V com 28 . Further, the voltage V cdiv at node 60 may be proportional to the external voltage bias measured via resistor pairs of 52 A, 52 C and 52 B, 52 D. The resistors 52 A to 52 D may be calibrated so that the voltage measured at node 56 matches V com 28 during normal operation. Thus, amplifier 44 may compare V com with V cdiv at node 60 to produce a difference voltage output V X that may be used to control the voltage-controlled current sources 50 A, 50 B which, depending on the voltage at the control inputs, act as current sources to supply currents to nodes 58 A, 58 B, or current sinks to withdraw currents from nodes 58 A, 58 B. In one embodiment, if V cdiv is greater than V com , V X may be a positive difference voltage that may drive the voltage-controlled current sources 50 A, 50 B to supply currents that are injected into nodes 58 A, 58 B. Since current sources 54 D, 54 C supplies constant currents to resistors 52 A, 52 B, the positive incremental currents supplied from current sources 50 A, 50 B may increase a voltage drop over resistors 52 C, 52 D and reduce V cdiv at node 60 , thus minimizing V X . Conversely, if V cdiv is less than V com , V X may be a negative difference voltage that may drive the voltage-controlled current sources 50 A, 50 B to withdraw currents from nodes 58 A, 58 B. Since current sources 54 D, 54 C supplies constant currents to resistors 52 A, 52 B, the negative incremental currents subtracted from current sources 50 A, 50 B may reduce a voltage drop over resistors 52 C, 52 D and increase V cdiv at node 60 , thus minimizing V X . Thus, the circuit as shown in FIG. 3 may adaptively compensate the voltage difference between an external bias and the common mode voltage. In this way, the circuit may be directly coupled to an external circuit without capacitive coupling.

FIG. 3 is an illustrative and non-limiting exemplary embodiment of the present invention. Other embodiments of the present invention may be similarly constructed. For example, FIG. 3 illustrates a symmetrical differential circuit. However, the present invention may also be constructed in a non-differential circuit.

The present invention may have the advantages of circuit to circuit coupling without using low-pass capacitors, an improved low frequency response, a constant input impedance, and no additional noise sources.

The present invention may be used to serve as an input stage for different circuit systems including analog-to-digital converters.

Those skilled in the art may appreciate from the foregoing description that the present invention may be implemented in a variety of forms, and that the various embodiments may be implemented alone or in combination. Therefore, while the embodiments of the present invention have been described in connection with particular examples thereof, the true scope of the embodiments and/or methods of the present invention should not be so limited since other modifications will become apparent to the skilled practitioner upon a study of the drawings, specification, and following claims.

Claims as granted

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Classifications

4 codes
IPC · International Patent Classification
Section H — Electricity
  • H03F3/45
USPC · US Patent Classification
330/69330/260330/258

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⤢ drag to zoomApr 2011Jul 2011Oct 2011Jan 2012Apr 2012Jul 2012Oct 2012Jan 2013Apr 2013USPTOApplicantNotice of allowance
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Pendency
1.9 y
694 days filing → grant
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none on record
Examiner
Patricia Nguyen
art unit 2817 · TC 2800
Citations: 10 back · 0 forward

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