Test circuit for resistor capacitor circuits

1. Technical Field

The present disclosure relates to resistor-capacitor (RC) circuits, and particularly, to a test circuit capable of efficiently testing resistance of resistors of an RC circuit.

2. Description of Related Art

In an RC circuit, resistance of resistors of the RC circuit can greatly affect stability of the entire RC circuit. Therefore, in the design of the RC circuit, resistors of varying resistances are placed in the RC circuit in turn to test stability of the RC circuit at a desired performance. However, in this process, it is required to manually change out each resistor every time, which can be time consuming and inconvenient.

Therefore, it is desirable to provide RC test circuit which can overcome the problems described above.

FIG. 1 is a functional block diagram of a RC test circuit, according to an exemplary embodiment.

FIG. 2 is a circuit diagram of one embodiment of the RC test circuit of FIG. 1 .

Exemplary embodiments of the disclosure will now be described in detail, with reference to the accompanying drawing.

FIG. 1 is a functional block diagram of a RC test circuit 100 , according to an exemplary embodiment. The RC test circuit 100 includes a control chip 10 , a digital rheostat 20 , and a RC circuit 30 . The control chip 10 is electronically connected to the digital rheostat 20 , while the digital rheostat 20 is integrated in the RC circuit 30 . The digital rheostat 20 is configured to replace a number of resistors (detailed below) of the RC circuit 30 , to vary resistance of the RC circuit 30 according to operations by user or a preset program of the control chip 10 .

The control chip 10 is a programmable processing unit, and includes a RA 0 terminal, a RA 1 terminal, a RA 2 terminal, a RA 3 terminal, a RB 0 terminal, a RB 1 terminal, a RB 2 terminal, a RB 3 terminal, a RC 0 terminal, a RC 1 terminal, a RC 2 terminal, a RC 3 terminal, a RC 4 terminal, a RC 5 terminal, a RC 6 terminal, a first serial clock (SCL) terminal, and a first serial data (SDA) terminal.

The RA 0 -RA 3 terminals are electrically connected to a display device 11 , to continuously output a number of resistance value signals from the digital rheostat 20 to the display device 11 , so that the display device 11 can display the resistance values of the digital rheostat 20 . The RB 0 -RB 3 terminals are connected to the digital rheostat 20 to output a number of control signals to the digital rheostat 20 . The control signals signal the digital rheostat 20 to change resistance of the digital rheostat 20 . The RC 0 -RC 6 terminals are input/output (I/O) type terminals and connected to a peripheral input device 13 , to input the control signals from the peripheral input device 13 and transfer the control signals to the RB 0 -RB 3 terminals. In this embodiment, the peripheral input device 13 is a keyboard, the control signals are translated from a number of input resistance values implemented on the keyboard. In particular, the peripheral input device 13 includes three control sections 131 for respectively inputting the resistance values. The control area is defined to as an operation/inputting area that can trigger a function of the control chip 10 , such as the number pad of the keyboard.

The control chip 10 includes at least one memory 15 and at least one adder-subtractor 17 in communication with the at least one memory 15 . In this non-limiting embodiment, three memories 15 and three adder-subtractors 17 are introduced, to individually communicate with the three control sections 131 of the peripheral input device 13 and establish three signal channels 19 . Each signal channel is configured to transfer signals through the corresponding control area, the memory, the adder-subtractor, and the digital rheostat 20 . As such, the control signals from the peripheral input device 13 can be individually transferred to the digital rheostat 20 via the three signal channels 19 , thereby reducing signal interference and making the signal processing easier. A current resistance value of the digital rheostat 20 is stored in each memory 15 . The adder-subtractors 17 are configured for receiving the input resistance values from the peripheral input device 13 , and calculating the sum or difference between the input resistance value and the corresponding current resistance value. For example, if the current resistance value has a maximum value of 10 kΩ, and if the input resistance value is 1 kΩ every time, then the adder-subtractor 17 will control the current resistance value 10 kΩ to minus 2 kΩ, then output an 8 kΩ to the display device 11 . As mentioned above, the 1 kΩ value can be inputted by a keyboard. In other embodiments, the input resistance values can be chosen as 10Ω, 100Ω or other numbers.

The digital rheostat 20 includes a first rheostat 21 , a second rheostat 22 and a third rheostat 23 . The first rheostat 21 , the second rheostat 22 and the third rheostat 23 are individually in communication with the three channels of the control chip 10 , to respectively receive the control signals from the peripheral input device 13 . In additional, the display device 11 can respectively display the resistance values of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 according to the control signals.

The first rheostat 21 includes a first sliding terminal VM 0 and a first fixed terminal VL 0 . The second rheostat 22 includes a second sliding terminal VM 1 and a second fixed terminal VL 1 . The third rheostat 23 includes a third sliding terminal VM 2 and a third fixed terminal VL 2 . In the present embodiment, the first sliding terminal VM 0 is adjacent to the fixed terminal VL 0 . The second sliding terminal VM 1 is adjacent to the second fixed terminal VL 1 . The third sliding terminal VM 2 is adjacent to the third fixed terminal VL 2 . The digital rheostat 20 is configured for changing the resistances of the first rheostat 21 , the second rheostat 22 and the third rheostat 23 by respectively changing the resistances between the first sliding terminal VM 0 and the first fixed terminal VL 0 , between the second sliding terminal VM 1 and the second fixed terminal VL 1 , and between the third sliding terminal VM 2 and the third fixed terminal VL 2 .

The digital rheostat 20 further includes an A 0 terminal, an A 1 terminal, an A 2 terminal, an A 3 terminal, a second SCL terminal, and a second SDA terminal. The A 0 -A 3 terminals are correspondingly connected to the RB 0 ˜RB 3 terminals, while the second SCL terminal and the second SDA terminal are correspondingly connected to the first SCL terminal and the first SDA terminal of the control chip 10 . In this embodiment, the A 0 -A 3 terminals are address terminals. The A 0 -A 3 terminals can input the corresponding control signals from the control chip 10 to the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 , to change the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 .

The RC circuit 30 includes a first RC sub-circuit 31 , a second RC sub-circuit 33 , and two output terminals V 0 connected to the first RC sub-circuit 31 and the second RC sub-circuit 33 . The two output terminals V 0 are correspondingly connected to two test probes of an oscillograph 35 .

The first RC sub-circuit 31 includes a first position for positioning a first resistor R 1 (shown in broken line in FIG. 2 ) therein, a second position for positioning a second resistor R 2 therein, and a first capacitor C 1 . The first capacitor C 1 is connected to the first resistor R 1 in series and connected to the second resistor R 2 in parallel. The second RC sub-circuit 33 includes a third position for positioning a third resistor R 3 therein, a second capacitor C 2 , and a third capacitor C 3 . The third capacitor C 3 is connected to the third resistor R 3 in series and connected to the second capacitor C 2 in parallel. Each of the first position, second position, and the third position can include a node used for soldering a corresponding resistor thereon, and includes a positive terminal (+) and a negative terminal (−). The positive terminals (+) of the positions are configured to correspondingly connect to the fixed terminals VL 0 -VL 2 . The negative terminals (−) of the positions are configured to correspondingly connect to the sliding terminals VW 0 -VW 2 . In particular, the positive terminal (+) of the first position is connected to the first sliding terminal VW 0 , the positive terminal (+) of the second position is connected to the second sliding terminal VW 1 , and the positive terminal (+) of the third position is connected to the third sliding terminal VW 2 . The negative terminal (−) of the first position is connected to the first fixed terminal VL 0 , the negative terminal (−) of the second position is connected to the second fixed terminal VL 1 , and the negative terminal (−) of the third position is connected to the third fixed terminal VL 2 . More specifically, in this embodiment, the positive terminals (+) and the negative terminals (−) are connected to the fixed terminal VL 0 to VL 2 and sliding terminals VW 0 to VW 2 via twisted pairs.

During the testing process of the RC circuit 30 , according to the preset program or manual operations on the keyboard, the control chip 10 changes the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 according to the control signals. In this embodiment, the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 are increased from a minimum value. In other embodiments, the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 are decreased from the maximum value or increased/decreased from a middle value. As such, the resistance of the RC circuit 30 is changed with the changing of the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 . Meanwhile, the oscillograph 35 displays a waveform of a series of output signals from the RC circuit 30 , according to the changeable resistance of the RC circuit 30 . When the waveform meets the requirements of the user, the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 are confirmed to be the best match, and the display device 30 displays only the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 at that time. After reading the resistances of the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 , the digital rheostat 20 is removed and the first resistor R 1 , the second resistor R 2 , and the third resistor R 3 respectively corresponding to the first rheostat 21 , the second rheostat 22 , and the third rheostat 23 are placed to the first position, the second position, and the third position. As such, the RC circuit 30 can be completely designed.

It is understood that the control chip 10 can employ only one memory 15 and only one adder-subtractor 17 , depending on the number of the rheostats of the digital rheostat 20 .

It will be understood that particular exemplary embodiments and methods are shown and described by way of illustration only. The principles and the features of the present disclosure may be employed in various and numerous exemplary embodiments thereof without departing from the scope of the disclosure as claimed. The above-described exemplary embodiments illustrate the scope of the disclosure but do not restrict the scope of the disclosure.