Direct current compensation system and method for scattering parameter rational functions
Granted 1 Jul 2014 · 2 office actions
Assignee: Foxconn Technology Group
Law firm: Law firm · Log in to unlock
Attorney: Attorney · Log in to unlock
Inventors: Shen-Chun Li, Yu-Chang Pai, Shou-Kuo Hsu, Wen-Laing Tseng · Examiner: Michael D Yaary · AU 2193 · TC 2100
Life of the application
10 dated eventsAbstract
A direct current compensation method for S-parameter rational functions reads S-parameters f(sk), which are generated at given frequency sk, from a storage unit. An S-parameter, which is generated at frequency sk=0 is supplemented into the S-parameters f(sk), upon the condition that there is no S-parameter which is generated at the frequency sk=0. An S-parameter ration function is generated according to the S-parameters f(sk). A DC level of the S-parameter rational function is compensated to generate a compensated S-parameter rational function.
Description
4 parts›BACKGROUND
1. Technical Field
The present application is related to simulation systems for circuits, especially to a direct current (DC) compensation system and method for S-parameter rational functions.
2. Description of Related Art
S-parameters, also called scattering parameters, are used to describe signal-wave response of an n-port electrical network (circuit system) at given frequency.
S-parameters can be expressed by an S-parameter rational function, which is generated according to the S-parameters using a vector fitting algorithm. However, the S-parameter rational function generated using the vector fitting algorithm is an approximation, thus, may produce errors at a DC level of the signal-wave response of the n-port electrical networks.
›BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of one embodiment of an electronic device comprising a DC compensation system.
FIG. 2 is a block diagram of one embodiment of function modules of the DC compensation system of FIG. 1 .
FIG. 3 is a flowchart illustrating one embodiment of a DC compensation method for S-parameter rational functions.
FIG. 4 is a flowchart detailing block S 14 of FIG. 3 .
›DETAILED DESCRIPTION · 1 of 2
The application is illustrated by way of examples and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.
In general, the word “module” as used hereinafter, refers to logic embodied in hardware or firmware, or to a collection of software instructions, written in a programming language, such as, for example, Java, C, or Assembly. One or more software instructions in the modules may be embedded in firmware. It will be appreciated that modules may be comprised of connected logic units, such as gates and flip-flops, and may be comprised of programmable units, such as programmable gate arrays or processors. The modules described herein may be implemented as either software and/or hardware modules and may be stored in any type of computer-readable medium or other computer storage device.
FIG. 1 is a block diagram of one embodiment of an electronic device 1 comprising a DC compensation system 10 . The electronic device 1 further comprises a storage unit 11 , a processor 12 , and an output unit 13 . The electronic device 1 may be a computer, a server, for example. The storage device 11 is configured for storing information of an N-port circuit system in a Touchstone format (such as *.SNP), including S-parameters f(sk) which are generated at different frequency sk. The Touchstone Format is stipulated by IBIS Associates. The DC compensation system 10 includes function modules (see below descriptions referring to FIG. 2 ), which are configured for reading the S-parameters f(sk) from the storage unit 11 , generating a S-parameter rational function according to the S-parameters f(sk) using a vector fitting algorithm, compensating the DC level of the S-parameter rational function to generate a compensated S-parameter rational function, and outputting the compensated S-parameter rational function to the output unit 13 , such as a display.
In the embodiment, the function modules of the DC compensation system 10 may include one or more computerized codes in the form of one or more programs that are stored in the storage unit 11 . The storage unit 11 may include high speed random access memory and may also include non-volatile memory, such as one or more magnetic disk storage devices, flash memory devices, or other non-volatile solid state memory devices. The one or more computerized codes of the DC compensation system 10 include instructions that are executed by the processor 12 , to provide functions for the function modules of the DC compensation system 10 .
FIG. 2 is a block diagram illustrating the function modules of the DC compensation system 10 , according to some embodiments of the present disclosure. The function modules of the DC compensation system 10 may includes an acquisition module 101 , a parameter check module 102 , a parameter supplement module 103 , a vector fitting module 104 , a DC compensation module 105 , a format conversion module 106 , and an output module 107 .
The acquisition module 101 reads the S-parameters f(sk) from the storage unit 11 . As mentioned, the S-parameters describe signal-wave response of an n-port electrical network (circuit system), and are generated at given frequency sk.
The parameter check module 102 checks if there is an S-parameter which is generated at the frequency sk=0. It may be appreciated that, the S-parameter generated at the frequency sk=0 represents DC.
The parameter supplement module 103 supplements the S-parameter at frequency sk=0 using an interpolation method if there is no S-parameter which is generated at the frequency sk=0. It may be appreciated that, the interpolation method is a method of constructing new data points within the range of a discrete set of known data points.
The vector fitting module 104 generates an S-parameter ration function according to the S-parameters f(sk) using a vector fitting algorithm. In one embodiment, the S-parameter rational function is constituted by pole values p m and residue values r m , and is shown below:
The DC compensation module 105 compensates the DC level of the above S-parameter rational function to generate a compensated S-parameter rational function using the following steps:
(1) computing the pole values p m using first formulas as follows:
p 2 u = u / 100 + j · u s N - s 1 , p 2 u - 1 = u / 100 - j · u s N - s 1 ,
where μ=1˜M/2, and M is a total number of the pole values.
(2) generating a matrix
X : [ r 1 … r M d r ~ 1 … r ~ M ]
using unknown variables r m , d, and {tilde over (γ)} m of functions (σf) fit and σ fit (s). In one embodiment, the functions (σf) fit (s) and σ fit (s) are shown as follows:
where p m =z m , m=1˜M.
(6) repeating steps (2)˜(4), determining if |(σf) fit (s)−(σf) fit — old (s)|<tol, where the tol is a predetermined error, and regarding the got (σf) fit (s) as the compensated S-parameter rational function.
The format conversion module 106 converts a format of the compensated S-parameter rational function to a standard format, for being compatible with HSPICE simulation software. The conversion is realized as follows: Firstly, expressing the S-parameters f(sk) using a following matrix:
S ( s ) = [ S 11 ( s ) S 12 ( s ) … S 1 N ( s ) S 21 ( s ) S 22 ( s ) … S 2 N ( s ) … … … … S N 1 ( s ) S N 2 ( s ) … S NN ( s ) ] .
Secondly, substituting the S ij (s), where i, j=1˜N, of the above matrix into the compensated S-parameter rational function, obtaining a matrix as follows:
S ( s ) ≈ S ^ ( s ) = [ S ^ 11 ( s ) S ^ 12 ( s ) … S ^ 1 N ( s ) S ^ 21 ( s ) S ^ 22 ( s ) … S ^ 2 N ( s ) … … … … S ^ N 1 ( s ) S ^ N 2 ( s ) … S ^ NN ( s ) ] ,
where S ^ ij ( s ) = S ^ ij ( 0 ) + s ( ∑ m = 1 M r m i , j s - p m i , j + d i , j ) .
After that, converting the format of the compensated S-parameter rational function in to the standard format according to the Ŝ ij (s):
›DETAILED DESCRIPTION · 2 of 2
The output module 107 stores the compensated S-parameter rational function into the storage unit 11 , and outputs the compensated S-parameter rational function to the output unit 13 .
FIG. 3 is a flowchart illustrating one embodiment of a DC compensation method for S-parameter rational functions. The method being performed by execution of computer readable program code by the processor 12 of the electronic device 1 . Depending on the embodiment, additional blocks in the flow of FIG. 3 may be added, others removed, and the ordering of the blocks may be changed.
In block S 10 , the acquisition module 101 reads the S-parameters f(sk), which are generated at given frequency sk, from the storage unit 11 .
In block S 11 , the parameter check module 102 checks if there is an S-parameter which is generated at the frequency sk=0. Block S 13 is implemented if there is an S-parameter which is generated at the frequency sk=0. Otherwise, block S 12 is implemented if there is no S-parameter which is generated at the frequency sk=0.
In block S 12 , the parameter supplement module 103 supplements the S-parameter at frequency sk=0 using an interpolation method. It may be appreciated that, the interpolation method is a method of constructing new data points within the range of a discrete set of known data points.
In block S 13 , the vector fitting module 104 generates an S-parameter ration function according to the S-parameters f(sk) using a vector fitting algorithm. In one embodiment, the S-parameter rational function is constituted by pole values p m and residue values r m , and is shown below:
In block S 14 , the DC compensation module 105 compensates the DC level of the above S-parameter rational function to generate a compensated S-parameter rational function. The detailed description of block S 14 refers to FIG. 4 below.
In block S 15 , the format conversion module 106 converts a format of the compensated S-parameter rational function to a standard format, for being compatible with HSPICE simulation software. The conversion is realized as follows: Firstly, expressing the S-parameters f(sk) using a following matrix:
S ( s ) = [ S 11 ( s ) S 12 ( s ) … S 1 N ( s ) S 21 ( s ) S 22 ( s ) … S 2 N ( s ) … … … … S N 1 ( s ) S N 2 ( s ) … S NN ( s ) ] .
Secondly, substituting the S ij (s), where i, j=1˜N, of the above matrix into the compensated S-parameter rational function, obtaining a matrix as follows:
S ( s ) ≈ S ^ ( s ) = [ S ^ 11 ( s ) S ^ 12 ( s ) … S ^ 1 N ( s ) S ^ 21 ( s ) S ^ 22 ( s ) … S ^ 2 N ( s ) … … … … S ^ N 1 ( s ) S ^ N 2 ( s ) … S ^ NN ( s ) ] ,
where S ^ ij ( s ) = S ^ ij ( 0 ) + s ( ∑ m = 1 M r m i , j s - p m i , j + d i , j ) .
After that, converting the format of the compensated S-parameter rational function in to the standard format according to the Ŝ ij (s):
In block S 16 , the output module 107 stores the compensated S-parameter rational function into the storage unit 11 , and outputs the compensated S-parameter rational function to the output unit 1 .
FIG. 4 is a flowchart detailing block S 14 of FIG. 3 . The method being performed by execution of computer readable program code by the processor 12 of the electronic device 1 . Depending on the embodiment, additional blocks in the flow of FIG. 4 may be added, others removed, and the ordering of the blocks may be changed.
In block S 140 , the DC compensation module 105 computing the pole values p m using first formulas as follows:
p 2 u = u / 100 + j · u s N - s 1 , p 2 u - 1 = u / 100 - j · u s N - s 1 ,
where μ=1˜M/2, and M is a total number of the pole values.
(7) In block S 141 , the DC compensation module 105 generates a matrix
X : [ r 1 … r M d r ~ 1 … r ~ M ]
using unknown variables r m , d, and {tilde over (γ)} m of functions (σf) fit (s) and σ fit (s). In one embodiment, the functions (σf) fit (s) and σ fit (s) are shown as follows:
In block S 142 , the DC compensation module 105 substitutes the pole values p m and the S-parameters f(sk) into matrixes A and B. In one embodiment, the matrixes A and B are shown as follows:
In block S 143 , the DC compensation module 105 computes the unknown variables r m , d, and {tilde over (γ)} m using a formula X=(A T A) −1 A T B, to get the functions (σf) fit (s) and σ fit (s).
In block S 144 , the DC compensation module 105 determines if blocks S 141 to S 143 are only executed one time. Block S 145 is implemented if blocks S 141 to S 143 are only executed one time. Otherwise, block S 147 is implemented if blocks S 141 to S 143 are executed more than one time.
In block S 145 , the DC compensation module 105 records the got (σf) fit (s) as (σf) fit — old (s).
In block S 146 , the DC compensation module 105 computes the pole values p m again using a second formula as follows:
σ fit ( s ) = ∑ m = 1 M r ~ m s - p m + 1 = ∏ m = 1 M ( s - z m ) ∏ m = 1 M ( s - p m ) ,
where p m =z m , m=1˜M.
After block S 146 , the flow returns to block S 141 described above.
In block S 147 , the DC compensation module 105 determines if |(σf) fit (s)−(σf) fit — old (s)|<tol, where the tol is a predetermined error. Block S 141 is repeated if |(σf) fit (s)−(σf) fit — old (s)≧tol. Otherwise, block S 148 is implemented if |(σf) fit (s)−(σf) fit — old (s)|<tol.
In block S 148 , the DC compensation module 105 regards the got (σf) fit (s) as the compensated S-parameter rational function.
While the disclosure has been described by way of example and in terms of preferred embodiment, it is to be understood that the disclosure is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
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