USPatent applicationPatented

Snubber circuit for buck converter

Granted 20 Aug 2013 · no office action yet

Life of the application

6 dated events
⤢ drag to zoom20122014201620182020202220242026202820302032ProsecutionOwnershipTerm & fees
ProsecutionOwnershipTerm & feeshover for detail · click to open

Abstract

A snubber circuit for decreasing a voltage spike of a buck converter includes a resistor unit, a capacitor unit, a detecting unit, and a control unit. The resistor unit provides multiple groups of resistance values. The capacitor unit provides multiple groups of capacitance values. The detecting unit detects voltage spikes of the buck converter corresponding to each group of resistance values and capacitance values. The control unit selects each group of resistance and capacitance to respectively connect to the buck converter and determines a group of resistance and capacitance corresponding to a lowest voltage spike by comparing the detected voltage spikes with each other.

Description

3 parts
›BACKGROUND

1. Technical Field

The disclosure generally relates to snubber circuits for buck converters, and particularly to a snubber circuit for decreasing a voltage spike of a buck converter.

2. Description of Related Art

Buck converters are widely incorporated in power supplies of many electronic devices, due to their fast response, and simple structure. However, while switches such as transistors, and diodes of the buck converters turn on and turn off at a high frequency, a voltage spike can generate and may damage the switches.

A commonly used RC snubber circuit includes a resistor and a capacitor connected in series, and is applied to the buck converter to decrease the voltage spike. To reduce the voltage spike as much as possible, multiple resistors and capacitors need to be used in the buck converter manually to determine a resistance and capacitance suitable for the buck converter, which is inconvenient and time consuming.

Therefore, there is room for improvement within the art.

›BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the present disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure.

FIG. 1 shows a snubber circuit, according to an exemplary embodiment.

FIG. 2 shows a buck converter comprising the snubber circuit of FIG. 1 .

›DETAILED DESCRIPTION

Referring to FIGS. 1 and 2 , a snubber circuit 100 for a buck converter 200 , according to an exemplary embodiment, includes a control unit 11 , a resistor unit 12 , a capacitor unit 13 , a detecting circuit 14 , a start circuit 15 , and a display unit 16 . The resistor unit 12 , the capacitor unit 13 , the detecting circuit 14 , the start circuit 15 , and the display unit 16 are electronically connected to the control unit 11 .

The control unit 11 includes a power contact VDD, a ground contact VSS, a group of first switch contacts RB 0 -RB 3 , a group of second switch contacts RB 4 and RB 7 , a detecting contact RA 0 , a start contact RA 1 , a group of display control contacts RA 2 -RA 5 , and a group of data transmitting contacts RC 0 -RC 7 . The power contact VDD is connected to a power supply VCC. The ground contact VSS is grounded. The group of first switch contacts RB 0 -RB 3 are connected to the resistor unit 12 . The group of second switch contacts RB 4 -RB 7 are connected to the capacitor unit 13 . The detecting contact RA 0 is connected to the detecting circuit 14 . The start contact RA 0 is connected to the switch circuit 15 . The group of display control contacts RA 2 -RA 5 and the group of data transmitting contacts are connected to the display unit 16 .

The resistor unit 12 may be a resistance box. The resistor unit 12 includes two first terminals A 1 and A 2 . Resistance value (i.e., resistance) between the two first terminals A 1 and A 2 can be adjusted when the control unit 11 changes states of the group of the first switch contacts RB 0 -RB 3 . For example, when the states of the group of first switch contacts AB 0 -AB 3 is low, low, low, low (i.e., 0000), the resistance of the resistor unit 12 is 0.51 ohm. When the states of the group of first switch contacts AB 0 -AB 3 is low, low, low, high (i.e., 0001), the resistance of the resistor unit 12 is 1 ohm. The resistor unit 12 can be connected to the buck converter 200 by the two first terminals A 1 and A 2 and provides multiple resistance values for the buck converter 200 .

The capacitor unit 13 may be a capacitor box. The capacitor unit 13 includes two second terminals A 3 and A 4 . Substantially similar to the resistor unit 12 , capacitance value (i.e., capacitance) of the two second terminal A 3 and A 4 can be adjusted when the control unit 11 changes states of the group of the second switch contacts RB 4 -RB 7 . The capacitor unit 13 can be connected to the buck converter 200 by the second terminal A 3 and A 4 and provides multiple capacitance values for the buck converter 200 .

The detecting circuit 14 includes a first resistor R 1 and a second resistor R 2 connected in series. One end of the first resistor R 1 and second resistor R 2 is grounded. Another end of the first resistor R 1 and second resistor R 2 is served as a detecting terminal A 5 . The detect circuit 14 can be connected to the buck converter 200 by the detecting terminal A 5 and detects voltage spikes of the buck converter 200 .

The start circuit 15 includes a third resistor R 3 and a switch S. The third resistor R 3 is connected between the power supply VCC and the start contact RA 0 . The switch S is connected between the start contact RA 0 and ground. When the switch S is turned on, the control unit 11 is started. When the switch S is turned off, the control unit 11 is shut down.

The display unit 16 is configured for displaying the resistances of the resistor unit 12 , the capacitances of the capacitor unit 13 , and the voltage spikes detected by the detecting unit 14 .

Referring to FIG. 2 , a buck converter 200 includes a pulse width modulation (PWM) drive unit 21 , a first switch Q 1 , a second switch Q 2 , an inductor L, a capacitor C, and three input terminals J 1 -J 3 .

In this embodiment, the first and second switches Q 1 , Q 2 are metal-oxide semiconductor field effect transistor (MOSFETs). The PWM drive unit 21 is connected to the gates of the first and second switches Q 1 , Q 2 , a drain of the first switch Q 1 , and a source of the second switch Q 2 . The drain of the first switch Q 1 is connected to the source of the switch Q 2 . A source of the first switch Q 1 is grounded. A drain of the second switch Q 2 is connected to a power supply Vin. The inductor L and capacitor C are connected in series between the drain of the first switch Q 1 and ground. The three input terminals J 1 -J 3 are linearly arranged between the drain of the first switch Q 1 and ground.

To decrease the voltage spikes of the buck converter 200 , the detecting terminal A 5 is connected to the input terminal J 1 (i.e. the drain of the first switch). The first terminals A 1 and A 2 are respectively connected to the input terminals J 1 and J 2 . The second terminals A 3 and A 4 are respectively connected to the terminals J 2 and J 3 . The switch S is turned on to start the control unit 11 . The control unit 11 adjusts resistance value of the resister unit 12 by changing states of the group of first switch contacts AB 0 -AB 3 and adjusts capacitance value of the capacitor unit 13 by changing states of the group of first switch contacts AB 4 -AB 7 . Therefore, multiple groups of resistance and capacitance can be selected and provided to the buck converter 200 . The detecting contact RA 0 detects voltage spikes of the buck converter 200 corresponding to each group of resistance and capacitance. Therefore, a suitable group of resistance and capacitance corresponding to a lowest voltage spike can be determined by the control unit 11 by comparing the detected voltage spikes.

The snubber circuit 100 can automatically determine a suitable group of resistance and capacitance for the buck converter 200 to decrease the voltage spike, which is convenient and effective.

It is believed that the exemplary embodiments and their advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the disclosure or sacrificing all of its material advantages, the examples hereinbefore described merely being preferred or exemplary embodiments.

Claims as granted

18 claims

Log in to read the claims of this application.

Log in to unlock

Classifications

3 codes
IPC · International Patent Classification
Section G — Physics
  • G05F1/00
USPC · US Patent Classification
323/282323/271

Claim changes

Soon
Coming soonHow the claims changed between publication and grant

See which claims were amended, added or cancelled during examination, with every added and removed word marked.

AmendedAddedCancelledUnchanged

The published claims of this application are not paired with the granted ones in what we hold.

File wrapper

⤢ drag to zoomJan 2011Apr 2011Jul 2011Oct 2011Jan 2012Apr 2012Jul 2012Oct 2012Jan 2013Apr 2013Jul 2013Oct 2013USPTOApplicantNotice of allowance
USPTOApplicanthover for detail · click to open
Pendency
2.5 y
910 days filing → grant
Office actions
0
none on record
Examiner
Jue Zhang
art unit 2838 · TC 2800
Citations: 2 back · 1 forward

See the full prosecution history — every USPTO and applicant action on this file, in order.

Log in to unlock

Documents

Log in to open the documents of this file: the application as filed, every office action and response, the notice of allowance.

Log in to unlock

Chain of title

⤢ drag to zoom20122014201620182020202220242026202820302032Owner 1
Titlehover for detail · click to open

See the full assignment history — every owner this patent has passed through, with recordation dates and reel/frame numbers.

Log in to unlock