Serial-type light-emitting diode (LED) device

1. Field of the Invention

The present invention relates to a light-emitting diode (LED) device. More particularly, the present invention relates to a serial-type LED device.

2. Description of the Related Art

An LED light source employs a plurality of LEDs to provide sufficient brightness. The LEDs can be coupled in series to drive so that each LED provides substantially the same brightness due to the same current flowing through each LED. However, the serial LEDs will not work if one of the LEDs does not work. In addition, the driving voltage applied to the serial LEDs increases as the number of the LEDs coupled in series increases, so that the driving voltage may be too high, resulting result in higher cost and increasing complexity of the circuit design.

To avoid the disadvantage of the serial LEDs, the LEDs can be divided into several groups. The LEDs of each group are coupled in series as a light string, and all light strings are coupled in parallel, so that the LEDs of each light string provide substantially the same brightness and so that each light string provides the same brightness by employing a current balance technology. In addition, if one of the light strings does not work, the others of the light strings can still work. However, as the number of the light strings increases, the circuit design of the current balance circuit becomes complex.

Accordingly, a serial-type LED device is provided for employing a simple current balance circuit while avoiding that all light strings will not work if one of the light strings does not work.

According to an aspect of the invention, a serial-type LED device includes a direct-current to direct-current (DC to DC) converter, p light source units and a dimming circuit. The DC to DC converter receives a first DC voltage and converts the first DC voltage to a second DC voltage according to a feedback signal. Each light source unit includes a first terminal, a second terminal, m light strings and m current balance units, and each light string includes a plurality of LEDs coupled in series to have a first terminal coupled to the first terminal of a corresponding light source unit and a second terminal coupled to the second terminal of the corresponding light source unit through a corresponding current balance unit. The p light source units are first to p-th light source units, the first terminal of the first light source unit is coupled to the DC to DC converter to receive the second DC voltage, and the second terminal of the i-th light source unit is coupled to the first terminal of the (i+1)-th light source unit, where m and p are integers greater than or equal to 2, and i is any integer from 1 to (p−1). The dimming circuit coupled to the second terminal of the p-th light source unit and the DC to DC converter outputs the feedback signal according to a dimming signal and a current outputted from the p-th light source unit.

In another embodiment, a dimming circuit coupled to the second terminal of the p-th light source unit outputs a control signal to control the current balance units of the p-th light source unit not to work when receiving an off signal, and outputs the control signal to control the current balance units of the p-th light source unit to alternatively work and not work according to a dimming signal when receiving an on signal.

The foregoing and other features of the disclosure will be apparent and easily understood from a further reading of the specification, claims and by reference to the accompanying drawings in which:

FIG. 1 is a schematic diagram illustrating an embodiment of a serial-type LED device according to the invention;

FIG. 2 is a schematic diagram illustrating an embodiment of the dimming circuit shown in FIG. 1 ;

FIG. 3 is a schematic diagram illustrating another embodiment of a serial-type LED device according to the invention;

FIG. 4A is a schematic diagram illustrating an embodiment of the current balance unit shown in FIG. 3 ;

FIG. 4B is a schematic diagram illustrating another embodiment of the current balance unit shown in FIG. 3 ;

FIG. 5 is a schematic diagram illustrating an embodiment of the short-circuit protection circuit shown in FIG. 3 ;

FIG. 6 is a schematic diagram illustrating an embodiment of the voltage compensation circuit shown in FIG. 3 ; and

FIG. 7 is a schematic diagram illustrating an embodiment of the dimming circuit shown in FIG. 3 .

FIG. 1 is a schematic diagram illustrating an embodiment of a serial-type LED device according to the invention. Referring to FIG. 1 , a serial-type LED device 1 includes 4 light source units 11 - 14 , a DC to DC converter 15 and a dimming circuit 16 . The DC to DC converter 15 receives a first DC voltage Vdc 1 and converts the first DC voltage Vdc 1 to a second DC voltage Vdc 2 according to a feedback signal FB. The DC to DC converter 15 employs full-bridge, half-bridge, forward, flyback or other suitable topology. The first DC voltage Vdc 1 is 5V, 12V, 24V or other typical voltage provided by a power supply is (not shown). The second DC voltage Vdc 2 is sufficient to drive the light source units 11 - 14 .

Each light source unit includes a first terminal, a second terminal, m light strings and m current balance units, where m is an integer greater than or equal to 2. For example, the light source unit 11 includes the first terminal 111 , the second terminal 112 , the light strings S 1 -Sm and the current balance units T 1 -Tm. Each light string includes a plurality of LEDs coupled in series to have a first terminal coupled to the first terminal of a corresponding light source unit and a second terminal coupled to the second terminal of the corresponding light source unit through a corresponding current balance unit. For example, in the light source unit 11 , each light string, such as light string S 1 , includes the LEDs D 1 -Dn coupled in series to have the first and second terminals. The first terminal of the light string S 1 is coupled to the first terminal 111 of a corresponding light source unit 11 , and the second terminal of the light string S 1 is coupled to the second terminal 112 of the corresponding light source unit 11 through a corresponding current balance unit T 1 . Therefore, the light strings S 1 -Sm are substantially coupled in parallel and controlled to achieve current balance through the current balance units T 1 -Tm.

The light source units 11 - 14 are the first light source unit 11 , the second light source unit 12 , the third light source unit 13 and the fourth light source unit 14 . The first terminal 111 of the first light source unit 11 is coupled to the DC to DC converter 15 to receive the second DC voltage Vdc 2 , the second terminal 112 of the first light source unit 11 is coupled to the first terminal 121 of the second light source unit 12 , the second terminal 122 of the second light source unit 12 is coupled to the first terminal 131 of the third light source unit 13 , the second terminal 132 of the third light source unit 13 is coupled to the first terminal 141 of the fourth light source unit 14 , and the second terminal 142 of the fourth light source unit 14 is coupled to the dimming circuit 16 . Therefore, the light source units 11 - 14 are substantially coupled in series to employ a simple dimming circuit such as the dimming circuit 16 . In addition, an input current Iin is equal to a current I 1 , I 2 , I 3 or I 4 outputted from the light source unit 11 , 12 , 13 or 14 .

The dimming circuit 16 is coupled to the second terminal 142 of the fourth light source unit 14 and to the DC to DC converter 15 . The dimming circuit 16 outputs the feedback signal FB according to the current I 4 outputted from the fourth light source unit 14 , and the feedback signal FB, such as a current proportional to the current I 4 , is used to control the DC to DC converter 15 to modulate the second DC voltage Vdc 2 . The dimming circuit 16 can control the second terminal 142 of the light source unit 14 to be open or coupled to ground according a dimming signal DIM having pulse-width modulation (PWM) waveform (alternately at a high level and at a low level). The current balance units T 1 -Tm are worked so that the light source units 11 - 14 are turned on to provide light while the second terminal 142 of the light source unit 14 is coupled to ground, and the current balance units T 1 ′-Tm′ are not worked so that the light source units 11 - 14 are turned off to provide no light while the second terminal 142 of the light source unit 14 is open, so that it achieves a PWM dimming. In other words, the current balance units T 1 ′-Tm′ are alternately worked and not worked according to the PWM dimming.

In one embodiment, the light strings S 1 -Sm of the q-th light source unit constitute a q-th light bar, where q is any integer from 1 to p. For example, the light strings S 1 -Sm of the first light source unit 11 constitute the first light bar 113 , the light strings S 1 -Sm of the second light source unit 12 constitute the second light bar 123 , the light strings S 1 -Sm of the third light source unit 13 constitute the third light bar 133 , and the light strings S 1 -Sm of the fourth light source unit 14 constitute the fourth light bar 143 . The first to p-th light bars are arranged to be a backlight of a display device. For example, the first and second light bars 113 and 123 are arranged on the upper side of the display panel of the display device, and the third and fourth light bars 133 and 143 are arranged on the lower side of the display panel of the display device.

In one embodiment, each current balance unit of the q-th light source unit includes a first transistor, such as, but not limited to, an NPN bipolar junction transistor (BJT) or N-channel field-effect transistor (FET), where q is any integer from 1 to p. Each first transistor comprises a first terminal coupled to the second terminal of a corresponding light string, a second terminal coupled to the second terminal of the q-th light source unit, and a control terminal. The control terminals of the first transistors are coupled to each other and the first terminal of one of the first transistors so that the first transistors of the q-th light source unit constitute a q-th current mirror. For example, the current balance units T 1 ′-Tm′ of the first light source unit 11 are matched NPN BJTs each including a first terminal (i.e. a collector terminal), a second terminal (i.e. an emitter terminal) and a control terminal (i.e. a base terminal). The first terminal of the first transistor T 1 is coupled to the second terminal of a corresponding light string S 1 , the first terminal of the first transistor T 2 is coupled to the second terminal of a corresponding light string S 2 , . . . , and the first terminal of the first transistor Tm is coupled to the second terminal of a corresponding light string Sm. The second terminals of the first transistors T 1 -Tm are coupled to the second terminal 112 of the first light source unit 11 . The control terminals of the first transistors T 1 -Tm are coupled to each other and to the first terminal of one of the first transistors T 1 -Tm, such as the first terminal of the first transistor T 1 . Accordingly, the first transistors T 1 -Tm of the first light source unit 11 constitute the first current mirror 114 . In addition, the first transistors T 1 -Tm of the second light source unit 12 constitute the second current mirror 124 , the first transistors T 1 -Tm of the third light source unit 13 constitute the third current mirror 134 , and the first transistors T 1 -Tm of the fourth light source unit 14 constitute the fourth current mirror 144 . The current mirrors 114 , 124 , 134 and 144 cause the light bars 113 , 123 , 133 and 143 to achieve current balance, respectively.

FIG. 2 is a schematic diagram illustrating an embodiment of the dimming circuit 16 shown in FIG. 1 . Referring to FIG. 2 , the dimming circuit 16 includes a first switch SW 1 and a second switch SW 2 each including a first terminal, a second terminal and a control terminal. The first terminal of the first switch SW 1 is coupled to the second terminal 142 of the fourth light source unit 14 to receive the current I 4 . The second terminal of the first switch SW 1 is coupled to the DC to DC converter 15 to output the feedback signal FB according to the dimming signal DIM and the current I 4 . The control terminal of the first switch SW 1 is coupled to receive the dimming signal DIM. The first switch SW 1 is turned on or off according to the dimming signal DIM. The first terminal of the second switch SW 2 is coupled to the control terminal of the first switch SW 1 . The second terminal of the second switch SW 2 is coupled to a disable signal. In the embodiment, the disable signal is a low-level signal, such as a ground signal. The control terminal of the second switch SW 2 is coupled to receive an on-off signal ON/OFF. The second switch SW 2 is turned on or off according to the on-off signal ON/OFF.

When the second switch SW 2 is turned on, the disable signal is coupled to the control terminal of the first switch SW 1 through the second switch SW 2 so that the first switch SW 1 is turned off. When the second switch SW 2 is turned off, the disable signal cannot be coupled to the control terminal of the first switch SW 1 , and the control terminal of the first switch SW 1 will receive the dimming signal DIM so that the first switch SW 1 is turned on or off according to the dimming signal DIM. In the embodiment, the first switch SW 1 is implemented by an N-channel FET, and the second switch SW 2 is implemented by a PNP BJT. The resistors R 1 -R 3 are used to limit current flowing through the switches SW 1 and SW 2 implemented by transistors. The capacitors C 1 and C 2 are used to filter high-frequency noise.

FIG. 3 is a schematic diagram illustrating another embodiment of a serial-type LED device according to the invention. Referring to FIG. 3 , a serial-type LED device 3 includes a DC to DC converter (not shown), first to third light source units (not shown), a fourth light source unit 14 ′ and a dimming circuit 16 ′. The DC to DC converter employs, but is not limited to, the DC to DC converter 15 shown in FIG. 1 , and the first to third light source units employ, but are not limited to, the first to third light source units 11 - 13 shown in FIG. 1 . The fourth light source unit 14 ′ includes a first terminal 141 ′ coupled to the second terminal of the third light source unit, a second terminal 142 ′, m light strings S 1 -Sm, m current balance units T 1 ′-Tm′, a short-circuit protection circuit 23 and a voltage compensation circuit 24 .

FIG. 4A is a schematic diagram illustrating an embodiment of the current balance unit shown in FIG. 3 . Referring to FIGS. 3 and 4A , each current balance unit, such as current balance unit T 1 ′, includes a second transistor Q 11 and a regulator 221 . The regulator 221 includes a current-limiting resistor Rb 1 , a detecting resistor Rs 1 and a shunt regulator TL 1 . The shunt regulator TL 1 , such as a commercial integrated circuit (IC) TL431 or TL432, includes a cathode terminal K, an anode terminal A and a reference terminal R. The current-limiting resistor Rb 1 includes a first terminal coupled to the dimming circuit 16 ′ to receive a control signal VCON, and a second terminal coupled to the control terminal of the second transistor Q 11 and the cathode terminal K of the shunt regulator TL 1 . The detecting resistor Rs 1 includes a first terminal coupled to the second terminal of the second transistor Q 11 and the reference terminal R of the shunt regulator TL 1 , and a second terminal coupled to the anode terminal A of the shunt regulator TL 1 and ground.

Because a current flowing through the light string S 1 flows through the second transistor Q 11 and the detecting resistor Rs 1 , the detecting resistor Rs 1 is used to detect the current flowing through the light string S 1 . If the shunt regulator TL 1 employs an IC TL431, the shunt regulator TL 1 will compare a voltage at the reference terminal R and an internal reference voltage Vref of 2.5V. When the voltage at the reference terminal R is greater than the reference voltage Vref of 2.5V, the shunt regulator TL 1 is conducted, and the cathode terminal K and the anode terminal A behave as short circuit. When the voltage at the reference terminal R is less than the reference voltage Vref of 2.5V, the shunt regulator TL 1 is not conducted, and the cathode terminal K and the anode terminal A behave as open circuit. In the embodiment, the desired current is the reference voltage Vref divided by a resistance of the detecting resistor Rs 1 , and expressed as Vref/Rs 1 . Therefore, the desired current can be changed by employing different shunt regulators having different reference voltages.

When the control signal VCON is a low-level signal, the control terminal of the second transistor Q 11 is coupled to the low-level signal and operated in a cut-off region, no current flows through the detecting resistor Rs 1 , the voltage across the detecting resistor Rs 1 (i.e. the voltage at the reference terminal R) becomes zero, the shunt regulator TL 1 is not conducted, so that the regulator 221 does not work to control the second transistor Q 11 to regulate the current flowing through the light string S 1 . When the control signal VCON is a high-level signal, the regulator 221 works and the second transistor Q 11 operates in a linear region, the regulator 221 detects the current flowing through a corresponding light string S 1 and compares it with the desired current. When the current flowing through the corresponding light string S 1 is greater than the desired current (i.e. the voltage across the detecting resistor Rs 1 is greater than the reference voltage Vref), the shunt regulator TL 1 is conducted, the control terminal of the second transistor Q 11 is coupled to ground, and the operating point of the second transistor Q 11 is controlled to move to the cut-off region to reduce the current flowing through the light string S 1 . When the current flowing through the corresponding light string S 1 is less than the desired current (i.e. the voltage across the detecting resistor Rs 1 is less than the reference voltage Vref), the shunt regulator TL 1 is not conducted, the control terminal of the second transistor Q 11 is coupled to a high-level control signal VCON, and the operating point of the second transistor Q 11 is controlled to move from the cut-off region to increase the current flowing through the light string S 1 .

FIG. 4B is a schematic diagram illustrating another embodiment of the current balance unit shown in FIG. 3 . Referring to FIGS. 3 and 4B , the current balance unit, such as current balance unit T 1 ′, includes a second transistor Q 11 and a regulator 221 . The regulator 221 includes an operational amplifier OP 1 and a detecting resistor Rs 1 . The operational amplifier OP 1 includes a non-inverting input terminal coupled to a setting voltage Vset 1 , an inverting input terminal coupled to the second terminal of the second transistor Q 11 , an output terminal coupled to the control terminal of the second transistor Q 11 , and a power terminal coupled to the dimming circuit 16 ′ to receive the control signal VCON. The detecting resistor Rs 1 includes a first terminal coupled to the second terminal of the second transistor Q 11 , and a second terminal coupled to ground. In the embodiment, the power terminal of the operational amplifier OP 1 includes a positive power terminal coupled to the dimming circuit 16 ′ to receive the control signal VCON, and a negative power terminal coupled to ground. In another embodiment, the operational amplifier OP 1 can be replaced by a comparator. In the embodiment, the desired current is the setting voltage Vset 1 divided by a resistance of the detecting resistor Rs 1 , and expressed as Vset/Rs 1 . Therefore, the desired current can be changed by setting a different setting voltage Vset 1 .

Similar to the current balance unit shown in FIG. 3A , when the regulator 221 does not work, the second transistor Q 11 operates in the cut-off region. When the regulator 221 works, the second transistor Q 11 operates in the linear region and the regulator 221 detects the current flowing through a corresponding light string S 1 and compares it with the desired current. When the current flowing through the corresponding light string S 1 is greater than the desired current (i.e. the voltage across the detecting resistor Rs 1 is greater than the setting voltage Vset 1 ), the output terminal of the operational amplifier OP 1 outputs a low-level signal to control the operating point of the second transistor Q 11 move to the cut-off region to reduce the current flowing through the light string S 1 . When the current flowing through the corresponding light string S 1 is less than the desired current (i.e. the voltage across the detecting resistor Rs 1 is less than the setting voltage Vset 1 ), the output terminal of the operational amplifier OP 1 outputs a high-level signal to control the operating point of the second transistor Q 11 to move from the cut-off region to increase the current flowing through the light string S 1 .

FIG. 5 is a schematic diagram illustrating an embodiment of the short-circuit protection circuit 23 shown in FIG. 3 . Referring to FIGS. 3 and 5 , the short-circuit protection circuit 23 includes a plurality of diodes D 11 -Dim, a Zener diode ZD 1 , a voltage dividing circuit 231 and a switch circuit 232 . Each diode (such as D 11 ) includes an anode terminal coupled to the second terminal (such as P 11 ) of a corresponding light string (such as S 1 ) and a cathode terminal coupled to a cathode terminal of the Zener diode ZD 1 . An anode terminal of the Zener diode ZD 1 is coupled to the voltage dividing circuit 231 . The switch circuit 232 includes a first terminal coupled to the dimming circuit 16 ′ and a second terminal coupled to a disable signal. In the embodiment, the disable signal is a low-level signal, such as a ground signal. In addition, the voltage dividing circuit 231 includes resistors R 1 -R 4 and a capacitor C 1 . The resistors R 1 -R 4 are used to divide voltage. The capacitor C 1 is used to stabilize and filter voltage. The switch circuit 232 includes a first type switch Q 1 , and accordingly the switch circuit 232 is a first type switch circuit. The first type switch or switch circuit is turned on when its control terminal receives a high-level signal and turned off when its control terminal receives a low-level signal.

When detecting the voltage at the second terminal of one of the light strings S 1 -Sm is greater than the overvoltage threshold, the Zener diode ZD 1 operates in a breakdown region so that a high-level signal is outputted through the voltage dividing circuit 231 to control the switch circuit 232 to be turned on, and the disable signal is transferred to the dimming circuit 16 ′ to implement that the dimming circuit 16 ′ receives the off signal OFF. When not detecting the voltage at the second terminal of one of the light strings S 1 -Sm is greater than the overvoltage threshold, the Zener diode ZD 1 does not operate in the breakdown region so that a low-level signal is outputted through the voltage dividing circuit 231 to control the switch circuit 232 to be turned off, and the disable signal is not transferred to the dimming circuit 16 ′ to implement that the dimming circuit 16 ′ receives the on signal ON. Therefore, the overvoltage threshold can be changed by employing different Zener diodes having different breakdown voltages.

FIG. 6 is a schematic diagram illustrating an embodiment of the voltage compensation circuit 24 shown in FIG. 3 . Referring to FIGS. 3 and 6 , the voltage compensation circuit 24 includes a plurality of diodes D 21 -D 2 m , a constant voltage source 241 , a voltage dividing circuit 242 , a positive resistor R 8 , a negative resistor R 7 , an operational amplifier OP 2 , a switch circuit 243 and a parallel resistor R 12 . Each diode (such as D 21 ) includes a cathode terminal coupled to the second terminal (such as P 11 ) of a corresponding light string (such as S 1 ) and an anode terminal coupled to an inverting input terminal of the operational amplifier OP 2 . The constant voltage source 241 provides a constant voltage Vo. The voltage dividing circuit 242 divides the constant voltage Vo to generate a setting voltage Vset 2 . The positive resistor R 8 includes a first terminal coupled to the voltage dividing circuit 242 to receive the setting voltage Vset 2 and a second terminal coupled to a non-inverting input terminal of the operational amplifier OP 2 . The negative resistor R 7 includes a first terminal coupled to the constant voltage source 241 to receive the constant voltage Vo and a second terminal coupled to the inverting input terminal of the operational amplifier OP 2 . The switch circuit 243 includes a first terminal for outputting a feedback signal FB to the DC to DC converter 15 , a second terminal coupled to a first terminal of the parallel resistor R 12 , and a control terminal coupled to an output terminal of the operational amplifier. A second terminal of the parallel resistor R 12 is coupled to ground. In the embodiment, the desired voltage is the setting voltage Vset 2 subtracting a voltage across the diode (such as D 21 ).

When detecting a voltage at the second terminal of one of the light strings S 1 -Sm is less than a desired voltage, the operational amplifier OP 2 outputs a high-level signal feedback signal FB to control the switch circuit 243 (or the first type switch Q 2 ) to be turned on to control the DC to DC converter 15 to increase the second DC voltage Vdc 2 . When not detecting the voltage at the second terminal of one of the light strings S 1 -Sm is less than the desired voltage, the operational amplifier OP 2 outputs a low-level signal feedback signal FB to control the switch circuit 243 (or the first type switch Q 2 ) to be turned off to control the DC to DC converter 15 to decrease the second DC voltage Vdc 2 .

FIG. 7 is a schematic diagram illustrating an embodiment of the dimming circuit 16 ′ shown in FIG. 3 . Referring to FIGS. 3 and 7 , the dimming circuit 16 ′ includes a first switch circuit 251 , a second switch circuit 252 and a third switch circuit 253 . A first terminal 2511 of the first switch circuit 251 receives the dimming signal DIM. A second terminal 2512 of the first switch circuit 251 is coupled to a control terminal 2523 of the second switch circuit 252 . A control terminal 2513 of the first switch circuit 251 is coupled to the short-circuit protection circuit 23 to receive the off signal OFF or the on signal ON. A first terminal 2521 of the second switch circuit 252 is coupled to a control terminal 2533 of the third switch circuit 253 . The second terminal 2522 of the second switch circuit 252 is coupled to a low-level signal, and the first terminal 2531 of the third switch circuit 253 is coupled to a high-level signal. The second terminal 2532 of the third switch circuit 253 outputs the control signal VCON. The second switch circuit 252 and the third switch circuit 253 are turned off when their control terminals do not receive a signal, and the control signal VCON is a low-level signal when the third switch circuit 253 is turned off. The first switch circuit 251 includes a first type switch Q 1 to be a first type switch circuit, the second switch circuit 252 includes a first type switch Q 2 to be a first type switch circuit, and the third switch circuit 253 includes a second type switch Q 3 to be a second type switch circuit. The second type switch or switch circuit is turned on when its control terminal receives a low-level signal and turned off when its control terminal receives a high-level signal.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.