Power switch circuit for single power supply

1. Technical Field

The present disclosure relates to power switch circuits and, particularly, to a power switch circuit with a single power supply.

2. Description of the Related Art

A power switch circuit usually outputs a common-mode voltage with double power supply including one power supply providing a positive voltage (e.g., +5V) and the other power supply providing a negative voltage (e.g., −5V). However, the common-mode voltage formed by both the positive voltage and the negative voltage may exceed the voltage rating of certain electronic components of an electronic device and damage those electronic components.

Therefore, what is needed is a novel power switch circuit with a single power supply to replace the double power supply.

The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of a power switch circuit with a single power supply. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.

FIG. 1 is a block diagram of a power switch circuit with a single power supply in accordance with an exemplary embodiment.

FIG. 2 is a circuit diagram of the power switch circuit of FIG. 1 .

Referring to FIG. 1 , an embodiment of a power switch circuit 30 is illustrated. The power switch circuit 30 connects to an output port 50 to provide power to the output port 50 .

The power switch circuit 30 includes a single power supply 20 , a control unit 31 , a logic unit 33 , and a switch unit 35 . In the embodiment, an anode of the single power supply 20 is grounded, and a cathode of the single power supply 20 is connected to the switch unit 35 .

The control unit 31 is configured for generating a voltage control signal and transmitting the voltage control signal to the logic unit 33 . In the embodiment, the control unit 31 can be a square wave generator or a rectangular wave generator.

The logic unit 33 is configured for inverting the voltage control signal and outputting the inverted voltage control signal to turn on or turn off the switch unit 35 .

Referring to FIG. 2 , the logic unit 33 includes a first resistor 335 and a transistor 331 . In the embodiment, the transistor 331 is a PNP transistor. The base of the PNP transistor 331 is connected to the control unit 31 , the collector of the PNP transistor 331 is connected to the switching unit 35 , and the emitter of the PNP transistor 331 is connected to ground via the first resistor 335 . The logic unit 33 further includes a first filter 332 . The first filter 332 is configured for filtering noises from signals outputted by the control unit 31 . The first filter 332 includes a resistor 334 and a capacitor 333 connected in parallel between the base and the emitter of the PNP transistor 331 .

The switch unit 35 includes a second resistor 355 and a transistor 351 . In the embodiment, the transistor 351 is an NMOS transistor. The source of the NMOS transistor 351 is connected to the single power supply 20 , the drain of the NMOS transistor 351 is connected to the output port 50 , and the gate of the NMOS transistor 351 is connected to the collector of the PNP transistor 331 via the second resistor 355 . The switch unit 35 includes a second filter 332 . The second filter 332 is configured for filtering the noises from the voltage outputted by the single power supply 20 . The second filter 332 includes a resistor 354 and a capacitor 353 connected in parallel between the drain and the gate of the NMOS transistor 351 .

When the control unit 31 outputs a high negative voltage (e.g., −3V) to the base of the PNP transistor 331 , the PNP transistor 331 is turned on. The collector of the PNP transistor 331 outputs a high positive voltage (e.g., +3V) to the gate of the NMOS transistor 351 via the second resistor 355 . The NMOS transistor 351 is also turned on, thus the single power supply 20 can provide voltage to the output port 50 via the switch unit 35 .

When the control unit 31 outputs a high positive voltage to the base of the PNP transistor 331 , the PNP transistor 331 is turned off, thus there is no voltage drop between the gate and the source of the NMOS transistor 351 , and the NMOS transistor 351 is turned off. Therefore, the switch unit 35 cuts off the power from the single power supply 20 to the output port 50 .

It is understood that the disclosure may be embodied in other forms without departing from the spirit thereof. Thus, the present examples and embodiments are to be considered in all respects as illustrative and not restrictive, and the disclosure is not to be limited to the details given herein.