USPatent applicationPatented

Charge pump circuit

Granted 14 Aug 2012 · 1 office action

Life of the application

8 dated events
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Abstract

A charge pump circuit includes an input end, a first reservoir capacitor, a second reservoir capacitor, a first output end, a second output end, and a charge pump unit. The input end is utilized for receiving an input voltage. The charge pump unit includes a first flying capacitor, a second capacitor, a plurality of switches, and a control unit. The control unit is utilized for controlling on/off state of the plurality of switches so that the first flying capacitor provides a positive charge pump voltage to the first output end or a negative charge pump voltage to the second output and the second flying capacitor provides a positive charge pump voltage to the first output end through charge and discharge process.

Description

7 parts
›BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a charge pump circuit, and more particularly, to a charge pump circuit capable of high efficiency operation via arrangement of a charge distribution ratio.

2. Description of the Prior Art

Charge pump circuits are typically applied in driving circuits of electronic products, such as memory drivers, LCD backlight modules, and LED backlight drivers. The charge pump circuit accomplishes energy transfer and voltage conversion by using charges stored on capacitors to establish required positive or negative high output voltages, and also simultaneously provides different output voltages at various voltage levels.

Please refer to FIG. 1 . FIG. 1 is a schematic diagram of a charge pump circuit 10 according to the prior art. As shown in FIG. 1 , the charge pump circuit 10 includes a positive charge pump unit 102 , a negative charge pump unit 104 , a second stage charge pump unit 106 , and a diode 108 . The positive charge pump unit 102 is used for converting an input voltage VCI to a positive charge pump voltage AVDD, which is usually a multiple of the input voltage VCI. The negative charge pump unit 104 is used for converting the input voltage VCI to a negative charge pump voltage VCL which is a negative voltage and usually a negative multiple of the input voltage VCI. As shown in FIG. 1 , the positive charge pump unit 102 utilizes two flying capacitors C F1 and C F2 and the negative charge pump unit 104 utilizes one flying capacitor C F3 for energy storage and transfer.

The conventional charge pump circuit 10 usually employs two-phase operation, including a first operation phase PH 1 and second operation phase PH 2 , for the positive charge pump unit 102 and the negative charge pump unit 104 . Please refer to FIG. 2 and FIG. 3 . FIG. 2 and FIG. 3 are schematic diagrams of the charge pump circuit 10 shown in FIG. 1 operating in the first operation phase PH 1 and the second operation phase PH 2 , respectively. The positive charge pump unit 102 includes flying capacitors C F1 and C F2 , a reservoir capacitor C R1 , and switches SW 1 to SW 8 . The negative charge pump unit 104 includes a flying capacitor C F3 , a reservoir capacitor C R2 , and switches SW 9 to SW 12 . Interconnections of the switches SW 1 to SW 12 are as shown in FIG. 2 and FIG. 3 , and further description thereof is omitted for brevity. Please further refer to FIG. 2 . During the first operation phase PH 1 , the switches SW 1 , SW 2 , and SW 7 to SW 10 are on, and the remaining switches SW 3 to SW 6 , and SW 11 to SW 12 are off. In such a condition, the input voltage VCI charges the flying capacitor C F1 to cause the voltage across the flying capacitor C F1 to be the same as the input voltage VCI. The flying capacitor C F2 charges the reservoir capacitor C R2 to cause the voltage across the reservoir capacitor C R1 to be twice the input voltage VCI, such that the positive charge pump voltage AVDD is then outputted at two times the input voltage VCI. The input voltage VCI also charges the flying capacitor C F3 .

Please further refer to FIG. 3 . While operating in the second operation phase PH 2 , the switches SW 3 , SW 4 , SW 5 , SW 6 , SW 11 , and SW 12 are on; the switches SW 1 , SW 2 , and SW 7 to SW 10 are off. In such a condition, the flying capacitor C F1 charges the reservoir capacitor C R1 to cause the voltage across the reservoir capacitor C R1 to be twice the input voltage VCI. The flying capacitor C F3 charges the reservoir capacitor C R2 to cause the voltage across the reservoir capacitor C R2 to be the negative input voltage VCI. The input voltage VCI charges the flying capacitor C F2 to cause the voltage across the flying capacitor C F2 to be the same as the input voltage VCI. Therefore, the charge pump circuit 10 can realize required multiplied positive or negative voltages by operating in the mentioned two operation phases PH 1 , PH 2 in turn according to a charge pump clock CLK_Pump.

However, in practice, the positive charge pump unit 102 needs to achieve high pumping efficiency so that the prior art needs to utilize more flying capacitors for energy storage and transfer in addition to increased operation clock or enlarged size of semiconductor elements. For example, the positive charge pump unit 102 utilizes two flying capacitors (C F1 , C F2 ), and the negative charge pump unit 104 also utilizes one flying capacitor (C F3 ). Therefore, this may waste manufacturing cost.

›SUMMARY OF THE INVENTION · 1 of 2

It is therefore an objective of the present invention to provide a charge pump circuit with charge proportional distribution capability.

The present invention discloses a charge pump circuit for producing a positive charge pump voltage and a negative charge pump voltage according to an input voltage, which the charge pump circuit comprises an input end for receiving the input voltage; a first reservoir capacitor comprising a first terminal and a second terminal, wherein the second terminal is coupled to a ground end; a second reservoir capacitor comprising a first terminal and a second terminal, wherein the second terminal is coupled to the ground end; a first output end coupled to the first terminal of the first reservoir capacitor for outputting the positive charge pump voltage; a second output end coupled to the first terminal of the second reservoir capacitor for outputting the negative charge pump voltage; and a charge pump unit coupled to the input end, the first terminal of the first reservoir capacitor, and the first terminal of the second reservoir capacitor, the charge pump unit comprises a first flying capacitor; a second flying capacitor; a first switch coupled between the input end and a first terminal of the first flying capacitor; a second switch coupled between the ground end and a second terminal of the first flying capacitor; a third switch coupled between the input end and the second terminal of the first flying capacitor; a fourth switch coupled between the first terminal of the first reservoir capacitor and the first terminal of the first flying capacitor; a fifth switch coupled between the ground end and the first terminal of the first flying capacitor; a sixth switch coupled between the first terminal of the second reservoir capacitor and the second terminal of the first flying capacitor; a seventh switch coupled between the input end and a first terminal of the second flying capacitor; an eighth switch coupled between the ground end and a second terminal of the second flying capacitor; an ninth switch coupled between the input end and the second terminal of the second flying capacitor; an tenth switch coupled between the first terminal of the first reservoir capacitor and the first terminal of the second flying capacitor; and a control unit for controlling on/off operation of the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, the seventh switch, the eighth switch, the ninth switch, and the tenth switch to produce the positive charge pump voltage and the positive charge pump voltage.

The present invention discloses a charge pump circuit for producing a positive charge pump voltage and a negative charge pump voltage according to an input voltage, which comprises an input end for receiving the input voltage; a first reservoir capacitor comprising a first terminal and a second terminal, wherein the second terminal is coupled to a ground end; a second reservoir capacitor comprising a first terminal and a second terminal, wherein the second terminal is coupled to the ground end; a first output end coupled to the first terminal of the first reservoir capacitor for outputting the positive charge pump voltage; a second output end coupled to the first terminal of the second reservoir capacitor for outputting the negative charge pump voltage; and a charge pump unit coupled to the input end, the first terminal of the first reservoir capacitor, and the first terminal of the second reservoir capacitor, which the charge pump unit comprises a first flying capacitor; a second flying capacitor; a first switch coupled between the input end and a first terminal of the first flying capacitor; a second switch coupled between the ground end and a second terminal of the first flying capacitor; a third switch coupled between the input end and the second terminal of the first flying capacitor; a fourth switch coupled between the first terminal of the first reservoir capacitor and the first terminal of the first flying capacitor; a fifth switch coupled between the ground end and the first terminal of the first flying capacitor; a sixth switch coupled between the first terminal of the second reservoir capacitor and the second terminal of the first flying capacitor; and a control unit for controlling on/off operation of the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch to produce the positive charge pump voltage and the positive charge pump voltage.

The present invention discloses a charge pump circuit for producing a positive charge pump voltage and a negative charge pump voltage according to an input voltage, which comprises an input end for receiving the input voltage; a first reservoir capacitor; a second reservoir capacitor; a first output end coupled to the first reservoir capacitor for outputting the positive charge pump voltage; a second output end coupled to the second reservoir capacitor for outputting the negative charge pump voltage; and a charge pump unit coupled to the input end, the first reservoir capacitor, and the second reservoir capacitor, the charge pump unit comprises a first flying capacitor; a first switching module coupled to the input end, a ground end, and the first flying capacitor; a second switching module coupled to the input end, the ground end, the first flying capacitor, and the first output end; a third switching module coupled to the input end, the ground end, the first flying capacitor, and the second output end; and a control unit for controlling on/off operation of the first switching module, the second switching module, and the third switching module to utilize the first switching module to charge the first flying capacitor and to selectively utilize the second switching module and the third switching module to transfer the charges stored on the first flying capacitor to the first reservoir capacitor or the second reservoir capacitor so as to output the positive charge pump voltage via the first output end or and the positive charge pump voltage via the second output end.

›SUMMARY OF THE INVENTION · 2 of 2

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

›BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a charge pump circuit according to the prior art.

FIG. 2 is schematic diagrams of the charge pump circuit shown in FIG. 1 operating in first operation phase PH 1 .

FIG. 3 is schematic diagrams of the charge pump circuit shown in FIG. 1 operating in second operation phase PH 2 .

FIG. 4 is a schematic diagram of a charge pump circuit according to an embodiment of the present invention.

FIG. 5 to FIG. 10 are schematic diagrams of the charge pump circuit operating in each operation phases according to an embodiment of the present invention.

FIG. 11 is a schematic diagram of an operation phase sequence according to an embodiment of the present invention.

FIG. 12 is a schematic diagram of an operation phase sequence according to another embodiment of the present invention.

›DETAILED DESCRIPTION · 1 of 3

Please refer to FIG. 4 . FIG. 4 is a schematic diagram of a charge pump circuit 40 according to an embodiment of the present invention. The charge pump circuit 40 receives an input voltage VCI via an input end 402 , and performs voltage conversion with the input voltage VCI. The charge pump circuit 40 can provide a positive charge pump voltage AVDD which is higher than the input voltage VCI, and a negative charge pump voltage VCL. The positive charge pump voltage AVDD and the negative charge pump voltage VCL are outputted from a first output end 404 and a second output end 406 , respectively. The charge pump circuit 40 includes a charge pump unit 408 , a control unit 410 , a first reservoir capacitor C R1 , and a second reservoir capacitor C R2 . The charge pump unit 408 includes switching modules SM 1 to SM 5 , a first flying capacitor C F1 , and a second flying capacitor C F2 . The first switching module SM 1 is coupled to input end 402 , ground end GND, and first flying capacitor C F1 . The second switching module SM 2 is coupled to input end 402 , ground end GND, first flying capacitor C F1 , and first output end 404 . The third switching module SM 3 is coupled to input end 402 , ground end GND, first flying capacitor C F1 , and second output end 406 . According to the present invention, the control unit 410 is utilized for controlling on/off operation of the first switching module SM 1 , the second switching module SM 2 , and the third switching module SM 3 to utilize the first switching module SM 1 to charge the first flying capacitor C F1 and to selectively utilize the second switching module SM 2 and the third switching module SM 3 to transfer charges stored on the first flying capacitor C F1 to the first reservoir capacitor C R1 or the second reservoir capacitor C R2 , such that the charge pump circuit 40 outputs the positive charge pump voltage AVDD via the first output end 404 or the negative charge pump voltage VCL via the second output end 406 . In other words, compared with the conventional method, the present invention can provide positive and negative charge pump voltages by sharing the first flying capacitor C F1 for voltage conversion purposes.

Regarding the charge pump circuit 40 , please refer to FIG. 4 . The charge pump circuit 40 is also able to control on/off operation of the fourth switching module SM 4 and the fifth switching module SM 5 by the control unit 410 . Moreover, the control unit 410 controls the fourth switching module SM 4 for charging the second flying capacitor C F2 . After that, the control unit 410 controls the fifth switching module SM 5 for transferring the charges stored on the second flying capacitor C F2 to the second reservoir capacitor C R2 so that the charge pump circuit 40 can provide the positive charge pump voltage VCL via the second output end 404 . As shown in FIG. 4 , the first switching module SM 1 includes the switches SW 1 and SW 2 . The second switching module SM 2 includes the switches SW 3 and SW 4 . The third switching module SM 3 includes the switches SW 5 and SW 6 . The fourth switching module SM 4 includes the switches SW 7 and SW 8 . The fifth switching module SM 5 includes the switches SW 9 and SW 10 . The switch SW 1 is coupled between the input end 402 and a first terminal of the first flying capacitor C F1 . The second switch SW 2 is coupled between the ground end GND and a second terminal of the first flying capacitor C F1 . The third switch SW 3 is coupled between the input end 402 and the second terminal of the first flying capacitor C F1 . The fourth switch SW 4 is coupled between the first terminal of the first reservoir capacitor C R1 and the first terminal of the first flying capacitor C F1 . The fifth switch SW 5 is coupled between the ground end GND and the first terminal of the first flying capacitor C F1 . The sixth switch SW 6 is coupled between the first terminal of the second reservoir capacitor C R2 and the second terminal of the first flying capacitor C F1 . The seventh switch SW 7 is coupled between the input end 402 and a first terminal of the second flying capacitor C F2 . The eighth switch SW 8 is coupled between the ground end GND and a second terminal of the second flying capacitor C F2 . The ninth switch SW 9 is coupled between the input end 402 and the second terminal of the second flying capacitor C F2 . The tenth switch SW 10 is coupled between the first terminal of the first reservoir capacitor C R1 and the first terminal of the second flying capacitor C F2 . As a result, the charge pump unit 408 utilizes the first flying capacitor C F1 and the second flying capacitor C F2 by performing charging (energy storage) and discharging (energy transfer) procedures to share the charges to the first reservoir capacitor C R1 and the second reservoir capacitor C R2 for providing positive or negative multiple voltages.

In detail, the control unit 410 is coupled to switches SW 1 to SW 10 and controls on/off operation of each switch to make charge pump circuit 40 operate in a first operation phase PH 1 , a second operation phase PH 2 , a third operation phase PH 3 , a fourth operation phase PH 4 , a fifth operation phase PH 5 , and a sixth operation phase PH 6 . Through operating in the operation phase configurations, the charges stored on the first flying capacitor C F1 can be transferred to the first reservoir capacitor C R1 or the second reservoir capacitor C R2 , and the charges stored on the second flying capacitor C F 2 can also be transferred to the first reservoir capacitor C R1 . In other words, the present invention is capable of controlling each switch through the control unit 410 so that the first flying capacitor C F1 and the second flying capacitor C F 2 can provide the required voltage according to the corresponding operation phase sequence. Further description associated with the operation of each operation phase is provided as follows.

Please refer to FIG. 5 to FIG. 10 . FIG. 5 to FIG. 10 are schematic diagrams of the charge pump circuit 40 operating in each operation phase according to an embodiment of the present invention. As shown in FIG. 5 , during the first operation phase PH 1 , the control unit 410 controls the switches SW 1 and SW 2 to be turned on, and the other switches are in the off state. In such a condition, the charges corresponding to the voltage potential difference between the input voltage VCI and the ground end GND may be stored on the first flying capacitor C F1 , i.e. the input voltage VCI charges the first flying capacitor C F1 . Therefore, during the first operation phase PH 1 , the first flying capacitor C F1 will be charged to a voltage identical to the input voltage VCI.

›DETAILED DESCRIPTION · 2 of 3

Please refer to FIG. 6 . During the second operation phase PH 2 , the control unit 410 controls the switches SW 3 and SW 4 to be turned on, and the other switches are in the off state. The charges stored on the first flying capacitor C F1 are transferred to the first reservoir capacitor C R1 , so that the first reservoir capacitor C R1 holds a voltage difference between the first terminal and the second terminal thereof at twice the input voltage VCI after transferring. At this time, the first output end 404 can output the positive charge pump voltage AVDD at twice the input voltage VCI. Thus, after the operation of the first operation phase PH 1 and the second operation phase PH 2 , the first flying capacitor C F1 can store energy by charging procedure (PH 1 ) and transfer the stored energy to the first reservoir capacitor C R1 by discharging procedure (PH 2 ), so as to generate the positive charge pump voltage AVDD. Please refer to FIG. 7 . The third operation phase PH 3 is the same as the first operation phase PH 1 . The control unit 410 controls the switches SW 1 and SW 2 to be turned on, and the other switches are in the off state. In such a condition, the input voltage VCI charges the first flying capacitor C F1 , so that the first flying capacitor C F1 holds a voltage difference between the first terminal and the second terminal thereof identical to the input voltage after charging. Please further refer to FIG. 8 . During the fourth operation phase PH 4 , the control unit 410 controls the switches SW 5 and SW 6 to be turned on, and the other switches are in the off state. The charges stored on the first flying capacitor C F1 are transferred to the second reservoir capacitor C R2 . Because one terminal of the first flying capacitor C F1 is coupled to the ground end GND during the fourth operation phase PH 4 , the voltage level of the second reservoir capacitor C R2 compared to the ground end GND is a negative value after charging. That is, the second output end 406 outputs the negative charge pump voltage VCL at the negative input voltage VCI. As a result, through performing the operation of the first operation phase PH 1 and the second operation phase PH 2 for the first flying capacitor C F1 , the positive charge pump voltage AVDD can be obtained. Through performing the operation of the third operation phase PH 3 and the fourth operation phase PH 4 for the first flying capacitor C F1 , the negative charge pump voltage VCL can be obtained. In other words, the present invention can produce required positive or negative multiple voltages by sharing the first flying capacitor C F1 by operation phase arrangement.

In addition, please refer to FIG. 9 . During the fifth operation phase PH 5 , the control unit 410 controls the switches SW 9 and SW 10 to be turned on, and the other switches are in the off state. The charges stored on the second flying capacitor C F2 are transferred to the first reservoir capacitor C R1 . As shown in FIG. 10 , during the sixth operation phase PH 6 , the control unit 410 controls the switches SW 7 and SW 8 to be turned on, and the other switches are in the off state. In such a condition, the input voltage VCI charges the second flying capacitor C F2 , so that the second flying capacitor C F2 holds a voltage difference between the first terminal and the second terminal thereof identical to the input voltage VCI after charging. Therefore, after the second flying capacitor C F2 is performed in the fifth operation phase PH 5 and sixth operation phase PH 6 , the positive charge pump voltage AVDD at twice the input voltage VCI is obtained. As can be seen, compared with the charge pump circuit 10 shown in FIG. 1 using three flying capacitors, the present invention only utilizes two flying capacitors and also achieves the same voltage conversion purpose.

In short, compared with the prior art, the present invention can dynamically arrange operation phase sequences to achieve required charge distribution proportion by sharing part of the flying capacitors for pumping purposes.

Moreover, through the operation of the first operation phase PH 1 , the second operation phase PH 2 , the operation of the third operation phase PH 3 or the fourth operation phase PH 4 , the charges stored on the first flying capacitor C F1 can be shared to the first reservoir capacitor C R1 or the second reservoir capacitor C R2 to generate the positive charge pump voltage AVDD or the negative charge pump voltage VCL. Similarly, through the operation of the fifth operation phase PH 5 and the sixth operation phase PH 6 , the charges stored on the second flying capacitor C F2 can be shared to the first reservoir capacitor C R1 to generate the positive charge pump voltage AVDD. Note that the first flying capacitor C F1 and the second flying capacitor C F2 are utilized for providing the positive charge pump voltage AVDD at different times. In addition, to make the first flying capacitor C F1 provide proper charges to the first reservoir capacitor C R1 or the second reservoir capacitor C R2 at the right moment, the present invention can arrange sequences or times for performing the first operation phase PH 1 , the second operation phase PH 2 , the operation of the third operation phase PH 3 and the fourth operation phase PH 4 , a result of such arrangement being called a first operation phase sequence PS 1 . Similarly, to make the second flying capacitor C F2 provide proper charges to the first reservoir capacitor C R1 , the present invention can arrange sequences or times of performing the fifth operation phase PH 5 and the sixth operation phase PH 6 , a result of such arrangement being called a second operation phase sequence PS 2 . In other words, through setting the first operation phase sequence PS 1 and the second operation phase sequence PS 2 , the charge pump circuit 40 can provide the positive charge pump voltage AVDD via the first flying capacitor C F1 and the second flying capacitor C F2 in different operation periods, respectively, and the negative charge pump voltage VCL via the first flying capacitor C F1 . Furthermore, in the embodiment of the present invention, the first operation phase sequence PS 1 and the second operation phase sequence PS 2 can be generated according to a charge pump clock CLK_pump, and the length of each operation phase in the operation phase sequence is a half period of the charge pump clock CLK_pump, i.e. two operation phases are performed during each clock period.

›DETAILED DESCRIPTION · 3 of 3

Therefore, at the same time, the first flying capacitor C F1 and the second flying capacitor C F2 can perform corresponding charging or discharging procedures respectively according to the first operation phase sequence PS 1 and the second operation phase sequence PS 2 to generate charge pump voltages efficiently. Note that it should be considered that the first flying capacitor C F1 and the second flying capacitor C F2 are utilized for producing positive charge pump voltage AVDD at different times while setting the first operation phase sequence PS 1 and the second operation phase sequence PS 2 . In other words, the first operation phase PH 1 and the fifth operation phase PH 5 can not be operated to generate the positive charge pump voltage AVDD at the same time. In practice, the present invention can adjust operation phases for arranging the order (charging or discharging timing) for the first flying capacitor C F1 and the second flying capacitor C F2 to generate the positive charge pump voltage AVDD.

Briefly, according to the first operation phase sequence PS 1 and the second operation phase sequence PS 2 , the charge pump circuit 40 can provide required voltages efficiently by sharing a flying capacitor with a proper charge distribution proportion. For example, please refer to FIG. 11 . FIG. 11 is a schematic diagram of an operation phase sequence according to an embodiment of the present invention. The first operation phase sequence PS 1 is [PH 1 PH 2 PH 3 PH 4 ] and the second operation phase sequence PS 2 is [PH 5 PH 6 ]. As shown in FIG. 11 , during the duty cycle T 1 , the positive charge pump voltage AVDD is generated, and during the duty cycle T 2 , the negative charge pump voltage VCL is generated. This means the half duration of each duty cycle is utilized for generating the positive charge pump voltage AVDD and the other half duty cycle of each period is utilized for generating the negative charge pump voltage VCL, so that the charge distribution proportion is: 1:1. In view of flying capacitors, the first flying capacitor CF 1 averages the operation time to produce the positive charge pump voltage AVDD and the negative charge pump voltage VCL. The second flying capacitor CF 2 only produces the positive charge pump voltage AVDD. Overall, the charge pump circuit 40 utilizes one half flying capacitor for producing the positive charge pump voltage AVDD and one half flying capacitor for producing the negative charge pump voltage VCL according to the first operation phase sequence PS 1 and the second operation phase sequence PS 2 in the embodiment of the present invention. Please refer to FIG. 12 . FIG. 12 is a schematic diagram of an operation phase sequence according to another embodiment of the present invention. The first operation phase sequence PS 1 is [PH 1 PH 2 PH 1 PH 2 PH 3 PH 4 ]. Compared with FIG. 1 , the first operation phase sequence PS 1 adds an operation set having the first operation phase PH 1 and the second operation phase PH 2 for each operation phase sequence. The second operation phase sequence PS 2 is [PH 5 PH 6 ]. As shown in FIG. 12 , during duty cycles T 1 and T 2 , three fourths of duration is utilized for generating the positive charge pump voltage AVDD, and the remaining one fourth of duration is utilized for generating the negative charge pump voltage VCL. The charge distribution proportion of the first flying capacitor CF 1 is 2:1. Overall, the charge pump circuit 40 generates the positive charge pump voltage AVDD with higher efficiency and the negative charge pump voltage VCL with lower efficiency.

In view of flying capacitor, the charge pump circuit 40 utilizes 1.66 flying capacitors for producing the positive charge pump voltage AVDD and 0.33 flying capacitors for producing the negative charge pump voltage VCL. As a result, the present invention can adjust the efficiency of generating the positive charge pump voltage AVDD and the negative charge pump voltage VCL by charge proportion distribution. Please note that the above-mentioned embodiments are exemplary embodiments of the present invention, and those skilled in the art can make alternations and modifications accordingly.

In summary, compared with the prior art, the present invention requires fewer flying capacitors, reducing manufacturing cost. Furthermore, the present invention can dynamically arrange operation phase sequences to achieve high efficiency charge pumping by sharing part of the flying capacitors for pumping purposes.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.

Claims as granted

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Classifications

3 codes
IPC · International Patent Classification
Section G — Physics
  • G05F3/02
  • G05F1/10
USPC · US Patent Classification
327/536

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⤢ drag to zoomApr 2010Jul 2010Oct 2010Jan 2011Apr 2011Jul 2011Oct 2011Jan 2012Apr 2012Jul 2012Oct 2012USPTOApplicantNon-final rejectionResponse after non-final
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842 days filing → grant
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non-final + final
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no RCE
Examiner
Quan Tra
art unit 2816 · TC 2800
Citations: 3 back · 19 forward

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