Snubber capacitor generating an auxillary power supply voltage

This application claims the benefit, under 35 U.S.C. §365 of International Application PCT/US2008/000693 and filed Mar. 25, 2008, which was published in accordance with PCT Article 21(2) on Oct. 1, 2009, in English.

The present invention relates to a low power supply for energizing an electronic circuit.

A switching power supply, for example, a pulse-width modulated power supply can include an output stage having a primary winding of an isolation transformer. The transformer primary winding is coupled to a mains supply voltage in a non-isolated manner. An isolated power supply voltage is produced from a voltage developed in a secondary winding of the isolation transformer. Typically, a snubber capacitor is coupled to the primary winding for reducing the rate of change of a flyback voltage portion of a voltage developed at the primary winding.

An integrated circuit (IC) forming a pulse-width modulator controls the switching operation of the output stage. For its operation, this IC needs to be powered by an auxiliary, non-isolated power supply voltage. The non-isolated power supply voltage can be produced in a power supply that needs to provide a relatively low power. It may be desirable to produce the non-isolated power supply voltage from a non isolated voltage produced already in the primary winding of the transformer.

In carrying out an aspect of the invention, a snubber capacitor that is coupled to the primary winding is used for producing a capacitive coupled charging current. The capacitive-coupled charging current is coupled to a filter or charge storage second capacitor for producing in the second capacitor a first portion of the non-isolated power supply voltage for energizing the IC.

In carrying out another aspect of the invention, during a portion of a switching cycle of the output stage, the snubber capacitor is coupled to an inductor to form a resonant circuit. The resonant circuit produces in the second capacitor a second portion of the non isolated power supply voltage for energizing the IC.

In carrying out a further inventive feature, a switching, shunt transistor regulates the low voltage power supply voltage by selectively interrupting a current that would otherwise charges the second capacitor.

A power supply, embodying an inventive feature, includes a source of an input supply voltage coupled to a first winding of a transformer. An output switching transistor is responsive to a first switching control signal and coupled to the first winding for producing a current in the first winding that is transformer-coupled to a second winding of the transformer to produce a first output supply voltage that energizes a first load circuit. The output switching transistor interrupts the first winding current, during a first portion of a cycle of the first switching control signal, and produces a flyback voltage in the first winding; A first capacitor is coupled to the first winding and to a second capacitor to form a snubber capacitance network that reduces a rate of change of the flyback voltage and produces a capacitive current in each of the first and second capacitors. The capacitive current stores a corresponding charge in each of the first and second capacitors that develops in the second capacitor a first portion of a second supply voltage. The second supply voltage is coupled to a second load circuit. An inductor is coupled to the first capacitor by an operation of the output switching transistor, during a second portion of the cycle, to form with the first capacitor a resonant circuit for generating from the charge stored in the first capacitor a resonant current. The resonant current is coupled to the second capacitor. The resonant current stores a charge in the second capacitor for developing a second portion of the second supply voltage.

FIG. 1 shows a power supply 100 in accordance with an embodiment of the present invention;

FIGS. 2 a , 2 b and 2 c illustrate waveforms associated with the operation of circuit 100 of FIG. 1 ; and

FIGS. 3 a , 3 b and 3 c illustrate the same waveforms as those of FIGS. 2 a , 2 b and 2 c , respectively, but in an expanded time scale.

FIG. 1 depicts a power supply 100 embodying an aspect of the invention. A direct current (DC) input supply voltage DCin produced from a mains supply voltage, not shown, is developed in a mains filter capacitor C 1 and applied between an input terminal 101 of a primary winding W 1 of an isolation transformer T 1 and a primary side, non-isolated reference potential GND. A second terminal 102 of winding W 1 is coupled to a drain terminal of a switching output transistor Q 1 . A source terminal 103 of transistor Q 1 is coupled to a current sampling resistor R 1 to produce a current sampling signal CS that is indicative of a current flowing in transistor Q 1 . Resistor R 1 is coupled between terminal 103 and primary side reference potential GND.

Signal CS is coupled to a conventional duty cycle modulator integrated circuit (IC) U 1 . IC U 1 operates in a current mode control in a conventional manner. IC U 1 produces a duty cycle modulated control signal Drv that is coupled to a gate terminal of transistor Q 1 . Transistor Q 1 and transformer T 1 produce a first output supply voltage Vout in a conventional manner from a voltage that is transformer coupled from winding W 1 . Voltage Vout is isolated from primary side reference potential GND and is referenced to an isolated secondary side reference potential GND-ISOLATED. Output supply voltage Vout is controlled in accordance with duty cycle modulated control signal Div in a conventional manner.

A feedback signal FB, developed in a capacitor C 3 , is referenced to primary side reference potential GND. Signal FB is produced in an opto-coupler U 2 in a conventional manner. Signal FB is indicative of a magnitude of first output supply voltage Vout. Feedback signal FB produces variations in the duty cycle of duty cycle modulated control signal Dry in a conventional negative feedback manner. Supply voltage DCin is also coupled via a start-up resistor R 3 to IC U 1 to produce a start-up voltage HV for initiating start-up operation in a conventional manner.

FIGS. 2 a , 2 b and 2 c illustrate current or voltage waveforms associated with the operation of circuit 100 of FIG. 1 . FIGS. 3 a , 3 b and 3 c illustrate waveforms of the same current or voltage as in FIGS. 2 a , 2 b and 2 c , respectively, but in a time expanded scale. Similar symbols and numerals in FIGS. 2 a , 2 b and 2 c , 3 a , 3 b and 3 c and 1 indicate similar items or functions.

In carrying an inventive feature, a snubber capacitor C 4 of FIG. 1 is coupled via a diode D 1 to a much larger filter supply capacitor C 2 . When transistor Q 1 is turned off, at a time t 2 of FIG. 3 a or 3 b , the flow of a current IW 1 in winding W 1 of FIG. 1 is interrupted. Consequently, a periodic flyback portion V 102 -FB of a drain voltage V 102 of FIGS. 1 and 3 a and 2 a with a period T of FIG. 2 a is produced at terminal 102 of FIG. 1 and causes a current ID 1 of FIGS. 1 , 3 c and 2 c to flow in capacitors C 4 , diode D 1 and capacitor C 2 of FIG. 1 . Thus, capacitors C 2 and C 4 form a capacitive voltage divider with respect to drain voltage V 102 . Current ID 1 charges each of capacitors C 2 and C 4 . Thus, advantageously, a first portion of a supply voltage Vcc is developed in capacitor C 2 .

In carrying out another inventive feature, capacitors C 2 and C 4 are included in a snubber network 104 . The capacitance of the series coupled capacitors C 2 and C 4 is determined significantly more by the value of the capacitance of capacitor C 4 than the value of capacitor C 2 . When transistor Q 1 turns off, snubber network 104 reduces, in a conventional manner, the rate of change of up-ramping flyback portion V 102 -FB of FIG. 3 a . Snubber network 104 of FIG. 1 can include, in a conventional manner, other components that are collectively identified by an element 104 a . An inductor L 1 is coupled between snubber capacitor C 4 and primary side reference potential GND.

At time t 0 of FIGS. 2 a and 3 a , transistor Q 1 of FIG. 1 is turned on and produces an up-ramping current IW 1 in winding W 1 . Current IW 1 rises linearly and stores magnetic energy in the inductance of winding W 1 . At the same time, inductor L 1 is coupled in parallel with capacitor C 4 to form a resonant circuit. A resonant current IL 1 in inductor L 1 produces at a terminal 102 a of capacitor C 4 a voltage that, at time t 1 of FIGS. 3 b and 3 a , exceeds output voltage Vcc of FIG. 1 . That causes diode D 1 to become conductive. After becoming conductive, diode D 1 produces a down-ramping portion ID 1 a of current ID 1 of FIG. 3 c in capacitor C 2 of FIG. 1 . Advantageously, down-ramping portion ID 1 a develops a second portion of voltage Vcc in capacitor C 2 . When diode D 1 conducts, it applies voltage Vcc across winding L 1 to produce a corresponding down-ramping portion IL 1 a in current IL 1 of FIG. 3 b.

Advantageously, the charge or energy stored in snubber capacitor C 4 is not wasted but is used, instead, to produce the second portion of voltage Vcc. Moreover, advantageously, voltage Vcc is produced without a need for an additional winding in transformer T 1 .

In carrying out an additional inventive feature, pair of main current conducting terminals of a regulating switching transistor Q 3 are coupled across inductor L 1 to a terminal 102 a and to reference potential GND, respectively. Voltage Vcc is coupled via a resistor R 3 to a cathode terminal 110 of a zener diode D 3 to produce a reference, base voltage VB of a voltage comparator transistor Q 2 . The other terminal of zener diode D 3 is coupled to primary side reference potential GND. An emitter terminal of transistor Q 2 is coupled to capacitor C 2 where voltage Vcc is developed. The collector of transistor Q 2 is coupled both to a gate terminal of transistor Q 3 and to a load resistor R 4 .

When voltage Vcc becomes excessive, a difference between voltage Vcc and a Zener voltage developed at terminal 110 exceeds a threshold forward voltage between the base and emitter of transistor Q 2 . Consequently, transistor Q 2 becomes conductive and causes transistor Q 3 to turn on. In this way, transistor Q 2 selectively disables or significantly reduces charging current ID 1 . Also, current IL 1 inductor L 1 is shunted via transistor Q 3 . The result is that voltage Vcc is, advantageously, regulated. An alternative embodiment for the voltage-regulation can be obtained by using a shunt regulator diode D 4 coupled in parallel with capacitor C 2 via a conductor shown in a broken line.