Power supply module

1. Technical Field

The present disclosure relates to power supplies and, particularly, to a power supply module with overvoltage protection.

2. Description of Related Art

Usually, a power supply module powering a load has an overvoltage protection circuit to protect the load when an output voltage of the power supply module exceeds a predetermined output voltage. The overvoltage protection circuit samples the output voltage of the power supply, compares the sampled output voltage with the predetermined output voltage, and prevents the power supply module from powering the load when the sampled output voltage is larger than the predetermined output voltage. Once the output voltage of the power supply is cut off, the sampled output voltage becomes smaller than the predetermined output voltage. The overvoltage protection circuit allows the power supply to power the load again. Since the power supply is not cut off until overvoltage occurs, the load will suffer overvoltage from time to time, and the service life of the load will be affected.

Therefore, what is needed is to provide a power supply module which can address the problem described above.

Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.

FIG. 1 is a functional block diagram of a power supply module, according to an exemplary embodiment, including an overvoltage protection unit.

FIG. 2 is a functional block diagram of the power supply module of FIG. 1 , wherein a detailed block diagram of the overvoltage protection unit is illustrated.

FIG. 3 is a partial circuit diagram of the power supply module of FIG. 1 , wherein a detailed circuit diagram of the overvoltage protection unit is illustrated.

Referring to FIG. 1 , a power supply module 200 receives electric power from an external power source 100 , such as a mains power system, and supplies direct current (DC) to a load 300 . The power supply module 200 includes a rectifying and filtering unit 210 , a pulse width modulation (PWM) unit 220 , a voltage transforming unit 230 , a sampling and comparing unit 240 , and an overvoltage protection unit 250 .

The rectifying and filtering unit 210 is configured for rectifying alternating current (AC) voltage from the external power source 100 into a primary DC voltage and filtering the primary DC voltage. The rectifying and filtering unit 210 includes a bridge rectifier and a low-pass filter circuit.

The voltage transforming unit 230 is configured for receiving the filtered primary DC voltage, and generating a DC voltage when the voltage transforming unit 230 is driven by the PWM unit 220 . The DC voltage is supplied to the load 300 . In this embodiment, the voltage transforming unit 230 is a transformer (not shown). The voltage transforming unit 230 includes a primary coil and a secondary coil. The primary coil inducts electromotive forces according to the variable current through the secondary coil, and generates the DC voltage accordingly.

The sampling and comparing unit 240 is configured for sampling the DC voltage from the voltage transforming unit 230 , and comparing the sampled DC voltage with a predetermined DC voltage. The predetermined DC voltage is stored in the sampling and comparing unit 240 in advance, and can be changed by users. The sampling and comparing unit 240 is further configured for generating an overvoltage signal when the sampled DC voltage exceeds the predetermined DC voltage, and generating a voltage okay signal when the sampled DC voltage falls below the predetermined DC voltage. In this embodiment, the overvoltage signal is a high level signal, and the voltage okay signal is a low level signal.

The PWM unit 220 is powered by the filtered primary DC voltage, and configured for generating pulses to turn on the voltage transforming unit 230 . The PWM unit 220 includes a feedback port 221 to receive a first control signal and a second control signal. When the feedback port 221 receives the first control signal, the PWM unit 220 is disabled, when the feedback port 221 receives the second control signal, the PWM unit 220 is enabled.

The overvoltage protection unit 250 is configured for receiving the overvoltage signal, and is self-locked to keep generating the first control signal until the power supply module 200 is reset. The overvoltage protection unit 250 is further configured for receiving the voltage okay signal, and generating a second control signal accordingly. In this embodiment, the first control signal is a low level signal, and the second control signal is a high level signal.

Further referring to FIG. 2 , the overvoltage protection unit 250 includes an overvoltage protection circuit 251 , an auxiliary circuit 253 , and a PWM controller 254 . The auxiliary circuit 253 is configured to supply power to the PWM controller 254 . The overvoltage protection circuit 251 is configured for receiving the overvoltage signal, and generating a first driving signal. The PWM controller 254 is powered by the auxiliary circuit 253 . The PWM controller 254 is configured for receiving the first driving signal, and generating the first control signal and a locking signal accordingly (see below). The overvoltage protection circuit 251 is further configured for receiving the locking signal, and continuing output of the first driving signal until the power supply module 200 is reset. Meanwhile, the PWM unit 220 remains off. The power supply module 200 should be reset to resume functioning.

The overvoltage protection circuit 251 is further configured for receiving the voltage okay signal, and generating a second driving signal accordingly. The PWM controller 254 is further configured for receiving the second driving signal, and generating the second control signal accordingly.

Further referring to FIG. 3 , in this embodiment, the overvoltage protection circuit 251 includes a first transistor Q 1 , a first resistor R 1 , and a first capacitor C 1 . The first transistor Q 1 is a NPN type bipolar junction transistor. The PWM controller 254 includes a second transistor Q 2 , a second resistor R 2 , and a second capacitor C 2 . The second transistor Q 2 is a PNP type bipolar junction transistor. The auxiliary circuit 253 includes a power source V CC and a third resistor R 3 .

An emitter of the first transistor Q 1 is electrically grounded. A base of the first transistor Q 1 is electrically connected to the sampling and comparing unit 240 for receiving the first/voltage okay signal. A collector of the first transistor Q 1 is electrically connected to the base of the second transistor Q 2 . A collector of the second transistor Q 2 is electrically connected to the base of the first transistor Q 1 . An emitter of the second transistor Q 2 is electrically connected to the power source V CC via the third resistor R 3 . An anode of the power source V CC is electrically connected to the third resistor R 3 , a cathode of the power source V CC is electrically grounded. One terminal of the first resistor R 1 is electrically connected to the base of the first transistor Q 1 , the other terminal of the first resistor R 1 is electrically grounded. One terminal of the first capacitor C 1 is electrically connected to the base of the first transistor Q 1 , the other terminal of the first capacitor C 1 is electrically grounded. The second resistor R 2 is electrically connected between the emitter and the base of the second transistor Q 2 . The second capacitor C 2 is also electrically connected between the emitter and the base of the second transistor Q 2 . The emitter of the second transistor Q 2 is electrically connected to the feedback port 221 of the PWM unit 220 .

The third resistor R 3 is configured for controlling current. The first resistor R 1 and the first capacitor C 1 are configured for dividing and filtering the output of the collector of the second transistor Q 2 . The second resistor R 2 and the second capacitor C 2 are configured for dividing and filtering the output of the auxiliary circuit 253 . The value of the second resistor R 2 is smaller than that of the third resistor R 3 .

When the sampled DC voltage falls below the predetermined DC voltage, the sampling and comparing unit 240 generates the voltage okay signal (a low level signal). The base of the first transistor Q 1 receives the voltage okay signal. The first transistor Q 1 is turned off. The second transistor Q 2 is turned off. The power source V CC provides a high level signal to the feedback port 221 of the PWM unit 220 via the third resistor R 3 . Thus, the PWM unit 220 is able to generate pulses for the voltage transforming unit 230 according to the high level signal.

When the sampled DC voltage exceeds the predetermined DC voltage, the sampling and comparing unit 240 generates the overvoltage signal (a high level signal). The base of the first transistor Q 1 receives the overvoltage signal. The first transistor Q 1 turns on, and the collector voltage of the first transistor Q 1 (the base of the second transistor Q 2 ) receives a low level signal. The second transistor Q 2 turns on. As the value of the second resistor R 2 is smaller than that of the third resistor R 3 , the emitter of the second transistor Q 2 receives a low level signal. Thus, the feedback port 221 of the PWM unit 220 receives the low level signal from the emitter of the second transistor Q 2 . The PWM unit 220 is disabled to generate pulses for the voltage transforming unit 230 according to the low level signal. Because of the value of the resistance of the first resistor R 1 , the voltage at the collector of the second transistor Q 2 is above zero, and the first transistor Q 1 is on. The emitter of the second transistor Q 2 output the low level signal to the feedback port 221 of the PWM unit 220 , and the power supply module 200 should be reset to work again.

As described, when the emitter of the second transistor Q 2 output the low level signal to the feedback port 221 of the PWM unit 220 , the PWM unit 220 is locked in a low level state and is disabled, thus cannot generate pulses for the voltage transforming unit 230 . The voltage transforming unit 230 cannot be driven to generate the DC voltage. Thus, the load 300 cannot suffer from overvoltage from time to time, and the service life of the load 300 will be improved.

It is to be understood, however, that even though numerous has been described with reference to particular embodiments, but the present disclosure is not limited to the particular embodiments described and exemplified, and the embodiments are capable of considerable variation and modification without departure from the scope of the appended claims.