Dual-Switches flyback power converter with self-excited supply to power the high-side driver

The present application claims the benefit of U.S. provisional application entitled “Dual-Switches Flyback Power Converter with Self-Excited Supply to power the High-Side Driver”, Ser. No. 61/210,112, filed Mar. 12, 2009.

1. Field of the Invention

The invention relates to a flyback power converter, and more particularly to a dual switches flyback power converter to power a high-side driver.

2. Description of the Related Art

The dual switches flyback power converter is a high efficiency power converter. The leakage inductance's energy of the transformer can be retrieved to the power rail of the power converter. A prior art has been disclosed recently, it is “Highly efficient switching power converter using a charge pump to power the drive circuit” by Yang, U.S. Pat. No. 7,460,380. However, the drawback of this prior art is a limited maximum duty cycle. The charge pump is unable to power the high-side drive circuit when the duty cycle near to the 100%. The object of the present invention is to provide an approach to solve this problem.

An exemplary embodiment of a flyback power converter comprises a transformer for power transfer, a high-side transistor, a low-side transistor, two diodes, a control circuit, and a high-side drive circuit. The high-side transistor and the low-side transistor are coupled to switch the transformer. The two diodes are coupled to said transformer to circulate energy of leakage inductance of the transformer to an input power rail of the power converter. The control circuit generates a switching signal coupled to control the high-side transistor and the low-side transistor. The high-side drive circuit is coupled to receive the switching signal for driving the high-side transistor. The transformer has an auxiliary winding generating a floating power to provide power supply for said high-side drive circuit.

A detailed description is given in the following embodiments with reference to the accompanying drawings.

The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

FIG. 1 shows an exemplary embodiment of a dual switches flyback power converter;

FIG. 2 shows an exemplary embodiment of the high-side drive circuit in FIG. 1 ;

FIG. 3 shows key waveforms of the signals in FIGS. 1 and 2 ;

FIG. 4 shows an exemplary embodiment of the low-side drive circuit in FIG. 1 ; and

FIG. 5 shows waveforms of the power supply V B , the switching signal S A and the low-side drive signal S L in FIG. 1 .

The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

FIG. 1 is a dual switches flyback power converter in accordance with the present invention. A transformer 30 is used for power transfer. The transformer 30 has a primary winding N P and a secondary winding N S . A high-side transistor 10 and a low-side transistor 20 are coupled to switch the transformer 30 . A diode 25 is connected from one terminal of the primary winding N P of the transformer 30 to an input power rail V IN of the power converter. Another diode 15 is connected to the other terminal of the primary winding N P of the transformer 30 . The diodes 15 and 25 are coupled to circulate the energy of the leakage inductance of the transformer 30 to the input power rail V IN when the transistors 10 and 20 are turned off. A rectifier 40 is connected to secondary winding N S of the transformer 30 for generating an output V O on a capacitor 45 . A control circuit 50 generates a switching signal S A coupled to control the transistors 10 and 20 . A high-side drive circuit 100 is coupled to receive the switching signal S A for driving the high-side transistor 10 . A low-side drive circuit 300 receives the switching signal S A for driving the low-side transistor 20 . The low-side drive circuit 300 will turn on the low-side transistor 20 before a power supply V B of the low-side drive circuit 300 reaches an operating threshold. The high-side transistor 10 and the low-side transistor 20 are turned on/off simultaneously after the power supply V B is higher than the operating threshold. The high-side drive circuit 100 is powered by the power supply V B and a floating power V F -V N . The floating power V F -V N is connected to the high-side drive circuit 100 and the high-side transistor 10 . The transformer 30 has an auxiliary winding N A generating the floating power V F -V N . A floating capacitor 75 is used for generating the floating power V F -V N . A floating diode 70 is coupled from the auxiliary winding N A of the transformer 30 to the floating capacitor 75 for rectifying. Furthermore, a bootstrap diode 60 is coupled from the power supply V B to the floating capacitor 75 for charging the floating capacitor 75 during a power on period.

FIG. 2 is a preferred embodiment of the high-side drive circuit 100 . The high-side drive circuit 100 is a differential-mode level-shift circuit. A pulse generation circuit 200 generates a pulse-on signal X P and a pulse-off signal X N in response to the rising edge and the falling edge of the switching signal S A respectively. Transistors 110 and 120 are coupled to receive the pulse-on signal X P and the pulse-off signal X N respectively. A resistor 150 is coupled between the voltage supply V F and the transistor 110 , and another resistor 160 is coupled between the voltage supply V F and the transistor 120 . The pulse-on signal X P and the pulse-off signal X N are utilized to switch the transistors 110 and 120 for generating a level-shift-on signal W P and a level-shift-off signal W N , respectively. A comparison circuit 170 receives the level-shift-on signal W P and the level-shift-off signal W N for generating a set signal S S and a reset signal S R which are coupled to a flip-flop 180 . The flip-flop 180 generates a high-side drive signal S H for driving the high-side transistor 10 . The comparison circuit 170 and the flip-flop 180 are powered by the floating power V F -V N .

FIG. 3 shows key waveforms of the signals. Referring to FIG. 3 , wherein the pulse-on signal X P and a pulse-off signal X N is generated in response to the rising edge and the falling edge of the switching signal S A respectively. The pulse width of the pulse-on signal X P and the pulse-off signal X N is shorter than 500 nsec. In response to the switching signal S A , the high-side drive signal S H and a low-side drive signal S L are switched on/off simultaneously.

FIG. 4 is a reference design of the low-side drive circuit 300 . Zener diodes 310 and 320 are coupled in series between the power supply V B and a reference ground. The zener diodes 310 and 320 provide respective zener break-down voltages to form an operating threshold V Z1 +V Z2 . The zener diode 310 is coupled between a drain and a source of a transistor 352 . The source of the transistor 352 is further coupled to the voltage supply V B . A resistor 327 is coupled between the voltage supply V B and a gate of the transistor 352 . The zener diode 320 is coupled between the drain of the transistor 352 and a gate of the transistor 351 . A drain of the transistor 351 is coupled to the gate of the transistor 352 , and a source thereof is coupled to the reference ground. A resistor 325 is coupled between the gate of the transistor 351 and the reference ground. An input terminal of an inverter 360 is coupled to the gate of the transistor 352 and the drain of the transistor 351 , and an output terminal thereof is coupled to a first input terminal of an NAND gate 380 . An input terminal of another inverter 370 is coupled to receive the switching signal S A , and an output terminal thereof is coupled to a second input terminal of the NAND gate 380 . Also referring to FIG. 5 , when the power supply V B is lower than the operating threshold V Z1 +V Z2 , the inverter 360 will output a logic-low signal to enable the low-side drive signal S L via the NAND gate 380 . The low-side drive signal S L will follow the switching signal S A via the inverter 370 after the power supply V B higher than the operating threshold V Z1 +V Z2 . Once the power supply V B is higher than the operating threshold V Z1 +V Z2 , the transistors 351 and 352 will be turned on and the operating threshold will be reduced to V Z2 .

FIG. 5 shows the waveform of the power supply V B , the switching signal S A and the low-side drive signal S L . Referring to FIG. 5 , when the power supply V B is lower than the operating threshold V Z1 +V Z2 , the low-side drive signal S L is enabled. After the power supply V B higher than the operating threshold V Z1 +V Z2 , the low-side drive signal S L follows the switching signal S A .

While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.