Frame rate adjuster and method thereof

1. Field of the Invention

The present invention is related to a frame rate adjuster, more particularly, to a frame rate adjuster which adjusts the frame rate of a display device according to the brightness of a frame.

2. Description of the Prior Art

When a display device displays frames, the frames are displayed according to the frame rate R F . For instances, when the frame rate R F is 60 Hertz (Hz), the display device displays 60 frames in 1 second.

According to the prior art, the frame rate of the display device is a constant value. The relation between the frame rate of the display device and the power consumption is that the higher the frame rate R F , the higher the power consumption of the display device, and vice versa. However, if the display device employs a lower frame rate R F , display flickering occurs and is easily detected by human eyes when the brightness of the displayed frames is low.

Therefore, when the conventional display device employs a higher frame rate, the power consumption of the display device is increased; when the conventional display device employs a lower frame rate, the display device is prone to display flickering. Consequently, the power consumption of the display device cannot be reduced along with preventing the display flickering issue at the same time, causing great inconvenience.

The present invention discloses a frame rate adjuster, for adjusting a frame rate of a display device according to brightness of a frame. The frame rate adjuster comprises a frame counting circuit, a brightness counting circuit, a brightness determining circuit, and a frame rate selecting circuit. The frame counting circuit is for receiving the frame and calculating a number of received grey level data of the frame to determine if the frame has been completely received, for generating a frame triggering signal; wherein when the frame counting circuit determines the frame has been completely received, the frame counting circuit generates the frame triggering signal representing enable/reset. The brightness counting circuit is for receiving the frame and calculating brightness of the grey level data of the frame, for accordingly generating a plurality of brightness counting numbers; wherein when the frame triggering signal represents enable/reset, the brightness counting circuit resets the plurality of the brightness counting numbers. The brightness determining circuit is for outputting a brightness determining signal according to the frame triggering signal and the plurality of the brightness counting numbers; wherein when the frame triggering signal represents enable/reset, the brightness determining circuit outputs the brightness determining signal according to the plurality of the brightness counting numbers. The frame rate selecting circuit comprises a control end, for receiving the brightness determining signal, an enable end, for receiving the frame triggering signal and an output end, for generating an output frame rate; wherein when the frame triggering signal represents enable/reset, the frame rate selecting circuit selects one of a plurality of reference frame rates to be the output frame rate according to the brightness determining signal, and the output frame rate is utilized as the frame rate of the display device.

The present invention further discloses a frame rate adjuster, for adjusting a frame rate of a display device according to brightness of a predetermined number of frames. The frame rate adjuster comprises a frame counting circuit, an interval counting circuit, a brightness counting circuit, a brightness determining circuit, a frame rate selecting circuit and a frame rate calculating circuit. The frame counting circuit is for receiving the predetermined number of the frames and calculating a number of received grey level data of the predetermined number of the frames, to determine if an frame of the predetermined number of the frames has been completely received, for generating a frame triggering signal; wherein when the frame counting circuit determines the frame of the predetermined number of the frames has been completely received, the frame counting circuit generates the frame triggering signal representing enable/reset. The interval counting circuit is for counting a number of times the frame triggering signal represents enable/reset, for determining if the predetermined number of the frames have been completely transmitted, and accordingly generating an interval triggering signal; wherein when the number of times the frame triggering signal represents enable/reset equals the predetermined number, the interval counting circuit generates the interval triggering signal representing enable/reset. The brightness counting circuit is for receiving the predetermined number of the frames, and calculating brightness of the grey level data of the predetermined number of the frames, for generating a plurality of brightness counting numbers; wherein when the frame triggering signal represents enable/reset, the brightness counting circuit resets the plurality of the brightness counting numbers. The brightness determining circuit is for outputting a brightness determining signal according to the frame triggering signal and the plurality of the brightness counting numbers; wherein when the frame triggering signal represents enable/reset, the brightness determining circuit outputs the brightness determining signal according to the plurality of the brightness counting numbers. The frame rate selecting circuit comprises a control end, for receiving the brightness determining signal; an enable end, for receiving the frame triggering signal; and an output end, for generating an output frame rate; wherein when the frame triggering signal represents enable/reset, the frame rate selecting circuit selects one of plurality of reference frame rates to be the output frame rate according to the brightness determining signal. The frame rate calculating circuit is for receiving and storing the output frame rate outputted from the frame rate selecting circuit, and generating a calculated output frame rate as the frame rate of the display device, according to the stored output frame rate when the interval triggering signal representing enable/reset is received.

The present invention further discloses a method for adjusting a frame rate of a display device according to brightness of a frame. The method comprises calculating the brightness of grey level data of the frame for obtaining a plurality of brightness counting numbers; generating a brightness determining signal according to the plurality of the brightness counting numbers; and selecting one reference frame rate from a plurality of reference frame rates to be an output frame rate, according the brightness determining signal, and utilizing the output frame rate for adjusting the frame rate of the display device.

The present invention further discloses a method for adjusting a frame rate of a display device according to brightness of a predetermined number of frames, the method comprises calculating the brightness of grey level data of the predetermined number of the frames, for obtaining the predetermined number of sets of brightness counting numbers; wherein each set of the brightness counting numbers of the predetermined number of sets of the brightness counting numbers comprises a plurality of brightness counting numbers; wherein a M th set of the brightness counting number of the predetermined number of sets of the brightness counting numbers is obtained by calculating a M th frame from the predetermined number of the frames; generating the predetermined number of the brightness determining signals according to the predetermined number of the sets of the brightness counting numbers; generating the predetermined number of output frame rates according to the predetermined number of the brightness determining signals and a plurality of reference frame rates; and generating a calculated output frame rate according to the predetermined number of the output frame rates, for adjusting the frame rate of the display device; wherein M represents a positive integer.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

FIG. 1 is a diagram illustrating the frame adjuster according to the first embodiment of the present invention.

FIG. 2 is a diagram illustrating the frame rate adjuster according to the second embodiment of the present invention.

FIG. 3 is a flowchart illustrating the method of adjusting the frame rate according to the third embodiment of the present invention.

FIG. 4 is a flowchart illustrating the method of adjusting the frame rate according to the fourth embodiment of the present invention.

Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ” Also, the term “electrically connect” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

Therefore, for solving the issue that the power consumption cannot be effectively reduced for the conventional display device, the present invention discloses a frame rate adjuster for adjusting the frame rate of the display device according to the brightness of the frames. When the brightness of the frame is determined to be high, the frame rate of the display device is adjusted to be lower for reducing the power consumption; when the brightness of the frame is determined to be low, the frame rate of the display device is adjusted to be higher so as to prevent display flickering.

Please refer to FIG. 1 . FIG. 1 is a diagram illustrating the frame adjuster 100 according to the first embodiment of the present invention. The frame rate adjuster 100 is utilized to adjust the frame rate of the display device which consists of N 2 pixels, according to the brightness of an original image lo, wherein the resolution of the original image I O is N 2 , indicating the original image lo consists of the grey level data of N 2 pixels. The frame rate adjuster 100 comprises a frame counting circuit 110 , a brightness counting circuit 120 , a brightness determining circuit 130 , and a frame rate selecting circuit 140 .

The grey level signal S G is the grey level data of the original image I O sequentially received by the frame rate adjuster 100 . The frame rate counting circuit 110 is utilized to determine wither the grey level data of an original image has been completely transmitted from the grey level signal S G , according to the number of pixels of the transmitted grey level data of the grey level signal S G , for generating the frame triggering signal TG F . The frame counting circuit 110 comprises a counter 111 and a comparator CMP 1 . The counter 111 receives the grey level signal S G , for counting the number of pixels of the transmitted grey level data and accordingly obtaining a counted number N P . Every time the counter 111 receives the grey level data of one pixel, the counted number N P is incremented by 1. For instances, assuming the counted number N P is X, when the counter 111 receives the grey level data of one pixel, the counted number N P becomes (X+1). The comparator CMP 1 compares the counted number N P and the number N 2 of pixels of the display device, for outputting the frame triggering signal TG F . For instances, when the counted number N P equals the number N 2 of pixels of the display device, the comparator CMP 1 outputs the frame triggering signal TG F representing “enable/reset”; indicating the grey level data of an original image has been completely transmitted from the grey level signal S G . When the reset end R of the counter 111 receives the frame triggering signal TG F representing “enable/reset”, the counter 111 resets the counted number N P to a predetermined value (i.e. reset to zero). Therefore, every time when the frame counting circuit 110 determines the grey level of an original image has been completely transmitted from the grey level signal S G , the frame counting circuit 110 generates the frame triggering signal TG F representing “enable/reset”.

The brightness counting circuit 120 is utilized to count the number of pixels of the received grey level signal S G located in each of the brightness intervals R GT — 1 ˜R GT — N3 in the brightness range R GT , as well as outputting the brightness counting number N GT — 1 ˜N GT — N3 accordingly calculated in each of the brightness intervals R GT — 1 ˜R GT — N3 . The brightness counting circuit 120 comprises N 3 brightness interval counting units GC 1 ˜GC N3 , wherein the brightness interval counting unit GC K is utilized to count the number N GT — K of pixels of the grey level signal S G that are located in the brightness interval R GT — K , as well as outputting the brightness counting number N GT — K (i.e. K may be 1˜N 3 ) accordingly. When the grey level signal S G is located in the brightness interval R GT — K , the brightness counting unit GC K increments the brightness counting number N GT — K by 1. For instances, assuming the brightness range R GT represents the range of the grey levels 0˜255 and assuming N 3 equals 4, the brightness interval R GT — 1 represents the range of the grey levels 0˜63; the brightness interval R GT — 2 represents the range of the grey levels 64˜127; the brightness interval R GT — 3 represents the range of the grey levels 128˜191; the brightness interval R GT — 4 represents the range of the grey levels 192˜255. Furthermore, assuming the brightness counting numbers N GT — 1 ˜N GT — 4 of the brightness interval counters GC 1 ˜GC 4 are [X 1 ,X 2 ,X 3 ,X 4 ], when the brightness counting circuit 120 receives the grey level signal S G representing the grey level “30”, the brightness counting numbers N GT — 1 ˜N GT — 4 become [(X 1 +1),X 2 ,X 3 ,X 4 ]; when the brightness counting circuit 120 receives the grey level signal S G representing the grey level “70”, the brightness counting numbers N GT — 1 ˜N GT — 4 become [X 1 +1,(X 2 +1),X 3 ,X 4 ]; when the brightness counting circuit 120 receives the grey level signal S G representing the grey level “150”, the brightness counting numbers N GT — 1 ˜N GT — 4 become [X 1 ,X 2 ,(X 3 +1),X 4 ]; when the brightness counting circuit 120 receives the grey level signal S G representing the grey level “220”, the brightness counting numbers N GT — 1 ˜N GT — 4 become [X 1 ,X 2 ,X 3 ,(X 4 +1)]. In addition, when each reset end of the brightness interval counting units GC 1 ˜GC N6 receives the frame triggering signal TG F (i.e. indicating the grey level data of an original image has been completely transmitted from the grey level signal S G ), each of the brightness interval counting units GC 1 ˜GC N3 resets the corresponding brightness counting numbers N GT — 1 ˜N GT — N3 respectively to a predetermined value (i.e. reset to zero).

The brightness determining circuit 130 outputs the brightness determining signal S I according to the frame triggering signal TG F and the brightness counting numbers N GT — 1 ˜N GT — N3 . When the enable end EN of the brightness determining circuit 130 receives the frame triggering signal TG F representing “enable/reset” (i.e. indicating the grey level data of an original image has been completely transmitted from the grey level signal S G ), the brightness determining circuit 130 outputs the brightness determining signal S I according to the brightness counting numbers N GT — 1 ˜N GT — N3 . Meanwhile, if the brightness counting number N GT — K outputted by the brightness counting unit GC k is the maximum value (i.e. the value of the brightness counting number N GTK is larger relative to the other brightness counting numbers) among the brightness counting numbers N GT — 1 ˜N GT — N3 , it indicates that the brightness of the original image is mostly distributed in the brightness interval R GT — K . As a result, the brightness determining signal Si outputted by the brightness determining circuit 130 represents “K”. Therefore, by comparing the brightness counting number of each brightness interval, the brightness determining circuit 130 is able to obtain the brightness distribution of the original image and output the brightness determining signal S I accordingly. When the brightness determining signal S I indicates that the brightness of the original image I O is distributed mostly in the high brightness interval, the original image I O is determined to be a high brightness image; when the brightness determining signal S I indicates that the brightness of the original image I O is distributed mostly in the low brightness interval, the original image I O is determined to be a low brightness image.

The frame rate selecting circuit 140 comprises a control end C, an enable end EN, an output end O, and a frame rate storage device 141 . The frame rate storage device 141 is utilized to store the reference frame rates R- F1 ˜R F3 . The control end C of the frame rate selecting circuit 140 is utilized to receive the brightness determining signal S I . When the enable end EN of the frame rate selecting circuit 140 receives the frame triggering signal TG F representing “enable/reset”, according to the brightness determining signal S I , the frame rate selecting circuit 140 selects one of the reference frame rates R F1 ˜R F3 to be the output frame rate R FO , which is utilized to be the frame rate of the display device. More specifically, when the frame rate selecting circuit 140 receives the brightness determining signal S I representing high brightness, the frame rate selecting circuit 140 selects a relatively lower frame rate from the reference frame rates R F1 ˜F N3 as the output frame rate R FO for lowering the frame rate of the display device. On the other hand, when the frame rate selecting circuit 140 receives the brightness determining signal S I representing low brightness, the frame rate selecting circuit 140 selects a relatively higher frame rate from the reference frame rates R F1 ˜F N3 as the output frame rate R FO for increasing the frame rate of the display device. Therefore, when brightness of the original image I O is relatively high, the frame rate adjuster 100 lowers the frame rate of the display device to reduce the power consumption of the display device; when the brightness of the original image I O is relatively low, the frame rate adjuster 100 increases the frame rate of the display device to prevent the occurrence of display flickering.

Please refer to FIG. 2 . FIG. 2 is a diagram illustrating the frame rate adjuster 200 according to the second embodiment of the present invention. To prevent the frame rate of the display device from being adjusted too frequently, the frame rate adjuster 200 adjusts the frame rate every interval T. The frame rate adjuster 200 adjusts the frame rate of a display device consisting of N 2 pixels according to the brightness of N 1 original images I O1 ˜I ON1 in the interval T 1 , wherein the duration of the interval T 1 equals the duration of the interval T. The frame rate adjuster 200 comprises a frame counting circuit 210 , a brightness counting circuit 220 , a brightness determining circuit 230 , a frame rate selecting circuit 240 , a frame rate calculating circuit 250 and an interval counting circuit 260 , wherein the structure and the operation principle of the frame counting circuit 210 , the brightness counting circuit 220 , the brightness determining circuit 230 and the frame rate selecting circuit 240 are similar to that of the frame counting circuit 110 , the brightness counting circuit 120 , the brightness determining circuit 130 and the frame rate selecting circuit 240 ; the relative description is therefore omitted hereafter.

The interval counting circuit 260 is utilized to count the frame triggering signal TG F for determining wither the grey level data of the N 1 original images I O1 ˜I ON1 has been completely transmitted from the grey level signal S G , for generating the interval triggering signal TG T . The interval counting circuit 260 comprises a counter 261 and a comparator CMP 2 . The counter 261 counts the number N F of the transmitted original images according to the frame triggering signal TG F . When the counter 261 receives the frame triggering signal TG F representing “enable/reset”, it indicates the grey level of an original image has been completely transmitted and the counter 261 increments the number N F of the transmitted original images by 1 accordingly. For instances, assuming the number N F of the transmitted original images is X and when the counter 261 receives the frame triggering signal TG F representing “enable/reset”, the number N F of the transmitted original images is incremented by 1 to become (X+1). The comparator CMP 2 then compares the number N F of the transmitted original images and the number N 1 of the original images, for outputting the interval triggering signal TG T . When the number N F of the transmitted original images equals the number N 1 of the original images, the comparator CMP 2 outputs the interval triggering signal TG T representing “enable/reset”, indicating the grey level data corresponding to the number N 1 of the original images has been completely transmitted from the grey level signal S G . When the reset end R of the counter 261 receives the interval triggering signal TG T representing “enable/reset”, the counter 261 resets the number N F of the transmitted original images to a predetermined value (i.e. reset to zero). Therefore, whenever the interval counting circuit 260 determines the grey level data of the number N 1 of the original images has been completely transmitted from the grey level signal S G , the interval counting circuit 260 generates the interval triggering signal TG T representing “enable/reset”.

The frame rate calculating circuit 250 is utilized to calculate the output frame rate outputted by the frame rate adjuster 200 after the interval T 1 . The frame rate calculating circuit 250 further comprises a frame rate calculating storage device 251 . When the frame rate calculating circuit 250 receives the output frame rate R FO , the frame rate calculating storage device 251 stores the received output frame rate R FO . When the frame rate calculating circuit 250 receives the interval triggering signal TG T representing “enable/reset” corresponding to the interval T 1 , it indicates that the frame rate calculating storage device 251 has stored the output frame rates R FO1 ˜R FON1 of N 1 original images I O1 ˜I ON1 corresponding to the interval T 1 . Concurrently, the frame rate calculating circuit 250 generates a calculated output frame rate R FOC according to the output frame rates R FO1 ˜R FON1 corresponding to the original images I O1 ˜I ON1 , for adjusting the frame rate of the display device. For instances, assuming N 1 is 5 and the output frame rates R RO1 ˜R RO5 stored in the frame rate calculating storage device 251 are [30 Hz, 30 Hz, 30 Hz, 50 Hz, 60 Hz]. Subsequently, if the frame rate calculating circuit 250 utilizes the median method, the frame rate calculating circuit 250 outputs the calculated output frame rate R FOC representing “30 Hz” (i.e. the median value of the output frame rates). If the frame rate calculating circuit 250 utilizes the averaging method, the frame rate calculating circuit 250 outputs the calculated output frame rate R FOC representing “40 Hz” (i.e. the average of the output frame rates). As a result, when the brightness of the original images I O1 ˜I ON1 are high, the output frame rates R FO1 ˜R FON1 are deviated towards a relatively low frame rate. Therefore the frame calculating circuit 250 generates a lower calculated output frame rate R FOC to lower the frame rate of the display device, for reducing the power consumption of the display device. when the brightness of the original images I O1 ˜I ON1 are low, the output frame rates R FO1 ˜R FON1 are deviated towards a relatively high frame rate. Therefore the frame calculating circuit 250 generates a higher calculated output frame rate R FOC to increase the frame rate of the display device, for preventing the display flickering of the display device. In addition, after the calculated output frame rate R FOC is generated by the frame rate calculating circuit 250 , the frame rate calculating circuit 250 resets (i.e. clear) the output frame rates R FO1 ˜R FON1 stored in the frame rate calculating storage device 251 , so when the frame rate calculating 250 generates the calculated output frame rate R FOC corresponding to the subsequent interval T 2 , the frame rate calculating 250 is not affected by the output frame rates R FO1 ˜R FON1 of the original images I O1 ˜I ON1 corresponding to the interval T 1 .

Please refer to FIG. 3 . FIG. 3 is a flowchart illustrating the method 300 of adjusting the frame rate according to the third embodiment of the present invention. The method 300 of the present invention obtains the output frame rate for adjusting the frame rate of the display device according to the brightness of the original image. The steps of the method 300 of the present invention are detailed as below:

Step 301 : calculate the number of pixels of the grey level data of the original image I O located in each of the brightness intervals R GT — 1 ˜R GT — N3 in the brightness range R GT , for obtaining the brightness counting number for each of the brightness intervals R GT — 1 ˜R GT — N3 ;

Step 302 : generate the brightness determining signal S I according to the brightness counting number of each of the brightness intervals R GT — 1 ˜R GT — N3 .

Step 303 : selecting one of the N 3 reference frame rates to be the output frame rate according to the brightness determining signal S I , for adjusting the frame rate of the display device.

In step 301 , for instances, the brightness range R GT represents the range of the grey level 0˜255. Assuming N 3 is 4, the brightness interval R GT — 1 represents the range of the grey level 0˜63; interval R GT — 2 represents the range of the grey level 64˜127; interval R GT — 3 represents the range of the grey level 128˜191; interval R GT — 4 represents the range of the grey level 192˜255.

In Step 302 , the brightness counting number of each of the brightness intervals R GT — 1 ˜R GT — N3 is compared for obtaining a maximum brightness counting number. For instances, if the value of the brightness counting number N GTK is lager than the other brightness counting number, the brightness of the original image I O is mostly distributed in the brightness interval R GT — K . Therefore, the brightness determining signal S I is then “K”, for representing where the brightness distribution of the original image I O1 is mostly located.

In Step 303 , according to the brightness determining signal S I , the core distribution of the brightness of the original image I O1 can be acquired for determining if the brightness of the original image I O1 is high. Therefore, when the brightness of the original image I O1 is high, a lower reference frame rate can be selected accordingly to be the output frame rate R FO to lower the frame rate of the display device, for reducing the power consumption of the display device; when the brightness of the original image I O1 is low, a higher reference frame rate can then be selected accordingly to be the output frame rate R FO to increase the frame rate of the display device, for preventing the display flickering of the display device.

Please refer to FIG. 4 . FIG. 4 is a flowchart illustrating the method 400 of adjusting the frame rate according to the fourth embodiment of the present invention. The method 400 of the present invention is to obtain the calculated output frame rate R FOC according to the brightness of N 1 original images corresponding to an interval T 1 , for adjusting the frame rate of the display device. The steps of the method 400 of the present invention are detailed as below:

Step 401 : calculate the number of pixels of the grey level data of N 1 original images located in each of the brightness intervals R GT — 1 ˜R GT — N3 in the brightness range R GT , according to the grey level data of the N 1 original images corresponding to an interval T 1 ;

Step 402 : generate N 1 brightness determining signals S I1 ˜S IN1 corresponding to the N 1 original images, according to the brightness determining number of the grey level data of N 1 original images located in each of the brightness intervals R GT — 1 ˜R GT — N3 in the brightness range R GT ;

Step 403 : select one of the N 3 reference frame rates to be the output frame rate R FO1 ˜R FON1 , according to the brightness determining signals S I1 ˜S IN1 ;

Step 404 : generate the calculated output frame rate R FOC according to the output frame rate R FO1 ˜F ON1 , for adjusting the frame rate of the display device.

The operation flow and principle of the steps 401 ˜ 403 are similar to those of the steps 301 ˜ 303 ; the relative description is therefore omitted hereafter. In step 404 , for instances, the median method is utilized to obtain the median value of the output frame rates R FON1 ˜R FON1 , for being employed as the calculated output frame rate R FO C; or alternatively, the averaging method is utilized to obtain the average value of the output frame rates R FON1 ˜R FON1 , for being employed as the calculated output frame rate R FOC . As a result, when the brightness of the N 1 original images are relatively higher, the output frame rates R FO1 ˜R FON1 are deviated towards a relative lower frame rate, so a lower calculated output frame rate R FO C is accordingly generated for lowering the frame rate of the display device, to reduce the power consumption of the display device; when the brightness of the N 1 original images are of a relative lower, the output frame rates R FO1 ˜R FON1 are deviated towards a relative higher frame rate, so a higher calculated output frame rate R FOC is accordingly generated for increasing the frame rate of the display device, to prevent the display flickering of the display device.

Furthermore, the above-mentioned display devices can be realized with a Liquid Crystal Display (LCD), a Plasma Display (PDP), or an Organic Light-Emitting Diode (OLED).

In conclusion, the frame rate adjuster of the present invention is able to determine the brightness of the original image according to the grey level data of the original image. The output frame rate is then obtained according to the brightness of the original image, for adjusting the frame rate of the display device. Therefore, when displaying frames of low brightness, the display device can utilize a higher frame rate for preventing display flickering; on the other hand, when displaying frames of high brightness, the display device can utilize a lower frame rate for reducing the power consumption of the display device, providing great convenience.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.