Power source switching circuit

1. Technical Field

The present disclosure relates to a power source switching circuit automatically switching between a main source and an auxiliary source.

2. Description of Related Art

A power supply supplies power to electronic devices such as computers. The power supply includes a main source supplying power during normal operation and an auxiliary source supplying power during standby operation. Both sources may be applied in the electronic device simultaneously to supply power in all operating modes.

What is needed, therefore, is a power source switching circuit automatically switching between a main source and an auxiliary source of a power supply.

FIG. 1 is a schematic diagram of an embodiment of a power source switching circuit.

FIG. 2 is a schematic diagram of a control circuit of FIG. 1 .

FIG. 3 is a circuit diagram of the power source switching circuit of FIG. 1 .

FIG. 4 is a sequence diagram of the power source switching circuit of FIG. 3 .

Referring to FIG. 1 , a power source switching circuit automatically switches between a main source and an auxiliary source of a power supply. The power supply includes a main source terminal supplying the main source during normal operations, and an auxiliary source terminal supplying the auxiliary source during standby operations. The power source switching circuit includes a main source input terminal 100 connected to the main source terminal of the power supply, an auxiliary source input terminal 300 connected to the auxiliary source terminal of the power supply, a first switch 700 , a second switch 900 , a control circuit 200 , and an output terminal 500 connected to the electronic device.

Referring to FIG. 2 , the control circuit 200 can include a power source detection module 205 , a switch control module 207 connected to the power source detection module 205 , a first comparator 201 , a second comparator 203 , a time delay control module 209 connected between the first comparator 201 and the second comparator 203 , a first driving module 206 , and a second driving module 208 . The power source detection module 205 is configured for detecting the voltage of the main source input terminal 100 . The switch control module 207 is configured for controlling the stability of the first switch 700 and the second switch 900 . The time delay control module 209 is configured for controlling the time delay between the first comparator 201 and the second comparator 203 . The first driving module 206 is configured for opening or closing the first switch 700 , and the second driving module 208 is configured for opening or closing the second switch 900 .

Referring to FIG. 3 , in the embodiment, the first switch 700 is a first transistor Q 1 , the second switch 900 is a second transistor Q 2 , and the two transistors Q 1 , Q 2 are the P-channel MOSFETs (metal oxide semiconductor field effect transistors). The control circuit 200 includes a capacitor C 1 , resistors R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , the first comparator 201 , and the second comparator 203 . The power source detection module 205 can be integrated in the first comparator 201 . The resistor R 5 can be as the switch control module 207 for controlling the stability of the two transistors Q 1 , Q 2 . The time delay control module 209 can be integrated in the first comparator 201 and the second comparator 203 . The first driving module 206 and the second driving module 208 are correspondingly integrated in the first comparator 201 and the second comparator 203 . A power terminal of the first comparator 201 is connected to the auxiliary source input terminal 300 . A positive input terminal of the first comparator 201 is connected to the auxiliary source input terminal 300 through the resistor R 3 , and is also connected to ground through the resistor R 2 . A negative input terminal of the first comparator 201 is connected to the main source input terminal 100 , and is also connected to ground through the capacitor C 1 and the resistor R 1 . A ground terminal of the first comparator 201 is connected to ground. An output terminal of the first comparator 201 is connected to the auxiliary source input terminal 300 through a node 202 and the resistor R 4 . A power terminal of the second comparator 203 is connected to the auxiliary source input terminal 300 . A positive input terminal of the second comparator 203 is connected to ground through the resistor R 2 . A negative input terminal of the second comparator 203 is connected to the output terminal of the first comparator 201 . A ground terminal of the second comparator 203 is connected to ground. An output terminal of the second comparator 203 is connected to the auxiliary source input terminal 300 through a node 204 and the resistor R 6 .

A gate of the first transistor Q 1 is connected to the negative input terminal of the second comparator 203 , and is also connected to the positive input terminal of the second comparator 203 through the resistor R 5 . A drain of the first transistor Q 1 is connected to the main source input terminal 100 , and a source of the first transistor Q 1 is connected to the output terminal 500 . A gate of the second transistor Q 2 is connected to the output terminal of the second comparator 203 . A drain of the second transistor Q 2 is connected to the output terminal 500 . A source of the second transistor Q 2 is connecter to the auxiliary source input terminal 300 .

Referring to FIG. 4 , when the electronic device is in standby operation, the power supply is turned off, the main source input terminal 100 inputs a low level signal to the negative input terminal of the first comparator 201 , and the auxiliary source input terminal 300 inputs a high level signal to the positive input terminal of the first comparator 201 . The voltage of the positive input terminal is greater than that of the negative input terminal of the first comparator 201 , thereby outputting a high level signal to the negative input terminal of the second comparator 203 and the gate of the first transistor Q 1 . The node 202 is at high level, the first transistor Q 1 is turned off, and the source thereof outputs a low level signal to the output terminal 500 . Because of the voltage dividing effect of the resistors R 2 and R 3 , the voltage of the positive input terminal is less than that of the negative input terminal of the second comparator 203 , therefore outputting a low level signal to the gate of the second transistor Q 2 . The node 204 is at low level, the second transistor Q 2 is turned on, and the drain thereof outputs a high level signal to the output terminal 500 . Therefore, the voltage of the output terminal 500 is supplied by the auxiliary source input terminal 300 during the standby operation.

When the electronic device is in normal operation, the power supply is turned on, the main source input terminal 100 inputs a high level signal to the negative input terminal of the first comparator 201 , and the auxiliary source input terminal 300 inputs a high level signal to the positive input terminal of the first comparator 201 . Because of the voltage dividing effect of the resistors R 2 and R 3 , the voltage of the positive input terminal is less than that of the negative input terminal of the first comparator 201 , thereby outputting a low level signal to the negative input terminal of the second comparator 203 and the gate of the first transistor Q 1 . The node 202 is at low level, the first transistor Q 1 is turned on, and the source thereof outputs a high level signal to the output terminal 500 . The voltage of the positive input terminal is greater than that of the negative input terminal of the second comparator 203 , thereby outputting a high level signal to the gate of the second transistor Q 2 , the node 204 is at high level, and the second transistor Q 2 is turned off. Therefore, the voltage of the output terminal 500 is supplied by the main source input terminal 100 during normal operation.

It is to be understood, however, that even though numerous characteristics and advantages have been set forth in the foregoing description of preferred embodiments, together with details of the structures and functions of the preferred embodiments, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.