Power supply circuit

1. Technical Field

The present disclosure relates to power supply circuits, and particularly to a power supply circuit for supplying a direct current (DC) current to an electrical device.

2. Description of the Related Art

Generally, an output current of a power supply circuit will increase to meet load demand. However, if the output current becomes too great, a drive unit in the power supply circuit may be destroyed. However, popular power supply circuits cannot ensure the security of the drive unit and the current requirement of a load at the same time.

FIG. 1 is a block diagram of an exemplary embodiment of a power supply circuit.

FIG. 2 is an exemplary embodiment of a circuit diagram of the power supply circuit in FIG. 1 .

Referring to FIG. 1 , an exemplary embodiment of a power supply circuit is used for supplying DC current signals and DC voltage signals to an electrical device 117 . The power supply circuit includes a pulse width modulation (PWM) signal generator 110 , a current adjustment unit 112 , a drive unit 114 , a filtering unit 116 , a feedback unit 118 , and a compensation unit 120 . The PWM signal generator 110 is used for outputting a PWM voltage signal VTT_PWM to the drive unit 114 . The current adjustment unit 112 is used for outputting at least one DC current signal. The drive unit 114 is used for outputting at least one control signal, to control the current adjustment unit 112 to work. The drive unit 114 is further used for outputting a DC current signal and a DC voltage signal V 1 . A working current of the electrical device 117 comes from the DC current signals from the current adjustment unit 112 and the drive unit 114 . The filtering unit 116 is used for filtering noise from the DC voltage signal V 1 to generate a filtered DC voltage signal V 2 , and outputting the filtered DC voltage signal V 2 to the electrical device 117 .

The feedback unit 118 is used for generating a feedback voltage signal VTT_FB based on the DC voltage signal V 1 , and transmitting the feedback voltage signal VTT_FB to the PWM signal generator 110 . The PWM signal generator 110 adjusts the PWM voltage signal VTT_PWM by comparing the feedback voltage signal VTT_FB with a first preset value stored in the PWM signal generator 110 . When the feedback voltage signal VTT_FB is less than the first preset voltage value, the PWM signal generator 110 increases the PWM voltage signal VTT_PWM. Otherwise, when the feedback voltage signal VTT_FB is greater than the first preset voltage value, the PWM signal generator 110 reduces the PWM voltage signal VTT_PWM.

The compensation unit 120 is used for generating a compensation voltage signal VTT_COMP based on the feedback voltage signal VTT_FB, and outputting the compensation voltage signal VTT_COMP to the PWM signal generator 110 . The PWM signal generator 110 adjusts the PWM voltage signal VTT_PWM according to comparing the compensation voltage signal VTT_COMP with a second preset voltage value stored in the PWM signal generator 110 . When the compensation voltage signal VTT_COMP is less than the second preset voltage value, the PWM signal generator 110 increases the PWM voltage signal VTT_PWM. Otherwise, when the compensation voltage signal VTT_COMP is greater than the second preset voltage value, the PWM signal generator 110 reduces the PWM voltage signal VTT_PWM.

The feedback voltage signal VTT_FB is a major factor to adjust the PWM voltage signal VTT_PWM. The compensation unit 120 is only an accessory unit, and can be omitted depending on the embodiment. Additionally, the filter unit 116 is only used for filtering noise from the DC voltage signal V 1 , and can also be omitted depending on the embodiment.

Referring to FIG. 2 , the current adjustment unit 112 includes a first switch circuit 111 and a second switch circuit 113 . The PWM signal generator 110 can be a power management chip having an output pin 1 , and two input pins 2 and 3 . The output pin 1 is used for outputting the PWM voltage signal VTT_PWM. The input pins 2 and 3 are used for receiving the feedback voltage signal VTT_FB and the compensation voltage signal VTT_COMP, respectively.

The drive unit 114 includes a high frequency metal oxide semiconductor field effect transistor (MOSFET) driver, a first resistor R 1 , and a first capacitor C 1 . In one embodiment, the high frequency MOSFET driver is an ISL6612 chip having an UGATE pin, a BOOT pin, a PWM pin, a PHASE pin, a GND 1 pin, a GND 2 pin, a PVCC pin, a VCC pin, and a LGATE pin. The UGATE pin is connected to the first switch circuit 111 . The BOOT pin is connected to a positive terminal of the first capacitor C 1 through the first resistor R 1 . A negative terminal of the first capacitor is C 1 is connected to the PHASE pin. The PHASE pin is used for outputting the DC voltage signal V 1 and a first DC current signal I 1 . The PWM pin is connected the output pin 1 of the power management chip for receiving the PWM voltage signal VTT_PWM. The GND 1 and GND 2 pins are grounded. The PVCC and VCC pins are connected a DC power supply, such as a 12-volt system power supply 12V-SYS. The LGATE pin is connected to the second switch circuit 113 .

The first switch circuit 111 includes a second resistor R 2 , a third resistor R 3 , and a first field effect transistor (FET) Q 1 . The gate of the first FET Q 1 is connected to the UGATE pin and the PHASE pin through the second and third resistors R 2 and R 3 respectively. The drain of the first FET Q 1 is connected to the DC power supply. The source of the first FET Q 1 is connected to the PHASE pin. The second switch circuit 113 includes a fourth resistor R 4 , and a second FET Q 2 . The gate of the second FET Q 2 is connected to the LGATE pin through the fourth resistor R 4 . The source of the second FET Q 2 is grounded. The drain of the second FET Q 2 is connected to the PHASE pin. The types of the first and second FETs Q 1 and Q 2 are AOD452 and AOD472 respectively, wherein the maximum and minimum values of the rated voltage for AOD452 and AOD472 are 25V and −8V respectively.

The filtering unit 116 includes a second capacitor C 2 , a first electrolytic capacitor E 1 , a second electrolytic capacitor E 2 , and a third electrolytic capacitor E 3 . Positive terminals of the second capacitor C 2 , the first electrolytic capacitor E 1 , the second capacitor E 2 , and the third electrolytic capacitor E 3 are connected to the PHASE pin to receive the DC voltage signal V 1 . Negative terminals of the second capacitor C 2 , the first electrolytic capacitor E 1 , the second capacitor E 2 , and the third electrolytic capacitor E 3 are grounded.

The feedback unit 118 includes a third capacitor C 3 , a fifth resistor R 5 , a sixth resistor R 6 , and a seventh resistor R 7 . A negative terminal of the third capacitor C 3 is connected to the PHASE pin to receive the DC voltage signal V 1 . A positive terminal of the third capacitor C 3 is connected to a first terminal of the fifth resistor R 5 . A second terminal of the fifth resistor R 5 is grounded through the seventh resistor R 7 , and outputs the feedback voltage signal VTT_FB. The sixth resistor R 6 is connected between a negative terminal of the fifth capacitor C 5 and the second terminal of the fifth resistor R 5 .

The compensation unit 120 includes an eighth resistor R 8 , a fourth capacitor C 4 , and a fifth capacitor C 5 . Negative terminals of the fourth and fifth capacitors C 4 , C 5 are connected to the second terminal of the fifth resistor R 5 to receive the feedback voltage signal VTT_FB. A positive terminal of the fourth capacitor C 4 is connected to a first terminal of the eighth resistor R 8 . A second terminal of the eighth resistor R 8 is connected to a positive terminal of the fifth capacitor C 5 , and outputs the compensation voltage signal VTT_COMP.

The output pin 1 of the PWM signal generator 110 outputs the PWM voltage signal VTT_PWM to the PWM pin of the ISL6612 chip. The UGATE pin and the LGATE pin alternately output a first control signal and a second control signal. When the UGATE pin outputs the first control signal to the gate of the first FET Q 1 , the first FET Q 1 turns on, and outputs a DC current signal I 2 . When the LGATE pin outputs the second control signal to the gate of the second FET Q 2 , the second FET Q 2 turns on, and outputs a DC current signal I 3 . The working current of the electrical device 117 comes from the DC current signals I 1 , I 2 , and I 3 .

The filtering unit 116 filters the DC voltage signal V 1 to generate the filtered DC voltage signal V 2 , and transmits the filtered DC voltage signal V 2 to the electrical device 17 . The feedback unit 118 generates the feedback voltage signal VTT_FB based on the DC voltage signal V 1 , and transmits the feedback voltage signal VTT_FB to the input pin 2 of the power management chip. The compensation unit 120 generates the compensation voltage signal VTT_COMP based on the feedback signal VTT_FB, and transmits the compensation voltage signal VTT_COMP to the input pin 3 of the power management chip.

When the above-described electrical elements have reference values as following, the first and second FETs Q 1 and Q 2 can work in rated voltage ranges. A capacitance of the first capacitor ranges from about 0.08 uF to about 0.18 uF. Capacitances of the second, third, fourth, and fifth capacitors are about 4.7 uF, 47 nF, 10 nF, and 68 nF respectively. Capacitances of the first, second, and third electrolytic capacitors ranges from about 800 uF to about 1200 uF; and a resistance of the first resistor ranges from about 10.45 kΩ to about 11.55 kΩ. A resistance of the second resistor ranges from about 4.47 kΩ to about 4.93 kΩ. A resistance of the third resistor ranges from about 9.9 kΩto about 10.1 kΩ. A resistance of the fourth resistor ranges from about 0Ω to about 0.05Ω. A resistance of the fifth resistor ranges from about 31.35Ω to about 34.65Ω; and a resistance of the sixth resistor ranges from about 2.178 kΩ to about 2.222 kΩ. A resistance of the seventh resistor ranges from about 3.831 kΩ to about 3.939 kΩ. A resistance of the eighth resistor ranges from about 10.45 kΩ to about 11.55 kΩ. Therefore, the first switch unit 111 and the second switch unit 113 can alternatively supply the DC current signals I 2 and I 3 to the electrical device 117 . The disclosure can ensure the security of the drive unit 114 and the current requirement of the electrical device 117 at the same time. It should be understood that reference values of the above-described electrical elements can be adjusted to achieve the purpose of the disclosure.

It is to be understood, however, that even though numerous characteristics and advantages of the embodiments have been set forth in the foregoing description, together with details of the structure and function of the embodiments, the disclosure is illustrative only, and changes may be made in details, especially in matters of shape, size, and arrangement of parts within the principles of the embodiments to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.