Band-gap reference voltage generator

This application claims priority to and the benefit of Korean Patent Application No. 10-2008-0085999, filed Sep. 1, 2008, the disclosure of which is incorporated herein by reference in its entirety.

1. Field of the Invention

The present invention relates to a band-gap reference voltage generator, and more particularly, to a band-gap reference voltage generator that can be miniaturized by reducing a size of a resistor occupying a large chip area and can provide a stable reference voltage lower than or equal to 1 V.

2. Discussion of Related Art

In general, all analog/radio frequency (RF) circuits or digital circuits manufactured with chips need a stable and accurate bias voltage for efficient operation. Therefore, a band-gap reference voltage generator is used to provide a stable reference voltage regardless of temperature variation.

However, a conventional band-gap reference voltage generator provides a reference voltage of about 1.25 V, it is not applicable to a circuit designed for applying a voltage lower than or equal to 1 V. There is a problem in that a power supply voltage of at least 1.5 V should be used to ensure smooth operation of transistors used in the reference voltage generator.

On the other hand, a small-area and low-power core chip design for guaranteeing portability and long lifespan is important in widely-used mobile communication terminals.

With the development of deep sub-micron CMOS technology, a small area and low power (or low voltage) may be implemented. However, there is a problem in circuit design since only a core band-gap bias circuit within a chip needs an operation voltage of at least 1.5 V when a low supply voltage is used for a low-power design.

To address this problem, a band-gap reference voltage generator for reducing a reference voltage to 1 V or less using a resistor has been proposed. However, this band-gap reference voltage generator has a problem of increased circuit area since a relatively large-sized resistor is needed.

The present application is directed to a compact band-gap reference voltage generator that can be miniaturized and can provide a stable reference voltage lower than or equal to 1 V.

According to an exemplary embodiment of the present invention, there is provided a band-gap reference voltage generator including: first to third p-channel metal oxide semiconductor (PMOS) transistors of a current mirror having gates and sources connected in common to a first node and a power supply voltage, and drains respectively connected to second, third, and fourth nodes; a feedback amplifier having inverted and non-inverted input terminals respectively connected to the second and third nodes and an output terminal connected to the first node; first and second resistors respectively connected between the second node and a fifth node and between the second node and a sixth node; third and fourth resistors respectively connected between the third node and a seventh node and between the fourth node and a ground; first and second bipolar transistors having emitters respectively connected to the fifth node and the third node and collectors and bases connected to the ground; and fourth and fifth n-channel metal oxide semiconductor (NMOS) transistors respectively having gates and drains connected in common to the sixth node and the seventh node and sources connected to the ground, wherein a voltage between the fourth node and the ground is used as a reference voltage.

The reference voltage may be computed by:

That is, a Proportional To Absolute Temperature (PTAT) voltage that is directly proportional to absolute temperature in the band-gap reference voltage generator becomes the thermal voltage V T , a Complementary To Absolute Temperature (CTAT) voltage that is inversely proportional to absolute temperature becomes a difference (V BE2 −V TH — M5 ) between the base-emitter voltage V BE2 of the second bipolar transistor and the threshold voltage V TH — M5 of the fifth NMOS transistor, and the weight for the thermal voltage V T is computed by α=ln n*(R 3 /R 1 ).

The CTAT voltage that is inversely proportional to absolute temperature is reduced by the threshold voltage V TH — M5 of the fifth NMOS transistor. The band-gap reference voltage generator according to an exemplary embodiment of the present invention can reduce the weight α for the thermal voltage V T in order to set a sum of temperature coefficients to 0.

A stable reference voltage lower than or equal to 1 V may be provided by the second and third resistors respectively connected to the first and second bipolar transistors in parallel regardless of temperature variation.

The above and other objects, features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the accompanying drawings, in which:

FIG. 1 is a circuit diagram illustrating a conventional CMOS band-gap reference voltage generator;

FIG. 2 is a circuit diagram illustrating a band-gap reference voltage generator according to an exemplary embodiment of the present invention;

FIG. 3 shows temperature compensation curves of the band-gap reference voltage generator according to an exemplary embodiment of the present invention and the conventional band-gap reference voltage generator; and

FIGS. 4 and 5 are graphs showing temperature coefficient characteristics of the band-gap reference voltage generator according to an exemplary embodiment of the present invention and the conventional band-gap reference voltage generator, and computer simulation results using three simulation models SS, TT, and FF.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. Although exemplary embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions, and substitutions are possible, without departing from the scope of the present invention. Therefore, the present invention is not limited to the exemplary embodiments.

To inspect the main differences between the band-gap reference voltage generator according to an exemplary embodiment of the present invention and the conventional band-gap reference voltage generator, structure and operation of the conventional band-gap reference voltage generator will be described in detail.

FIG. 1 is a circuit diagram illustrating a conventional complementary metal oxide semiconductor (CMOS) band-gap reference voltage generator.

Referring to FIG. 1 , the conventional CMOS band-gap reference voltage generator includes first to third p-channel metal oxide semiconductor (PMOS) transistors M 1 ˜M 3 , a feedback amplifier AMP, first and second resistors R 1 and R 2 , and first to third bipolar transistors Q 1 ˜Q 3 .

A reference voltage V ref output from the band-gap reference voltage generator configured as described above is independent of temperature and may be numerically described as follows.

A voltage across the first resistor R 1 is computed by ΔV BE =V BE1 −V BE2 . When ΔV BE is converted into temperature-related expression, Equation 1 is obtained:

In Equation 1, I S1 and I S2 denote reverse saturation currents of the first and second bipolar transistors Q 1 and Q 2 , I C1 and I C2 denote currents flowing through the first and second bipolar transistors Q 1 and Q 2 , n denotes the number of bipolar transistors, and V T denotes a Proportional To Absolute Temperature (PTAT) voltage as a thermal voltage in the band-gap reference voltage generator.

Since ln n is a constant in Equation 1, the voltage ΔV BE across the first resistor R 1 increases in direct proportion to V T , which is directly proportional to temperature.

Next, a current I 2 flowing through the first resistor R 1 is mirrored to the third PMOS transistor M 3 by directly reproducing temperature characteristics of ΔV BE . A mirrored current I 3 flows through the second resistor R 2 and the third bipolar transistor Q 3 .

A base-emitter voltage V BE3 of the third bipolar transistor Q 3 decreases in inverse proportion to the temperature.

ΔV BE is a temperature variable increasing in direct proportion to the temperature and V BE3 is a temperature variable decreasing in inverse proportion to the temperature. When the two temperature variables are set to zero by properly adjusting a resistance ratio of the first and second resistors R 1 and R 2 , a reference voltage V ref that is independent of temperature can be obtained, as shown in Equation 2:

As shown in Equation 2, the conventional band-gap reference voltage generator has a perfect temperature characteristic (that is, a temperature coefficient of 0) around a theoretical reference voltage V ref of about 1.25 V, it is not applicable to a circuit designed for applying a voltage lower than or equal to 1 V. There is a problem in that a power supply voltage of at least 1.5 V should be used to ensure smooth operation of transistors used in the reference voltage generator.

In contrast, the band-gap reference voltage generator according to an exemplary embodiment of the present invention can provide a stable reference voltage lower than or equal to 1 V and can be miniaturized. Structure and operation of the band-gap reference voltage generator according to an exemplary embodiment of the present invention will be described in detail.

FIG. 2 is a circuit diagram illustrating a band-gap reference voltage generator according to an exemplary embodiment of the present invention.

Referring to FIG. 2 , the band-gap reference voltage generator includes first to third PMOS transistors M 1 ˜M 3 , a feedback amplifier AMP, first to fourth resistors R 1 ˜R 4 , first and second bipolar transistors Q 1 ˜Q 2 , and fourth and fifth NMOS transistors M 4 and M 5 .

A connection relation between the components will be described briefly.

The first to third PMOS transistors M 1 ˜M 3 are configured in the form of a current mirror. The first to third PMOS transistors M 1 ˜M 3 have gates connected in common to a first node N 1 , sources connected in common to a power supply voltage V DD , and drains respectively connected to second, third, and fourth nodes N 2 , N 3 , and N 4 . To improve Power Supply Rejection Ratio (PSRR) characteristics, it is possible to configure the current mirror by stacking multi-stage PMOS transistors.

The feedback amplifier AMP has inverted and non-inverted input terminals −V in and +V in respectively connected to the second and third nodes N 2 and N 3 , and an output terminal connected to the first node N 1 .

The first resistor R 1 is connected between the second node N 2 and a fifth node N 5 , the second resistor R 2 is connected between the second node N 2 and a sixth node N 6 , and the third resistor R 3 is connected between the third node N 3 and a seventh node N 7 . The fourth resistor R 4 is connected between the fourth node N 4 and a ground GND and a reference voltage V ref is connected to the fourth node N 4 .

The first bipolar transistor Q 1 has an emitter connected to the fifth node N 5 and a collector and base connected to the ground GND. The second bipolar transistor Q 2 has an emitter connected to the third node N 3 and a collector and base connected to the ground GND.

The fourth NMOS transistor M 4 has a gate and drain connected in common to the sixth node N 6 and a source connected to the ground GND. The fifth NMOS transistor M 5 has a gate and drain connected in common to the seventh node N 7 and a source connected to the ground GND.

When an output voltage of the feedback amplifier AMP is applied to gates of the first to third PMOS transistors M 1 ˜M 3 in a state in which the first to third PMOS transistors M 1 ˜M 3 are in a saturation mode, the same current flows through the first to third PMOS transistors M 1 ˜M 3 by current mirroring. That is, I 1 =I 2 =I 3 . Here, the current I 1 is divided into I 1a and I 1b , and the current I 2 is divided into I 2a and I 2b . That is, I 1 =I 1a +I 1b , and I 2 =I 2a +I 2b .

The voltages of the second node N 2 and the third node N 3 have the same magnitude by current mirroring of I 1 and I 2 . When the second resistor R 2 is the same as the third resistor R 3 , that is, when R 2 =R 3 , I 1a =I 2a and I 1b =I 2b .

The current I 2a flowing through the second bipolar transistor Q 2 can be defined as shown in Equation 3:

I 2a =I S2 ·e V BE 2 /V T   (Equation 3)

In Equation 3, I S2 and V BE2 each denote a reverse saturation current and a base-emitter voltage of the second bipolar transistor Q 2 , and V T denotes a thermal voltage.

When Equation 3 is converted into a numerical expression related to the base-emitter voltage V BE2 of the second bipolar transistor Q 2 , Equation 4 is obtained:

The base-emitter voltage V BE2 of the second bipolar transistor Q 2 computed by Equation 4 decreases in inverse proportion to the temperature.

The voltage ΔV BE across the first resistor R 1 can be expressed by Equation 5:

In Equation 5, n denotes the number of bipolar transistors and V BE1 denotes a base-emitter voltage of n bipolar transistors connected in parallel.

The voltage ΔV BE across the first resistor R 1 computed by Equation 5 increases in direct proportion to the temperature.

Accordingly, the currents I 2a and I 2b can be expressed as shown in Equation 6:

Since I 2a +I 2b =I 2 =I 3 in Equation 6, a target reference voltage V ref can be expressed as shown in Equation 7:

Referring to Equation 7, a PTAT voltage that is directly proportional to absolute temperature in the band-gap reference voltage generator becomes V T , and a CTAT voltage that is inversely proportional to absolute temperature becomes a difference (V BE2 −V TH — M5 ) between the base-emitter voltage V BE2 of the second bipolar transistor Q 2 and the threshold voltage V TH — M5 of the fifth NMOS transistor M 5 .

When weights for temperature coefficients of the PTAT voltage V T and the CTAT voltage (V BE2 −V TH — M5 ) are denoted by α and β, the reference voltage V ref can be obtained regardless of temperature variation when the temperature coefficients are set to zero such that α*{∂V T /∂T}+β{∂(V BE2 −V TH — M5 )/∂T}=0, by properly selecting α and β.

Since the CTAT voltage by the fourth and fifth NMOS transistors M 4 and M 5 is reduced by the threshold voltage V TH — M5 of the fifth NMOS transistor M 5 , the weight α(=ln n*(R 3 /R 1 )) for the temperature coefficient of the PTAT voltage is reduced in the band-gap reference voltage generator according to an exemplary embodiment of the present invention compared to the conventional band-gap reference voltage generator.

Table 1 shows a comparison of the conventional band-gap reference voltage generator and the band-gap reference voltage generator according to an exemplary embodiment of the present invention.

Referring to Table 1, the temperature coefficient (∂V BE /∂T) of the CTAT voltage in the conventional band-gap reference voltage generator is four times greater than in the band-gap reference voltage generator according to an exemplary embodiment of the present invention. Accordingly, it can be seen that the weight α for the temperature coefficient of the PTAT voltage for setting a sum of temperature coefficients to 0 is also doubled.

That is, the resistance ratio R 3 /R 1 of the third resistor R 3 and the first resistor R 1 should increase at least 20 times in order to set all temperature coefficients to 0 in the conventional band-gap reference voltage generator. Since a sum of temperature coefficients can be set to 0 even when the resistance ratio R 3 /R 1 increases only about 10 times, the size of a resistor occupying a large chip area can be reduced by about ½, thereby miniaturizing the band-gap reference voltage generator.

Since the temperature coefficient of the CTAT voltage is reduced by the fourth and fifth NMOS transistors M 4 and M 5 and the second and third resistors R 2 and R 3 respectively connected to the first and second bipolar transistors Q 1 and Q 2 in parallel in the band-gap reference voltage generator according to an exemplary embodiment of the present invention, a stable reference voltage V ref that is lower than or equal to 1 V can be provided regardless of temperature variation.

FIG. 3 shows temperature compensation curves of the band-gap reference voltage generator according to an exemplary embodiment of the present invention and the conventional band-gap reference voltage generator.

As seen in FIG. 3 , a temperature coefficient of a CTAT voltage is reduced and a curvature of a temperature compensation curve is reduced in the band-gap reference voltage generator according to an exemplary embodiment of the present invention compared to the conventional band-gap reference voltage generator.

FIGS. 4 and 5 are graphs showing temperature coefficient characteristics of the band-gap reference voltage generator according to an exemplary embodiment of the present invention and the conventional band-gap reference voltage generator, and computer simulation results using three simulation models SS, TT, and FF.

Referring to the computer simulation results of TT shown in FIGS. 4 and 5 , the conventional band-gap reference voltage generator has a high temperature coefficient of 33.1 ppm/° C. However, the band-gap reference voltage generator according to an exemplary embodiment of the present invention has a very low temperature coefficient of 9 ppm/° C. and a PSRR of 78 dB.

According to the present invention, a band-gap reference voltage generator can be miniaturized by reducing the size of a resistor occupying a large chip area, since a resistance ratio for a temperature coefficient of 0 is reduced by about ½.

According to the present invention, a stable reference voltage lower than or equal to 1 V can be provided regardless of temperature variation.

While the present invention has been shown and described in connection with exemplary embodiments thereof, it will be apparent to those skilled in the art that various modifications can be made without departing from the spirit and scope of the invention as defined by the appended claims.