Multistage charge pumps with diode loss compensation

This patent claims the benefit of U.S. Provisional Patent Application No. 61/045,155, filed on Apr. 15, 2008, the entirety of which is incorporated by reference.

This disclosure relates generally to charge pumps and, more particularly, to multistage charge pumps with diode loss compensation.

Charge pumps, or voltage multipliers, are commonly used in integrated circuit (IC) applications to boost a main supply voltage to a higher voltage. In some applications, the higher voltage must be generated internally within the IC to avoid the use of an externally-applied voltage. Post-regulated charge pumps, which sense the output voltage of the charge pump and utilize a control loop to regulate the output voltage, offer voltage accuracy at the expense of increased complexity and power consumption. However, not all applications require the voltage accuracy provided by post-regulation and, therefore, added overhead associated with post-regulation.

Applications that do not require high accuracy often utilize unregulated charge pumps, which result in a reduced complexity and smaller area requirement. However, output voltages that stray outside the application voltage limits, even in applications not requiring high accuracy, may result in stress on a load device and/or other undesirable effects.

Multistage charge pumps with diode loss compensation are disclosed. In one example, a pre-regulated charge pump to generate a voltage is described. The example pre-regulated charge pump includes a charge pump having a plurality of stages and one or more diodes. The stages are configured to generate an output voltage at an output terminal based on an input voltage and a number of the multiplier stages. The example pre-regulated charge pump also includes a pre-regulator stage configured to adjust the input voltage in response to a change in a load current at the output terminal. The pre-regulator includes a feedback diode configured to compensate for one or more voltage drops associated with the one or more charge pump diodes.

FIG. 1 is a schematic diagram of an unregulated Dickson charge pump.

FIG. 2 is a diagram illustrating the phase relationships of the example clock signals shown in FIG. 1 .

FIG. 3 is a diagram of example I-V diode characteristics across several temperature and process variations.

FIG. 4 is a schematic diagram of an example pre-regulated charge pump with diode loss compensation.

FIG. 5 is a diagram of charge pump voltage variations using the conventional charge pump of FIG. 1 .

FIG. 6 is a diagram of charge pump voltage variations using the example pre-regulated charge pump of FIG. 4 .

Certain examples are shown in the above-identified figures and described in detail below. In describing these examples, like or identical reference numbers may be used to identify common or similar elements. The figures are not necessarily to scale and certain features and certain views of the figures may be shown exaggerated in scale or in schematic for clarity and/or conciseness. Although the following discloses example apparatus, it should be noted that such apparatus are merely illustrative and should not be considered as limiting. The example circuits described herein may be implemented using discrete components, integrated circuits (ICs), or any combination thereof. Accordingly, while the following describes example apparatus, persons of ordinary skill in the art will readily appreciate that the examples are not the only way to implement such apparatus.

The example devices described herein may be used to provide a charge pump with diode loss compensation to provide improved output voltage accuracy. The improved accuracy is accomplished with little IC substrate area impact and little or no additional power consumption. In one described example, a Dickson charge pump is provided with a pre-regulator device. The Dickson charge pump includes several multiplier stages that increase an input voltage to achieve an output voltage. In one example, each multiplier stage includes a diode that results in a voltage loss, with the aggregate voltage loss potentially varying significantly during operation based on temperature and IC process. The pre-regulator compensates for the voltage loss caused by the diodes in the Dickson charge pump by including a feedback diode, through which a current flows to approximate the current flowing through the Dickson charge pump, and by adjusting the input voltage to the Dickson charge pump to approximate changes in the voltage losses caused by the multiplier stage diodes. The example device substantially reduces the temperature and process dependence of variations in the Dickson charge pump output voltage.

FIG. 1 is a schematic diagram of an unregulated Dickson charge pump 100 . The charge pump 100 receives an input voltage (V IN ) from a voltage supply 102 and generates an output voltage (V OUT ) to supply and output load 104 . To this end, the charge pump includes N multiplier stages 106 , 108 , 110 , and 112 , each of which includes a diode D 1 to D N and a charging capacitor C 1 to C N . The diodes D 1 to D N function as reverse-blocking diodes to ensure the correct flow of charge from the voltage supply 102 to the output load 104 . The charging capacitors C 1 to C N are alternately coupled to clock signals 114 and 116 . The output load 104 includes a load capacitor C L to store charge and to filter output voltage ripple.

The multiplier stages 106 , 108 , 110 , and/or 112 may experience parasitic capacitance. The parasitic capacitance is illustrated by parasitic capacitors C p , which are not physical capacitors but illustrative of the effects of parasitic capacitance.

The clock signal 114 has a phase φ 1 and the clock signal 116 has a phase φ 2 . FIG. 2 is a diagram illustrating the phase relationships of the example clock signals 114 and 116 shown in FIG. 1 . As shown in FIG. 2 , the example clock signals 114 and 116 are 180° out of phase with respect to each other and have an amplitude V Φ . With respect to FIG. 1 , V Φ is equal to V IN . When the clock signal 116 is low (e.g., 0 V) and the clock signal 114 is high (e.g., V 101 ), the capacitors C 2 and C N are charged from the previous stages, respectively. For example, C 2 is charged via the diode D 2 by the capacitor C 1 , and C N is charged via D N by the capacitor C N−1 . Once the capacitors C 2 and C N are charged, the clock signal 116 goes high and the clock signal 114 goes low, and the voltages at the positively-charged terminals of the charging capacitors increase accordingly, which cause the multiplier stages 108 and 112 to charge the next stages in sequence. The multiplier stage 112 , however, generates V OUT via the diode D N+1 .

The unregulated Dickson charge pump 100 has an output voltage V OUT that can be approximated by Equation 1:

V OUT = V IN + N ⁡ [ ( C n C n + C p ) ⁢ V IN - V D - I L ( C n + C p ) ⁢ f ] - V D , ( Eq . ⁢ 1 )

where N is the number of multiplier stages 106 , 108 , 110 , and 112 , V D is the voltage drop across each diode D 1 to D N−1 , C p is a parasitic capacitance of each multiplier stage 106 - 112 , f is the frequency of the clock signals 114 and 116 , and I L is the load current 104 . Equation 1 also assumes that C 1 =C 2 = . . . =C N =C n , which can be assigned based on the requirements of an application (i.e., the output load 104 ). The parasitic capacitance, which may or may not be present in the circuit, is represented by capacitors C p coupling the charging capacitors to a ground reference 118 .

Further, assuming that C p <<C n , and denoting R s to be the output resistance of the charge pump 100 as shown in Equation 2, Equation 1 may be rewritten as shown in Equation 3:

R s = N ( C n + C p ) ⁢ f , ( Eq . ⁢ 2 ) V OUT = V OUT , ideal - V error ≈ ( N + 1 ) ⁢ ( V IN - V D ) - R s ⁢ I L ⁢

⁢ where , ( Eq . ⁢ 3 ) V OUT , ideal = ( N + 1 ) · V IN , and ( Eq . ⁢ 4 ) V error ≈ ( N + 1 ) ⁢ ( V D ) + R S ⁢ I L . ( Eq . ⁢ 5 )

The voltage V error is due to the non-zero output resistance R s of the charge pump 100 , and the voltage drop V D caused by each of the diodes D 1 to D N+1 . Thus, as illustrated by Equation 5, V error represents voltage loss with respect to the ideal output voltage V OUT,ideal and includes the diode voltage drop V D multiplied by the number of diodes N+1.

The voltage drop V D is a strong function of process and temperature. FIG. 3 is a diagram of example I-V diode characteristics across several temperature and process variations. The I-V diode characteristics of FIG. 3 may apply to the diodes D 1 to D N+1 of FIG. 1 . As shown in FIG. 3 , the variation on V D for a fixed load current I L and a temperature range from −40° C. using a weak IC process to 125° C. using a strong IC process can be approximately 400 millivolts (mV). In applications requiring many multiplier stages (i.e., low input voltage, high output voltage), the output variation resulting from the variation at each of the several diodes D 1 to D N+1 can be very high. The variation in the output voltage V OUT is also represented by variation in V error as shown in Equation 5.

FIG. 4 is a schematic diagram of an example pre-regulated charge pump with diode loss compensation. The example charge pump 400 may be used to generate a high voltage for applications such as non-volatile memory. To correct for output voltage variations caused by process and temperature differences as described above, the example charge pump 400 includes a pre-regulator circuit 402 . The pre-regulator 402 monitors the variance in the diode voltage drops V D , as well as the output load current from the charge pump 400 , and adjusts the input voltage to the charge pump 400 to substantially reduce the variance in the charge pump output voltage.

The example charge pump 400 includes N multiplier stages 404 , 406 , 408 , and 410 , which are similar to the multiplier stages 106 , 108 , 110 , and 112 , respectively, described in FIG. 1 . The multiplier stages 404 , 406 , 408 , and 410 are driven by clock signals 412 and 414 , which have phases φ 1 and φ 2 , respectively. The phases φ 1 and φ 2 have a phase relationship as illustrated in FIG. 2 , and V Φ is equal to V RIN with respect to FIG. 4 .

The example pre-regulator 402 includes a low-dropout regulator (LDO) 416 , which generates a pre-regulated input voltage (V RIN ) that serves as the input voltage to the charge pump 400 . The LDO 416 adjusts V RIN based on a comparison of a reference voltage (V REF ) with a feedback voltage (V FB ). The example LDO 416 has power provided by a voltage source (V BAT ) such as a battery. Although the voltage V BAT may vary, the pre-regulator 402 provides a consistent V RIN that compensates for the voltage drop V D over the diodes D 1 to D N+1 . The example pre-regulator 402 further includes a diode D 0 and a voltage divider 418 , which is implemented utilizing a series combination of resistors R 1 and R 2 . To appropriately monitor the variance of V D caused by process and temperature, the example diode D 0 is implemented to be the same as the diodes D 1 to D N+1 . Thus, the example diode D 0 follows the example I-V curves illustrated in FIG. 3 as the diodes D 1 to D N+1 .

The pre-regulated input voltage V RIN generated by the pre-regulator 402 may be expressed by Equation 6:

V RIN = V R + V D ⁢ ⁢ 0 = V REF ⁡ ( 1 + R 2 R 1 ) + V D ⁢ ⁢ 0 , ( Eq . ⁢ 6 )

where V D0 is the voltage drop across the diode D 0 . V R represents the voltage divided over the voltage divider 418 . By applying V RIN as shown in Equation 6 to V IN of Equation 3, the output voltage V OUT is shown by Equation 7:

V OUT ≈( N+ 1)( V R +V D0 −V D )− R s I L   (Eq. 7).

By assuming the current through the diode D 0 (I D0 ) is within the same order of magnitude as a load current I L through a load device 420 (e.g., a few microamperes (μA)), V D0 and V D are assumed to be approximately equal and V OUT can be approximated by Equation 8:

V OUT ≈ ( N + 1 ) ⁢ ( 1 + R 2 R 1 ) ⁢ V REF - R s ⁢ I L . ( Eq . ⁢ 8 )

The current I D0 can be implemented to be approximately equal to I L by proper selection of the resistor values R 1 and R 2 . R 1 and R 2 are selected according to Equations 8 and 9:

R 1 + R 2 = V R I L . ( Eq . ⁢ 9 )

Thus, through the use of the pre-regulator 402 and proper selection of R 1 and R 2 , the dependency of V OUT on the variation in V D is removed, resulting in a significant improvement in the accuracy of V OUT . In contrast to the output voltage illustrated in Equation 3 describing the unregulated charge pump 100 , V OUT is not dependent on V D , as illustrated in Equation 8 describing the example charge pump 400 and the example pre-regulator 402 . It is also noted that V OUT , as shown in Equation 8, has no dependence on V BAT . Thus, although V BAT may vary in voltage, V OUT is not substantially affected.

Although the example charge pump 400 and pre-regulator 402 are described with reference to a non-volatile memory load, any other appropriate load may be used at the output.

The example reference voltage V REF of FIG. 4 is based on a bandgap voltage reference that is often available in an IC, but other reference voltage sources may be used.

The example capacitors C 1 to C N of FIG. 4 . are described as having substantially equal capacitance values. Depending on the application and the desired output voltage V OUT , the capacitance values may be modified and/or may not all be equal.

The example resistors R 1 and R 2 are configured according to Equation 8 to provide a desired ratio, and are further constrained to limit the current flowing through the diode D 0 . The resistor ratio may be modified depending on the application to achieve a particular output voltage.

Further, any one or more of the output voltage V OUT , the resistors R 1 and R 2 , the reference voltage V REF , the number of multiplier stages N, and/or the frequency f may be modified depending on the application. It should be recognized that the foregoing equations may need to be modified to account for modifications in the described assumptions.

The example capacitors C 1 to C N , the example diodes D 0 and D 1 to D N+1 , the example resistors R 1 and R 2 , and the example regulator 416 are implemented on one IC. However, any or all of the example components may be implemented utilizing one or more additional ICs, one or more discrete components, or any combination thereof.

In an example of operation, the charge pump 400 and pre-regulator 402 are used in an IC to generate a high programming voltage sufficient to activate tunneling and hot-electron injection in a non-volatile memory device. It should be noted, however, that the examples described herein may be modified to be used with any charge pump that can benefit from pre-regulation to compensate for diode losses. In the example of FIG. 4 , the regulator 416 is an LDO that maintains a relatively constant voltage. However, any regulator may be implemented to adjust the regulated input voltage based on a reference voltage and a feedback voltage.

Using Equations 2 and 9 to illustrate operation of the charge pump 400 and the pre-regulator 402 , V OUT is dependent on the number N of multiplier stages 404 - 410 in the charge pump 402 , the ratio of the resistors R 2 and R 1 , the reference voltage V REF , the charging and parasitic capacitances C p and C n , the frequency f, and the load current I L . In the illustrated example, N, R 2 , R 1 , V REF , C p , C n , and f are substantially constant. Thus, the variability in V OUT is dependent on variation in I L .

In an example of operation of the example charge pump 400 and the example pre-regulator 402 , the operating temperature of the diodes D 0 and D 1 to D N+1 is stable for a time, allowing V OUT to stabilize. The operating temperature of the diodes D 0 and D 1 to D N+1 then increases. As illustrated by the I-V diode characteristics shown in FIG. 3 , the increase in operating temperature reduces the voltage drops V D and V D0 for a given current (e.g., I L or I D0 ). The reduced voltage drop V D through the diodes D 1 to D N+1 causes V OUT to increase. However, the pre-regulator 402 compensates by detecting the decrease in V D0 corresponding to the decrease in V D . The reduced V D0 causes V FB to increase via the voltage divider 418 . The increase in V FB is detected by the LDO 416 , which reduces V RIN in response to the increase in V FB , thereby causing V OUT to decrease. In this way, the pre-regulator 402 compensates for changes in VOUT caused by increases in diode operating temperature.

In another example of operation, the operating temperature of the diodes D 0 and D 1 to D N+1 is stable for a time, allowing V OUT to stabilize. The operating temperature of the diodes D 0 and D 1 to D N−1 then decreases. As illustrated by the I-V diode characteristics shown in FIG. 3 , the decrease in operating temperature increases the voltage drops V D and V D0 for a given current (e.g., I L or I D0 ). The increased voltage drop V D through the diodes D 1 to D N+1 causes V OUT to decrease. However, the pre-regulator 402 compensates by detecting the increase in V D0 corresponding to the increase in V D . The increased V D0 causes V FB to decrease via the voltage divider 418 . The decrease in V FB is detected by the LDO 416 , which increases V RIN in response to the decrease in V FB , thereby causing V OUT to increase. In this way, the pre-regulator 402 compensates for changes in V OUT caused by decreases in diode operating temperature.

Because the example charge pump 400 is pre-regulated, the output voltage V OUT is not regulated. Therefore, V OUT may vary in response to changes in the load current I L . However, the pre-regulator 402 maintains a constant regulated input voltage V RIN to the charge pump 400 despite varying load current, output voltage, or battery supply voltage to the LDO 416 .

FIG. 5 is a diagram of charge pump voltage variations using the conventional charge pump 100 of FIG. 1 . The diagram shows several voltage traces, including a voltage trace 502 varying at a much higher voltage and a voltage trace 504 varying at a much lower voltage. By analyzing the difference between the high voltage trace 502 and the low voltage trace 504 , the accuracy of the conventional charge pump 100 can be determined to be approximately 3.32V.

FIG. 6 is a diagram of charge pump voltage variations using the example pre-regulated charge pump of FIG. 4 . As shown in FIG. 6 , the variation between the highest voltage trace 602 and the lowest voltage trace 604 is much smaller, at approximately 0.88 V, than the variation between the traces 502 and 504 of FIG. 5 . This results in a much higher voltage accuracy using the example charge pump 400 and pre-regulator 402 and, thus, better performance from an output load dependent thereon.

Although certain example methods and apparatus are described herein, other implementations are possible. The scope of coverage of this patent is not limited to the specific examples described herein. On the contrary, this patent covers all methods and apparatus falling within the scope of the invention.