Apparatus and method for testing computer

1. Technical Field

The present invention generally relates to an apparatus and method for testing a computer.

2. Description of Related Art

After a computer is produced, a power cycling test is required. The power cycling test is performed for a predetermined number of test cycles. In one test cycle, the computer is powered on and then powered off. A typical test procedure includes manually operating the power button of the computer repeatedly. However, manually testing the computer in a computer production line is inefficient and a waste of manpower.

An attempt to test the computers efficiently uses a mechanical arm to automatically activate a power switch of the computer. The mechanical arm periodically and repeatedly turns the computer on or off to test if the computer passes the power cycling test. However, since the atmospheric pressure acting on a piston of the mechanical arm is not constant, the mechanical arm is not a reliable apparatus to test the computer.

What is needed, therefore, is an apparatus and method for testing a computer to overcome the above-described shortcoming.

FIG. 1 is a block diagram of an embodiment of an apparatus for testing a computer, the apparatus including a control module, a driving module, a display module, a power module, and a switch module;

FIG. 2 is a schematic diagram illustrating detailed circuits of the control module, the driving module, and the display module of the apparatus of FIG. 1 ;

FIG. 3 is a schematic diagram illustrating detailed circuits of the power module and the switch module of the apparatus of FIG. 1 ; and

FIG. 4 is a flow chart of an embodiment of a method for testing a computer.

Referring to FIG. 1 , an apparatus for testing a computer includes a control module 10 , a driving module 20 , a display module 30 , a power module 40 for the control module 10 , and a switch module 50 . The control module 10 is configured to send trigger signals to the switch module 50 to periodically switch the switch module 50 on or off. The switch module 50 is configured to power the computer on or off according to the trigger signals during power cycling. Test parameters, such as cycle time and cycle number, may be displayed by the display module 30 . The driving module 20 is configured to drive the display module 30 to show the test parameters.

Referring to FIG. 2 , the control module includes a microcontroller 102 . In one embodiment, the microcontroller 102 is an ATMEGA16 chip which has a 16 kilobyte in-system programmable flash. The microcontroller 102 has a power cycling test program, a display driving program, and a key-scan program. A crystal oscillator circuit 104 has a port X 1 and a port X 2 connected to an X 1 pin and an X 2 pin of the microcontroller 102 to provide clock signals to the microcontroller 102 . An in-system programmable connector 106 is connected to the microcontroller 102 to facilitate burn procedures to the microcontroller 102 . A diode D 1 is connected to a PD 7 pin of the microcontroller 102 to indicate if the microcontroller 102 is operating.

A first key switch K 1 is connected to a PB 0 pin of the microcontroller 102 to start or stop the microcontroller 102 after it is triggered. A second key switch K 2 connects to a PB 1 pin of the microcontroller 102 for setting one of the test parameters after it is triggered. For example, if the key switch K 2 is actuated to set the cycle time, the cycle time can be shown on the display module 30 . If the second key switch K 2 is actuated again to set the cycle number, the cycle number can be shown on the display module 30 instead of the cycle time. A third key switch K 3 connects to a PB 2 pin of the microcontroller 102 to increase a value of one of the test parameters. A fourth key switch K 4 is connected to a PB 3 pin of the microcontroller 102 to decrease a value of one of the test parameters. For example, if the cycle time is set and shown on the display module 30 as an initialization value of 500 seconds, the cycle time may be changed to 501 seconds after the third key switch K 3 is triggered once or may be changed to 409 seconds after the fourth key switch K 4 is triggered once. The third key switch K 3 or the fourth key switch K 4 can be triggered repeatedly to increase or decrease the cycle time to execute different power cycling tests.

The driving module 20 includes transistors Q 1 , Q 2 , Q 3 , Q 4 . A base terminal of the transistor Q 1 is connected to pin PA 4 of the microcontroller 102 . A base terminal of the transistor Q 2 is connected to pin PA 5 of the microcontroller 102 . A base terminal of the transistor Q 3 is connected to pin PA 6 of the microcontroller 102 . A base terminal of the transistor Q 4 is connected to pin PA 7 of the microcontroller 102 . Emitting terminals of the transistors Q 1 , Q 2 , Q 3 , Q 4 are connected to ground. Collector terminals of the transistors Q 1 , Q 2 , Q 3 , Q 4 are connected to the display module 30 .

The display module 30 includes four seven-segment display LEDs 1 - 4 each having a pin a connected to the pin PC 0 of the microcontroller 102 , a pin b connected to the pin PC 1 of the microcontroller 102 , a pin c connected to the pin PC 2 of the microcontroller 102 , a pin d connected to the pin PC 3 of the microcontroller 102 , a pin e connected to the pin PC 4 of the microcontroller 102 , a pin f connected to the pin PC 5 of the microcontroller 102 , and a pin g connected to the pin PC 6 of the microcontroller 102 . A pin 1 of the display module 30 connects to the collecting terminal of the transistor Q 1 . A pin 2 of the display module 30 connects to the collecting terminal of the transistor Q 2 . A pin 3 of the display module 30 connects to the collecting terminal of the transistor Q 3 . A pin 4 of the display module 30 connects to the collecting terminal of the transistor Q 4 .

Referring to FIG. 3 , the power module 40 includes capacitors C 3 , C 4 to regulate power output to the microcontroller 102 . The switch module 50 includes a diode D 2 , a transistor Q 5 , and an optoelectron coupled devices B. An anode of the diode D 2 connects to a pin PA 3 of the microcontroller 102 , and a cathode of the diode D 2 connects to a base terminal of the transistor Q 5 . An emitting terminal of the transistor Q 5 connects to ground. A collector terminal of the transistor Q 5 connects to the optoelectron coupled device B. The optoelectron coupled device B includes a diode and a transistor connecting to a power connector of the computer to power the computer on or off according to the power cycling test program.

Referring to FIG. 4 is a method utilizing the above described apparatus for testing the computer. Depending on the embodiment, certain of the steps described below may be removed, others may be added, and the sequence of steps may be altered.

S 01 : triggering the key switch K 1 ;

S 02 : executing the power cycling test program, display driving program, and the key-scan program in the microcontroller 102 ;

S 03 : transmitting trigger signals generated by the power cycling test program to the switch module 50 from the pin PA 3 of the microcontroller 102 ; the optoelectron coupled device B of the switch module 50 powering the computer on or off;

S 04 : transmitting display driving signals to the driving module 20 and the display module 30 to show one of the test parameters which is currently enabled;

S 05 : detecting if the key switch K 1 is triggered;

S 06 : if the key switch K 1 is not triggered, detecting if the key switch K 2 is triggered;

S 07 : if the key switch K 2 is triggered, resetting one of the test parameters as a current test parameter which may be shown on the display module 30 ; for example, if the cycle time is enabled previously and shown on the display module 30 , after the key switch K 2 is triggered once, the cycle number is enabled and shown on the display module 30 instead of the cycle time;

S 08 ; if the key switch K 2 is not triggered, detecting if the key switch K 3 is triggered;

S 09 : if the key switch K 3 is triggered, increasing a value of the enabled parameter shown on the display module 30 ; for example, if the cycle number is enabled and shown as 500 on the display module 30 , after the key switch K 3 is triggered, the cycle number is increased to 501 ;

S 10 : if the key switch K 3 is not triggered, detecting if the key switch K 4 is triggered;

S 11 : if the key switch K 4 is triggered, decreasing the value of the enabled test parameter shown on the display module 30 ; and

S 12 : if the key switch K 4 is not triggered, determining if a count of the test cycles is equal to a predetermined cycle number; if the count of the test cycles is less than the predetermined cycle number, continuing to transmit trigger signals to test the computer; and

S 13 : if the count of the test cycles is equal to the predetermined cycle number, ending the test and recording a test result.

While the present invention has been illustrated by the description of preferred embodiments and while the preferred embodiments have been described in considerable detail, it is not intended to restrict or in any way limit the scope of the appended claims to such details. Additional advantages and modifications within the spirit and scope of the present invention will readily appear to those skilled in the art. Therefore, the present invention is not limited to the specific details and illustrative examples shown and described.