Constant-current, constant-voltage and constant-temperature current supply of a battery charger

This application claims the priority benefit of U.S.A. provisional application Ser. No. 60/969,649, filed on Sep. 3, 2007, all disclosures are incorporated therewith.

1. Field of Invention

The present invention relates to a current supply of a charger. More specifically, the present invention relates to a constant current (CC), constant voltage (CV) and constant temperature (CV) current supply of a rechargeable battery charger.

2. Description of Related Art

Batteries are used in a wide variety of portable devices such as laptop computers, cellular telephones, personal digital assistants (PDAs), radios, radiophones, stereo cassette tape players, etc. Two types of batteries are available: rechargeable and non-rechargeable. They exhibit different end of life voltage characteristics and effective series resistances. Non-rechargeable battery, e.g., alkaline battery, should not be subjected to recharging attempts. Rechargeable batteries, e.g., nickel-cadmium (Ni—Cd), nickel-hydrogen (Ni—H), lithium-ion, and nickel metal-hydride (Ni—MH) batteries, should be charged at different rates using different conditions.

These electronic devices powered by the rechargeable battery are typically plugged into the battery chargers when the rechargeable battery is in a low charge state.

FIG. 1 shows operation condition of a charger. Under Constant Voltage (CV) mode, the battery voltage is near the final voltage; and the charging current is close to 0. Under Constant Current (CC) mode, the battery voltage drops much below the final voltage; and the charging current equals preset value. Further, under constant temperature mode, the power dissipated by the charger is controlled such that the temperature inside the charger is kept constant.

FIG. 2 and FIG. 3 show prior control circuits for a conventional charger. The control circuit in FIG. 2 at least includes a resistor 110 , voltage-controlled current sources 120 and 130 , amplifiers 140 and 150 and a priority circuit 160 .

As shown in FIG. 2 , the priority circuit 160 has two inputs, A and B, and an output, Out. The priority circuit 160 connects the lower of the two inputs, A or B, to the output, Out. Therefore, the current flowing in the voltage-controlled current source 120 and in voltage-controlled current source 130 is equal to either the current required to develop V 1 across the resistor 110 or the current required to develop V 2 across the load Z 1 , whichever current is lower in magnitude. Voltage node, V 3 , also preferably continuously provides information regarding the magnitude of the charging current at all times. The higher magnitude current may be selected to charge the load.

The operating conditions of the control circuit in FIG. 2 are as follows. The load is a discharged battery, “V 1 /R 110 ” (R 110 refer to the resistance of the resistor 110 ) is equal to the desired charging current, and V 2 is equal to the desired final float potential of the battery. When charging begins, V 4 , the voltage across the battery, is much lower than V 2 , and the output of amplifier 150 slews to the positive supply rail because amplifier 150 is requesting maximum current.

Then, the priority circuit 160 connects the output of amplifier 140 to the control voltage of the current sources and ignores the output of amplifier 150 . Then, the current V 1 /R 110 is delivered to the load Z 1 .

As the battery is charged and V 4 approaches V 2 , the output of the amplifier 150 begins to drop. When the battery voltage V 4 reaches V 2 , the current required by the load to maintain this voltage begins to drop below V 1 /R 110 . Amplifier 140 tries to force the current V 1 /R 110 into the battery, but this causes V 4 to rise above V 2 which causes the output of amplifier 150 to fall quickly. The drop in the output of amplifier 150 causes the priority circuit 160 to choose the output of amplifier 150 as the controlling voltage for the current sources. At this point, the output of amplifier 140 is ignored. The current required by the load to maintain V 4 =V 2 is less than the current V 1 /R 110 , so the voltage across resistor 110 , labeled V 3 , falls below V 1 and the output of amplifier 140 slews to the positive rail, and the priority circuit 160 continues to select the constant voltage loop to provide current to the load Z 1 . In summary, the current delivered to the load Z 1 is preferably equal to V 1 /R 110 until the voltage across the load Z 1 reaches about V 2 . Then, the current delivered to the load Z 1 is reduced in order to maintain V 2 across the load Z 1 . This completes the constant-current/constant-voltage charging cycle.

Now please refer to FIG. 3 . PMOS transistors 210 and 220 function as the voltage controlled current sources. Two diodes 230 and 240 and a pull-down current source 250 perform a diode- or function to implement the priority function performed by the priority circuit 160 in FIG. 2 .

Circuit shown in FIG. 3 operates as follows. The gates of PMOS transistors 210 and 220 are coupled to the diodes 230 and 240 . In addition, it is well known in the art that increasing gate voltage of a PMOS transistor, while holding the source fixed, decreases the drain-source current of a PMOS transistor. It follows that, whereas voltage-controlled current sources 120 and 130 provide higher current in response to a higher voltage, PMOS transistors 210 and 220 provide lower current in response to higher voltage. Furthermore, amplifiers 140 and 150 in FIG. 3 are connected in opposite polarity from the amplifiers 140 and 150 shown in FIG. 2 .

In the constant current phase of circuit in FIG. 3 , when the voltage across the load Z 1 is less than V 2 , amplifier 140 sets the current V 1 /R 110 to the load. The output of amplifier 140 is preferably the voltage required to force the non-inverting input of amplifier 140 to have a voltage V 3 equal to V 1 . During this constant current phase of the circuit, the output of amplifier 150 is at the negative rail voltage. This negative rail voltage at the output of amplifier 150 is prevented from affecting the gate voltage of PMOS transistors 210 and 220 by diode 240 . Therefore, the output of amplifier 140 controls the current to the load during this phase.

In the constant voltage phase of the circuit in FIG. 3 , when the voltage across the load is at or above V 2 , amplifier 150 sets the current to the load such that this current is preferably less than V 1 /R 110 . During this constant voltage phase of the circuit, the output of amplifier 140 is at the negative rail voltage. This negative rail voltage at the output of amplifier 140 is prevented from affecting the gate voltage of PMOS transistors 210 and 220 by diode 230 . Therefore, the output of amplifier 150 controls the current to the load during this phase.

It has been shown that, whichever output voltage from amplifiers 140 and 150 is higher, it controls the charging current to the load. Thus, one function of diodes 230 and 240 and PMOS transistors 210 and 220 is to select the higher output value of amplifiers 140 and 150 to provide the lower available or requested current to the load. Pull down current source 250 sets the base-line voltage of the gates of PMOS transistors 210 and 220 to zero so the higher output of the amplifiers can be used to accurately set the voltage of the gates.

Optimally, V 1 is equal to V 3 in the constant current phase. However, due to the limited gain of amplifier 140 , an offset voltage Δ 1 exists between V 1 and V 3 for the amplifier 140 to generate its output. If amplifier 140 is designed with zero systematic offset, the offset voltage Δ 1 mainly comes from the mismatching of driving capabilities between diode 230 and current source 250 . Since diode 230 and current source 250 have different control signals, their driving capabilities are not generally well matched. Process variation can worsen the mismatch between diode 230 and current source 250 , thus increases the offset voltage Δ 1 . What's worse is that, in most cases, resistor 110 is an external component outside the chip, and the pole created by the resistor 110 and parasitic capacitor at node V 3 prevents the using of high gain amplifier for 140 for fear of instability. Low gain for amplifier 140 can result in high offset voltage Δ 1 . Therefore, the charge current into the load (i.e. the battery) is not precisely enough.

Optimally, V 2 is equal to V 4 in the constant voltage phase. However, due to the limited gain of amplifier 150 , an offset voltage Δ 2 exists between V 2 and V 4 for the amplifier 150 to generate its output. If amplifier 150 is designed with zero systematic offset, the offset voltage Δ 2 mainly comes from the mismatching of driving capabilities between diode 240 and current source 250 . Since diode 240 and current source 250 have different control signals, their driving capabilities are not generally well matched. Process variation can worsen the mismatch between diode 240 and current source 250 , and thus increases the offset voltage Δ 2 and deteriorates the accuracy of the final voltage of the battery.

The invention is directed to a current supply for a battery charger, which is capable of providing and operating under constant-current mode, constant-voltage mode and constant-temperature mode.

The invention is directed to a current supply for a battery charger, which is capable of providing precise charge currents into the battery.

The invention is directed to a current supply for a battery charger, with easy frequency compensation.

The invention is directed to a current supply for a battery charger, with reduced chip circuit area.

One example of the invention is related to a constant-current, constant-voltage and constant-temperature current supply for providing a charge current to a load. The current supply includes: a driving transistor, having a first terminal coupled to a power supply, a control terminal coupled to a node, and a second terminal coupled to the load, the driving transistor for providing the charge current to the load; a sensing transistor, having a first terminal coupled to the power supply, a control terminal coupled to the node, and a second terminal; a pulling low transistor, having a first terminal, a control terminal, and a second terminal coupled to the node, the pulling low transistor being for pulling low the node; a constant voltage controller, coupled to the driving transistor, the sensing transistor and the pulling low transistor, wherein when a voltage across the load rises up and comes close to a first reference voltage, the constant voltage controller pulls up the node, controls the conduction state of the driving transistor and accordingly maintains the voltage across the load at the first reference voltage; and a constant current controller, coupled to the driving transistor, the sensing transistor, the pulling low transistor and the constant voltage controller, wherein when the voltage across the load drops much lower than the first reference voltage, the constant current controller controls the node via a first pulling high transistor and the pulling low transistor and thus limits the charge current to be constantly provided to the load.

Another example of the invention is related to a constant-current, constant-voltage and constant-temperature current supply for providing a charge current to a load. The current supply includes: a driving transistor, having a first terminal coupled to a power supply, a control terminal coupled to a node, and a second terminal coupled to the load, the driving transistor for providing the charge current to the load; a sensing transistor, having a first terminal coupled to the power supply, a control terminal coupled to the node, and a second terminal; a pulling low transistor, having a first terminal, a control terminal, and a second terminal coupled to the node, the pulling low transistor being for pulling low the node; a constant voltage controller, coupled to the driving transistor, the sensing transistor and the pulling low transistor, wherein when a voltage across the load rises up and comes close to a first reference voltage, the constant voltage controller pulls up the node, controls the conduction state of the driving transistor and accordingly maintaining the voltage across the load at the first reference voltage; a constant current controller, coupled to the driving transistor, the sensing transistor, the pulling low transistor and the constant voltage controller, wherein when the voltage across the load drops much lower than the first reference voltage, the constant current controller controls the node via a first pulling high transistor and the pulling low transistor and thus limits the charge current to be constantly provided to the load; and a constant power controller, coupled to the constant current controller, for adjusting the power dissipated by the driving transistor and for reducing the charge current when a die temperature of the current supply raises.

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

FIG. 1 shows operation condition of a charger.

FIG. 2 and FIG. 3 respectively show a prior control circuit for a conventional charger.

FIG. 4 shows a constant current and constant voltage current supply of a charger according to a first embodiment of the invention.

FIG. 5 shows a circuit diagram of a current amplifier in FIG. 4 .

FIG. 6 shows a constant current, constant voltage and constant temperature current supply of a charger according to a second embodiment of the invention.

FIG. 7 and FIG. 8 show two examples of the constant power controller.

FIG. 9 shows characteristic curve diagram for the charge current I CHG .

Reference will now be made in detail to the present embodiments of the application, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

First Embodiment

FIG. 4 shows a constant current and constant voltage current supply of a charger according to a first embodiment of the invention. The constant current and constant voltage current supply according to the first embodiment of the invention provides a charge current I CHG to a load. The load is for example, a rechargeable battery BAT. The constant current and constant voltage current supply 400 according to the first embodiment includes: a driving transistor 410 , a sensing transistor 420 , a pulling low transistor 450 , a constant voltage controller, a constant current controller and an external resistor 480 . The constant voltage controller at least includes an operation amplifier 460 and a PMOS transistor 430 . The constant current controller at least includes an operation amplifier 470 and a PMOS transistor 440 . The operation amplifier 460 may be a voltage amplifier. The operation amplifier 470 may be a current amplifier.

The driving transistor 410 has a source terminal coupled to a power supply VC, a gate terminal coupled to a node N 1 , and a drain terminal coupled to the load BAT. The driving transistor 410 is for providing the charge current I CHG to the load BAT. The driving transistor 410 is for example a PMOS transistor.

The sensing transistor 420 has a source terminal coupled to the power supply VC, a gate terminal coupled to the node N 1 and a drain terminal coupled to the current amplifier 470 and the resistor 480 .

The pulling low transistor 450 has a source terminal coupled to GND, a gate terminal coupled to an output terminal of the current amplifier 470 and a drain terminal coupled to the node N 1 . The pulling low transistor 450 is for pulling low the node N 1 to GND. The pulling low transistor 450 is for example an NMOS transistor.

The constant voltage controller is coupled to the driving transistor 410 , the sensing transistor 420 and the pulling low transistor 450 . The constant current controller is coupled to the driving transistor 410 , the sensing transistor 420 , the pulling low transistor 450 and the constant voltage controller.

The PMOS transistor 430 is a pulling high transistor. The PMOS transistor has a source terminal coupled to the power supply VC, a gate terminal coupled to an output of the voltage amplifier 460 and a drain terminal coupled to the node N 1 . The pulling high transistor 430 is for pulling high the node N 1 .

The voltage amplifier 460 has a first input terminal coupled to the reference voltage REF 1 , a second input terminal coupled to the load BAT, and an output terminal coupled to the gate terminal of the pulling high transistor 430 . In other words, the voltage amplifier 460 compares the reference voltage REF 1 with the output voltage VBAT of the load BAT, to control driving capability of the transistor 430 .

The PMOS transistor 440 is also a pulling high transistor. The PMOS transistor 440 has a source terminal coupled to the power supply VC, a gate terminal coupled to another output terminal of the current amplifier 470 and a drain terminal coupled to the node N 1 . The PMOS transistor 440 is also for pulling high the node N 1 .

The current amplifier 470 has a first input terminal coupled to another reference voltage REF 2 , a second input terminal coupled to the resistor 480 , a first output terminal coupled to the gate terminal of the PMOS transistor 440 and a second output terminal coupled to the gate terminal of the pulling low transistor 450 . Voltage PROG is a voltage across the resistor 480 . In other words, the current amplifier 470 compares the reference voltage REF 2 with the voltage PROG to control driving capabilities of the transistors 440 and 450 .

In general, the voltage at the node N 1 will be pulled up by the transistors 430 and 440 . When a voltage across the load BAT rises up and comes close to a reference voltage REF 1 (i.e. the charger is operated at constant voltage mode), the transistor 430 will be slightly turned-on by the amplifier 460 and accordingly the voltage at the node N 1 will be slightly raised. While, the driving transistor 410 is weakly turned on to charge the load BAT until the voltage VBAT across the load BAT is substantially the same as the reference voltage REF 1 . In other words, the constant voltage controller pulls up the node N 1 , controls the conduction state of the driving transistor 410 . Accordingly, the voltage VBAT across the load BAT is to be substantially maintained at the reference voltage REF 1 under constant voltage mode.

On the contrary, when the voltage VBAT across the load BAT drops much lower than the reference voltage REF 1 (i.e. the charger is operated at constant current mode), the transistor 430 will be turned-off by the amplifier 460 while the voltage at the node N 1 will be pulled low to GND by the transistor 450 . So, the transistors 410 and 420 will be turned ON and the voltage PROG will be raised up by the current Is. If the voltage PROG becomes higher than the reference voltage REF 2 , driving capabilities of transistors 440 and 450 will be increased and decreased, respectively and simultaneously, to raise the voltage at the node N 1 . After loop regulation performed by the amplifier 470 , the voltage PROG is almost the same as the reference voltage REF 2 , i.e. Is≈REF 2 /R 480 (R 480 referring to resistance of the resistor 480 ). In this embodiment, the size ratio (i.e. W/L ratio of channel) between the transistor 410 and the transistor 420 is 1000:1. So that, I CHG ≈1000*Is≈1000*(REF 2 /R 480 ). This means, under constant current mode, the charge current I CHG will be limited.

FIG. 5 shows a circuit diagram of the current amplifier 470 in FIG. 4 . As shown in FIG. 5 , the current amplifier 470 includes: current sources 510 , 520 and 530 ; a current mirror 550 ; transistors 540 , 560 , 570 and 580 .

The transistor 570 , for example, a PMOS transistor, has a source terminal coupled to the constant current source 510 , a gate terminal being as the second input terminal of the constant current amplifier 470 , and a drain terminal coupled to the constant current source 520 .

The transistor 580 , for example, a PMOS transistor, has a source terminal coupled to the constant current source 510 , a gate terminal being as the first input terminal of the constant current amplifier 470 , and a drain terminal coupled to the constant current source 530 .

The transistor 540 , for example, a PMOS transistor, has a source terminal coupled to the power supply VC, a gate terminal being as the first output terminal of the constant current amplifier 470 , and a drain terminal coupled to the constant source 520 . Besides, the drain terminal of the transistor 540 is further coupled to the gate terminal thereof. The transistor 540 and the transistor 440 form a current mirror.

The transistor 560 , for example, an NMOS transistor, has a source terminal coupled to GND, a gate terminal for being as the second output terminal of the constant current amplifier 470 , and a drain terminal coupled to the gate terminal thereof.

The current mirror 550 is coupled to the power supply VC, the constant current source 530 , and the drain terminal of the transistor 560 . The first current mirror 550 includes: transistors 551 and 552 . The transistor 551 , for example, a PMOS transistor 551 , has a source terminal coupled to the power supply VC, a gate terminal coupled to the constant current source 530 , and a drain terminal coupled to the constant current source. The transistor 552 , for example a PMOS transistor, has a source terminal coupled to the power supply VC, a gate terminal coupled to the constant current source 530 , and a drain terminal coupled to the drain terminal of the transistor 560 .

Second Embodiment

FIG. 6 shows a constant current, constant voltage and constant temperature current supply of a charger according to a second embodiment of the invention. In the first and second embodiment, similar elements have similar reference symbols and the details are omitted for simplification.

In the second embodiment, a constant power controller 690 is used for generating and controlling the reference voltage REF 2 to achieve thermal regulation. In constant current phase, the driving transistor 610 may dissipate several watts of power and cause a surge in die temperature. To prevent thermal run away, power dissipation of the driving transistor 610 must be limited when the die temperature reached a preset value Tp. If the die temperature increased above Tp, the constant power controller 690 will pull low the reference voltage REF 2 to reduce the charge current I CHG provided by the driving transistor 610 . This will reduce the power dissipated by the driving transistor 610 and accordingly lower the die temperature to Tp.

FIG. 7 and FIG. 8 show two examples of the constant power controller 690 .

Refer to FIG. 7 , the constant power controller 690 includes: operation amplifiers 710 and 720 ; transistors 730 and 740 ; and a voltage divider including resistors 750 and 760 .

The operation amplifier 710 has a first input terminal coupled to still another reference voltage REF 3 , a second input terminal coupled to the transistor 730 and the voltage divider and an output terminal coupled to the transistor 730 . The output of the operation amplifier 710 controls driving capability of the transistor 730 .

The transistor 730 , for example a PMOS transistor, has a source terminal coupled to the power supply VC, a gate terminal coupled to the output terminal of the operation amplifier 710 , and a drain terminal coupled to the second input terminal of the operation amplifier 710 .

The operation amplifier 720 has a first input terminal coupled to yet another reference voltage REF 4 , a second input terminal coupled to a positive temperature coefficient voltage V PTAT and an output terminal coupled to the transistor 740 . The output of the operation amplifier 720 controls driving capability of the transistor 740 . For example, when the die temperature is lower than Tp, the reference voltage REF 4 is higher than the positive temperature coefficient voltage V PTAT , so that the transistor 740 is OFF. On the contrary, when the die temperature is above Tp, the positive temperature coefficient voltage V PTAT may raise higher than the reference voltage REF 4 , so that the transistor 740 is turned ON. The more the die temperature is above Tp, the stronger the driving capability transistor 740 has.

The transistor 740 , for example an NMOS transistor, has a source terminal coupled to GND, a gate terminal coupled to the output terminal of the operation amplifier 720 , and a drain terminal coupled to the reference voltage REF 2 .

The voltage divider has serially-connected resistors 750 and 760 .

When the die temperature is below Tp, the transistor 730 is ON while the transistor 740 is OFF. The voltage divider is for dividing a voltage at the second input terminal of the operation amplifier 710 to provide the reference voltage REF 2 . In other words, under this case, REF 2 =REF 3 *R 760 /(R 760 +R 750 ), wherein R 750 and R 760 refer to resistances of resistors 750 and 760 respectively.

On the other hand, when the die temperature rises above Tp, the reference voltage REF 2 is pulled low by the transistor 740 (i.e. REF 2 =V DS of the transistor 740 under this case). As known, after the loop becomes stable by the current amplifier 670 (refer to FIG. 6 ), PROG=REF 2 and Is =PROG/R 680 (R 680 refers to resistance of the resistor 680 ). So if the reference voltage REF 2 is lowered, then the current Is is lowered, and accordingly the charge current I CHG is also lowered. In other words, when the die temperature rises above Tp, the charge current I CHG is lowered and accordingly the power dissipation of the driving transistor 610 is reduced, so that the die temperature is to be kept constantly at Tp.

Refer to FIG. 8 , the constant power controller 690 includes: operation amplifiers 810 and 820 ; transistors 830 , 840 , 841 , 870 and 880 ; and a voltage divider. In FIG. 7 and FIG. 8 , similar elements have similar reference symbols and their detailed description is omitted here.

The transistor 841 , for example an NMOS transistor, has a source terminal coupled to GND, a gate terminal coupled to the output terminal of the operation amplifier 820 , and a drain terminal coupled to the gate terminals of the transistors 870 and 880 .

The transistors 870 and 880 form a current mirror, which is coupled to the power supply VC, the second input terminal of the operation amplifier 810 , and the drain terminal of the transistor 841 .

The voltage divider has resistors 851 , 850 and 860 . The resistor 851 is coupled between the drain terminal of the transistor 830 and the second input terminal of the operation amplifier 810 .

When the die temperature is below Tp, the transistor 830 is ON while the transistors 840 , 841 , 870 and 880 are OFF. The voltage divider is for dividing a voltage at the second input terminal of the operation amplifier 810 to provide the reference voltage REF 2 . In other words, under this case, REF 2 =REF 3 *R 860 /(R 860 +R 850 +R 851 ), wherein R 850 , R 860 and R 851 refer to resistances of resistors 850 , 860 and 851 respectively.

If the die temperature rises above Tp, both transistors 840 and 841 turn on. The turn-on of transistor 840 is for pulling down the reference voltage REF 2 and accordingly reduce the charge current I CHG provided by the driving transistor 610 . The turn-on of transistor 841 is for creating a current flowing through transistor 870 . This current is mirrored by transistor 880 into a pull-up current I 880 , where I 880 is the current flowing through the channel of transistor 880 . I 880 will create a voltage drop on resistor 851 , pulling up the voltage at node N 2 to above the reference voltage REF 3 . In response to this change in input offset voltage, amplifier 810 will increase its output voltage and reduces the driving capability of transistor 830 until the voltage at node N 2 equals REF 3 . This process continues with rising temperature until transistor 830 is fully turned off.

Further, under high temperature case, the current flowing through the transistor 840 , which is I 880 , is smaller than the current flowing through the transistor 740 , which is REF 3 /R 750 . In other words, under high temperature case, the reference voltage REF 2 in FIG. 8 is lower than the reference voltage REF 2 in FIG. 7 .

Refer to FIG. 4 and FIG. 6 , resistors 480 and 680 are external components. So, a pole P 1 is created by resistors 480 and 680 and the parasitic capacitor at node PROG. Since resistors 480 and 680 are used for charge current programming, their resistance can have hundreds of times of variation. So, frequency of the pole P 1 also has hundreds of times of variation. Therefore, P 1 is not suitable as the dominant pole in the constant current regulation loop and an additional pole P 2 is needed to serve as the dominant pole. Since P 1 is not a dominant pole, it must be located above the unity gain frequency to ensure stability. One way to achieve this is pushing the dominant pole P 2 to very low frequency. However, this requires a large capacitor to generate P 2 . A way for small chip size is using a low gain amplifier for current amplifiers 470 and 670 . However, a low gain amplifier is susceptible to offset voltage. Therefore, in the embodiment, current amplifiers 470 and 670 are designed such that the outputs of amplifiers 470 and 670 simultaneously control the pulling high transistors 440 , 640 and the pulling low transistors 450 , 650 . This forms a class-AB stage and a minimum offset can be achieved with low gain amplifier. On the other hand, outputs of the voltage amplifiers 460 and 660 control the pulling high transistors 430 and 630 , which forms a class-A stage. However, the voltage amplifiers 460 and 660 may be high gain voltage amplifiers to reduce offset from class-A output stage thereof. Accompanied with the current amplifiers 470 and 670 having Class-AB output stage and the voltage amplifiers 460 and 660 having high gain voltage, better performance in current/voltage accuracy, small circuit size and common pole for AC compensation may be achieved according to embodiments of the invention. Other advantages of the above embodiment are for example, offset reduction in both CC mode and CV mode, and easy AC compensation.

FIG. 9 shows characteristic curve diagram for the charge current I CHG . The current flowing through the transistors 740 and 840 is PTAT (proportional to absolute temperature), which linearly pulls the reference voltage REF 2 to nearly ground (exactly, V DS of the transistors 740 and 840 ) when the die temperature of the charger is above a preset value (ex. 118° C.). Since I CHG =1000*REF 2 /R 480 , the charge current I CHG decreases linearly to 0.

Refer to FIG. 5 , FIG. 7 and FIG. 8 . When thermal regulation is in function, the reference voltage REF 2 is pulled down by transistors 740 and 840 toward ground. The amplifier as shown in FIG. 5 has input dynamic range down to ground and functions well when the reference voltage REF 2 is pulled toward zero.

Refer to FIG. 6 , the constant power controller 690 is not directly coupled to the node N 1 . This simplifies AC compensation since node N 1 is controlled by transistors 630 , 640 and 650 , no matter the constant power controller 690 is in function or not.

When the reference voltage REF 2 decreases to a value such that the NMOS transistors 740 and 840 enter linear region, the decrease rate of the reference voltage REF 2 (i.e. the charge current I CHG ) will slow down and the reference voltage REF 2 (i.e. the charge current I CHG ) never goes zero. However, this situation only occurs at very high ambient temperature where a typical rechargeable battery can not survive. Therefore, in typical application it does not have to care about the condition where the charge current I CHG does not go zero.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing descriptions, it is intended that the present invention covers modifications and variations of this invention if they fall within the scope of the following claims and their equivalents.