Low voltage shutdown circuit

This application claims the benefit of provisional patent application No. 60/890,674 to Nathan R. Carter and Yu-lun Richard Lu, filed Feb. 20, 2007.

1. Field of the Invention

This invention relates generally to circuits which monitor a voltage or current and generate a shutdown signal when the monitored parameter falls below a threshold value.

2. Description of the Related Art

Many electronic circuits require a means of shutting down when a particular voltage or current falls below a defined threshold point. However, it can be difficult to shut down the circuit when there is little or no current available and at the same time have a defined threshold point that is compatible with various logic standards and consistent across temperature and process.

A low voltage shutdown circuit is presented which overcomes the problems noted above, providing a precise and repeatable threshold even when the available current is as low as 1 μA or less.

The present low voltage shutdown circuit, comprises an input node for receiving a voltage V in to be monitored, first and second voltage-to-current (V to I) converters arranged to receive V in at respective inputs and to convert V in to currents I 1 and I 2 at respective outputs, and a current comparison circuit arranged to produce an output which is in a first state when I 1 <I 2 and in a second state when I 1 >I 2 . The V to I converters are arranged such that their respective voltage-to-current transfer functions intersect at a non-zero threshold voltage V th . When so arranged, the current comparison circuit output toggles when V in falls below V th . This output can thus be used as needed to, for example, trigger the shut down of other circuitry.

These and other features, aspects, and advantages of the present invention will become better understood with reference to the following drawings, description, and claims.

FIG. 1 is a block diagram illustrating the principles of a low voltage shutdown circuit per the present invention.

FIG. 2 is a plot of one possible pair of voltage-to-current transfer functions for respective V to I converters as might be employed per the present invention.

FIG. 3 a is a schematic diagram of one possible implementation of a V to I converter per the present invention.

FIG. 3 b is a schematic diagram of another possible implementation of a V to I converter per the present invention.

FIG. 3 c is a schematic diagram of one possible implementation of first and second V to I converters per the present invention.

FIG. 4 is a schematic diagram of another possible implementation of first and second V to I converters per the present invention.

FIG. 5 is a plot of one possible pair of voltage-to-current transfer functions as might be provided by the V to I converters of FIG. 4 .

FIG. 6 a is a schematic diagram of one possible implementation of first and second V to I converters, and a current comparison circuit, per the present invention.

FIG. 6 b is a schematic diagram of another possible implementation of first and second V to I converters, and a current comparison circuit, per the present invention.

FIG. 7 is a schematic diagram showing a bias current generating circuit which might be used with a low voltage shutdown circuit per the present invention.

The present low voltage shutdown circuit provides a means of monitoring a voltage or current and generating a shutdown signal when the monitored parameter falls below a defined threshold. The circuit is capable of providing a precise and repeatable threshold even when the available current is as low as 1 μA or less.

The basic principles of a low voltage shutdown circuit in accordance with the present invention are shown in FIG. 1 . A parameter to be monitored, here, a voltage V in , is applied to an input node 10 . Alternatively, a current to be monitored can be applied at node 10 , in which case a resistor would be connected in series with node 10 such that voltage V in appears at the node in response to the current.

First and second V to I converters 12 , 14 receive V in at respective inputs 16 , 18 , and convert V in to currents I 1 and I 2 at respective outputs 20 , 22 . Converters 12 and 14 have respective voltage-to-current transfer functions; exemplary plots of V in versus I 1 and V in versus I 2 are shown in FIG. 2 . The converters are arranged such that their respective transfer functions intersect at a defined non-zero threshold voltage, referred to herein as V th .

The present shutdown circuit also includes a current comparison circuit 24 , which receives I 1 and I 2 at respective inputs 26 , 28 , and is arranged to produce an output 30 (SHUTDOWN) which is in a first state when I 1 <I 2 and in a second state when I 1 >I 2 . When so arranged, current comparison circuit output 30 toggles when V in falls below V th ; this output can then be used as needed to, for example, trigger the shut down of other circuitry, such as a bias current generating circuit.

Exemplary implementations of V to I converters 12 and 14 are shown in FIGS. 3 a - 3 c and FIG. 4 . For example, FIG. 3 a depicts a basic current mirror consisting of a first bipolar transistor 40 and a second bipolar transistor 42 . A resistor 44 is connected in series with V in so that a current I in which varies with V in is provided to the input side of the mirror. When so arranged, the output current (here labeled as I 1 ) varies with V in , thereby forming a V to I converter such as converter 12 .

Another possible V to I converter implementation is shown in FIG. 3 b . This converter is similar to that shown in FIG. 3 a , in that it consists of first and second bipolar transistors 50 and 52 , and a resistor 54 connected in series with V in . However, here, a degeneration resistor 56 is connected in the emitter circuit of transistor 52 . When so arranged, the output current (here labeled as I 2 ) varies with V in , thereby forming a V to I converter such as converter 14 .

In addition, assuming that the V to I converter of FIG. 3 a is used to produce I 1 , the emitter size of transistor 52 is made larger than that of transistor 42 . The addition of emitter degeneration resistor 56 and the difference in emitter sizes will make the voltage-to-current transfer function of the FIG. 3 b circuit different from that of the FIG. 3 a circuit. In this case, current I 2 will increase faster than current I 1 when V in starts to increase, due to the larger emitter area of transistor 52 . However, the I 2 curve will flatten out with increasing V in due to the degeneration resistor, whereas the I 1 current in FIG. 3 a will increase linearly with V in . When the converters of FIGS. 3 a and 3 b are so arranged, their respective transfer functions will resemble those shown in FIG. 2 , such that they intersect at a non-zero threshold voltage V th which can be set as needed for a particular application. Current comparison circuit 24 is then arranged to compare I 1 and I 2 , and to generate a shutdown signal when the currents indicate that V in has fallen below V th .

FIG. 3 c depicts an implementation which includes both V to I converters 12 and 14 . Here, a single diode-connected bipolar transistor 60 is used to generate both I 1 and I 2 ; V in is connected to transistor 60 via a resistor 62 as before. Current I 1 is generated with a transistor 80 connected to form a current mirror with transistor 60 , and a transistor 82 is connected to conduct I 2 . In this example, the V to I transfer functions are differentiated by making the emitter area of the transistor 82 conducting I 2 greater than that of the transistor 80 conducting I 1 , and by connecting a degeneration resistor 84 in the emitter circuit of transistor 82 . As discussed above, the difference in transistor sizes and the degeneration resistor cause the respective voltage-to-current transfer functions to differ, and to intersect at a non-zero threshold voltage V th when the components of FIG. 3 c are properly selected.

Note that there are many other ways in which the required V to I converters could be implemented. It is only necessary that the voltage-to-current transfer functions of the two V to I converters be different and arranged to intersect at a defined threshold voltage.

In very low power applications, it may be useful to keep the current drawn by the shutdown circuit to a minimum. For the implementations discussed above, the current drawn by transistors with an emitter degeneration resistor will flatten out with increasing V in , but the current drawn by the other, non-degenerated transistor will increase linearly with V in . The implementation of V to I converters 12 and 14 shown in FIG. 4 enables the current drawn by the shutdown circuit to be reduced with respect to the implementations described above. Here, V in is applied to resistors 90 and 92 connected in series between V in and a node 94 . A bipolar transistor 96 is connected between node 94 and a circuit common point, with the transistor's base coupled to the junction ( 98 ) between resistors 90 and 92 . A bipolar transistor 100 is connected to form a current mirror with transistor 96 and conducts current I 1 , and a bipolar transistor 102 has its base connected to node 94 and its emitter connected to common and conducts current I 2 ; the emitter area of the transistor 102 should be larger than that of the transistor 100 .

The operation of the circuit of FIG. 4 is illustrated in FIG. 5 . As V in increases, current starts flowing through diode-connected transistor 96 , and is mirrored to transistors 100 and 102 . For smaller values of V in , there is not much current flowing through resistor 92 , so the voltage drop across resistor 92 is small and therefore the current through transistor 102 is almost equal to that through transistor 96 . Therefore, as V in increases, the current through transistor 102 is also increasing. Because transistor 102 is larger than transistor 100 , I 2 increases more rapidly than I 1 when V in first starts to increase. However, as V in continues increasing, it will reach a point such that the increasing current through resistor 92 causes the voltage drop across it to become significant. This causes the base-emitter voltage of transistor 102 to decrease, and consequently the current through transistor 102 . In this way, the total current drawn by the shutdown circuit is reduced. The emitter of transistor 102 is preferably larger than the emitters of transistors 100 and 96 , such that I 2 increases more rapidly than I 1 when V in first starts to increase.

One possible implementation of current comparison circuit 24 is shown in FIG. 6 a . In this example, V to I converters 12 , 14 are as shown in FIG. 3 c . The combination of resistor 62 , transistor 60 and transistor 82 produces a current (I 1 ) which is generally linear with V in , while the combination of resistor 62 , transistor 60 , transistor 80 and resistor 84 produces a current (I 2 ) which is non-linear with V in , such that the respective V to I profiles intersect at threshold voltage V th (as shown in FIG. 2 ).

Currents I 1 and I 2 are compared using current comparison circuit 24 . One possible implementation for current comparison circuit 24 is a simple current mirror, as shown in FIG. 6 a . Here, a diode-connected transistor 110 is connected to conduct I 1 , and a transistor 112 is connected to form a VDD-referred current mirror with transistor 110 and to conduct I 2 , with the junction 114 of transistors 112 and 80 serving as the SHUTDOWN output of the current comparison circuit. Assuming that transistors 110 and 112 form a 1:1 current mirror, the SHUTDOWN signal will be a positive current when I 1 >I 2 . However, when I 1 is less than or equal to I 2 , indicating that V in ≦V th , there is no current available for the SHUTDOWN signal. Thus, the presence or absence of a positive SHUTDOWN current indicates when V in has fallen below V th .

The threshold voltage can be adjusted by, for example, changing the ratio between the mirror transistors. For example, if transistors 110 and 112 are arranged to form a 2:1 current mirror, the SHUTDOWN signal will be a positive current when I 1 >2*I 2 , and will be zero otherwise.

The SHUTDOWN signal can be used to, for example, control the operation of a bias current generating circuit 116 which is used to generate bias currents for circuitry which is not shown. Thus, for this exemplary application, when V in falls below V th , SHUTDOWN causes bias current generating circuit 116 to shut down.

An alternative implementation of current comparison circuit 24 is shown in FIG. 6 b , made up of transistors 120 , 122 , 126 and 128 . Transistors 120 and 122 form a first VDD-referred current mirror, which mirrors current I 2 to a node 124 . Transistors 126 and 128 form a second current mirror, the input of which (node 124 ) is connected to current I 1 . In operation, first mirror 120 / 122 serves to compare I 2 with I 1 , with the result being fed to the input of the second mirror. The output of the second mirror serves as the SHUTDOWN output of the current comparison circuit.

In the exemplary embodiment shown, the emitter area of transistor 120 is 3 times that of transistor 122 . Thus, when I 1 >3*I 2 , the difference between I 1 and 3*I 2 is delivered to node 124 and mirrored to the SHUTDOWN output by the second current mirror ( 126 / 128 ). However, when I 1 falls below 3*I 2 , indicating that V in <V th , there is no current available to be mirrored to SHUTDOWN. Thus, the presence or absence of a positive SHUTDOWN current indicates when V in has fallen below V th . Note that the magnitude of the SHUTDOWN current can be scaled by adjusting the ratio between transistors 126 and 128 .

Note that the implementation of current comparison circuits 24 shown in FIGS. 6 a and 6 b are merely exemplary; it is only necessary that the comparison circuit produce an output that toggles when V in falls below V th .

The present shutdown circuit is well-suited for use with a bias current generating circuit 116 such as that shown in FIG. 7 . Here, transistors 140 , 142 , 144 and 146 form a bandgap voltage source, with transistor 146 providing a current which is proportional-to-absolute current (PTAT) and transistor 148 providing a current which is complementary-to-absolute current (CTAT); these currents are summed together in transistor 142 and provided at a node 149 . When the base of transistor 148 is coupled to the collector of transistor 144 , a loop is formed which results in the current at node 149 being relatively constant with temperature. Here, that coupling is effected with a switch formed by transistors 148 and 150 . When the SHUTDOWN signal is a positive current, indicating that V in >V th , transistor 148 is turned on and the feedback loop is closed, thereby enabling the bandgap voltage source to operate. The diode connection around transistor 142 closes the loop on the top side, while the switch circuit (transistors 148 and 150 ) closes the loop on the bottom side. The base of transistor 150 is modulated using the internal feedback of the loop to sink the excess current received via SHUTDOWN. When the loop is operating, a largely temperature-insensitive current produced at node 149 can be used to drive additional transistors ( 154 ) to produce bias currents as needed. When SHUTDOWN goes to zero, indicating that V in >V th , the loop current falls to zero along with the bandgap voltage.

The embodiments of the invention described herein are exemplary and numerous modifications, variations and rearrangements can be readily envisioned to achieve substantially equivalent results, all of which are intended to be embraced within the spirit and scope of the invention as defined in the appended claims.