Demodulator with output level calibration

The present invention relates to a calibration circuit and a calibration method thereof, and more particularly, to a calibration circuit for calibrating an output level of a demodulator, and a calibration method thereof.

An FM demodulator demodulates FM signals into audio signals, and controls volume of the audio signals to be played to users. The volume control of the audio signals depends on the signal quality of the FM signals. When signal strength of the FM signal is weak (the signal-to-noise ratio of the FM signal is less than a certain threshold), the FM demodulator attenuates its output (i.e. the audio signals) to decrease noise effect. This operation is referred to as “soft mute”.

Traditionally, as shown in FIG. 1 , an FM demodulator 110 is coupled to an amplifier 120 and a received signal strength indicator (RSSI) module 130 to receive an FM signal amplified by the amplifier 120 and signal strength of the FM signal detected by the RSSI module 130 . In the RSSI module 130 , a comparator 132 compares a RSSI signal S FM generated by a RSSI unit 131 with a reference signal S ref generated by a reference voltage source 133 . When the signal strength of the S FM is equal to the strength of the reference signal S ref , the RSSI module 130 outputs a control signal to the FM demodulator 110 to start the soft-mute function, i.e. to start to attenuate the audio signal.

The attenuation degree of the audio signal can be represented by a chart, as shown in FIG. 2 . The real line in FIG. 2 shows an ideal soft-mute curve, showing that the soft-mute function starts at a selected point S 1 and attenuates the audio signals according to a specific slope. The process variations of the FM demodulator 110 , the amplifier 120 and the RSSI module 130 , however, affect the start point and the slope of the ideal soft-mute curve. The practical attenuation executed by the FM demodulator 110 is represented by the dotted lines shown in FIG. 2 . The input voltage offsets of the FM demodulator 110 , the comparator 132 , the reference voltage source 133 and buffers in the RSSI unit 131 cause the start point to drift away from S 1 . The gain variations of the FM demodulator 110 , the amplifier 120 and the comparator 132 result in slope variation. As the practical soft-mute result varies from the ideal design, the audio signal output from the FM demodulator 110 cannot be optimum.

One objective of the present invention is therefore to provide a calibration circuit for calibrating an output level of a demodulator, and a calibration method thereof. By introducing a test signal with known signal strength, the calibration circuit can compensate the control signal of the RSSI module, and calibrate the output level of the demodulator, thereby resolving the above problems.

According to an exemplary embodiment of the present invention, a calibration circuit for calibrating an output level of a demodulator is disclosed. The calibration circuit comprises a test signal generator, a RSSI module and a calibration module. The test signal generator generates a test signal, and the RSSI module detects the test signal to generate a control signal, wherein the control signal controls the demodulator to process the test signal to generate an output signal. The calibration module then calibrates the RSSI module according to the output signal in order to calibrate the output level of the demodulator.

According to another exemplary embodiment of the present invention, a method of calibrating an output level of a demodulator controlled by an RSSI module is disclosed. The method comprises generating a test signal, detecting the test signal with the RSSI module to generate a control signal, processing the test signal with the demodulator according to the control signal to generate an output signal, and calibrating the RSSI module according to the output signal in order to calibrate the output level of the demodulator.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

FIG. 1 is a block diagram showing an FM demodulator coupled to an amplifier and a received signal strength indicator module.

FIG. 2 shows ideal and practical soft-mute functions of the demodulator.

FIG. 3 is a block diagram of a calibration circuit implemented to calibrate an output level of a demodulator according to an exemplary embodiment of the present invention.

FIG. 4 is a detailed diagram of the calibration circuit shown in FIG. 3 according to an exemplary embodiment of the present invention.

FIG. 5 shows an output circuit of the demodulator according to an exemplary embodiment of the present invention.

FIG. 6 shows a modified output circuit of the demodulator according to an exemplary embodiment of the present invention.

Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

FIG. 3 is a block diagram of a calibration module 310 implemented to calibrate an output level of a demodulator 320 according to an exemplary embodiment of the present invention. The demodulator 320 demodulates an input down-conversion signal to generate an output signal according to a control signal of the RSSI module 350 . The calibration module 310 calibrates the output level of the demodulator 320 by calibrating the RSSI module 350 according to the output signal. Referring to the input-output relationship curves shown in FIG. 2 , it is found that a first predetermined signal strength S 1 corresponds to a specific characteristic of the ideal curve, e.g. the turning point, and a second predetermined signal strength S 2 corresponds to another specific characteristic of the curve, e.g. the slope. Therefore, when the output levels of these two input signal strengths S 1 and S 2 are calibrated, the output level of the demodulator 320 is calibrated.

In one embodiment, the calibration of the output level of the demodulator 320 roughly includes two stages: calibrating the input offset (first calibration stage) and calibrating the gain variation (second calibration stage). The present invention, however, is not limited to take place in two stages. The first or second calibration stage being performed separately to obtain better demodulation performance also belongs to the scope of the present invention.

In the first calibration stage, in order to calibrate the input offset of the demodulator 320 and the RSSI module 350 , a test signal with predetermined signal strength S 1 (i.e. the desired input signal strength at which the demodulator 320 starts to adjust its output signal strength) is provided by the test signal generator 360 . Please refer to FIG. 4 . The test signal generator 360 includes an oscillator 362 and an adjusting circuit 364 , wherein the oscillator 362 generates a down-conversion signal, and the adjusting circuit 364 controls amplitude of the down-conversion signal in order to form a test signal with specific frequency band and signal strength S 1 . The test signal generator 360 and the demodulator 320 can be built in a same chip to decrease production cost and simplify the manufacturing process. For example, an internal oscillator is adopted in the chip as the oscillator 362 . Please note that this is only an embodiment, and not a limitation of the present invention.

A multiplexer 330 selects and outputs the test signal to the amplifier 340 , and the test signal is then sent to a RSSI unit 351 of the RSSI module 350 . The RSSI module 350 compares the output signal generated by the RSSI unit 351 with a reference signal generated by a reference voltage source 352 . The difference between the RSSI module 350 and the conventional RSSI module shown in FIG. 1 is that the reference voltage source 352 is adjustable. For example, it can be a digital-to-analog converter controlled by the calibration module 310 . The comparator 354 of the RSSI module 350 generates the differential control signal including a first control signal Ct 1 corresponding to the positive control terminal and a second control signal Ct 2 corresponding to the negative control terminal. Then the demodulator 320 processes the test signal received from the amplifier 340 according to the first control signal Ct 1 and the second control signal Ct 2 . More specifically, the demodulator 320 generates a first output signal Out 1 and a second output signal Out 2 according to the first control signal Ct 1 and the second control signal Ct 2 .

FIG. 5 shows an output circuit of the demodulator 320 according to an exemplary embodiment of the present invention. As can be seen from FIG. 5 , the first and the second control signals Ct 1 and Ct 2 enable the transistors Q 1 and Q 2 and conducting currents I 1 and I 2 to generate the first and the second output signals Out 1 and Out 2 at drains of the transistors Q 1 and Q 2 , respectively. If the first control signal Ct 1 is equal to the second control signal Ct 2 , the currents flowing through transistors Q 1 and Q 2 will be the same, and the first and the second output signals Out 1 and Out 2 will also be the same. For this reason, in this embodiment, the calibration module 310 detects the first and second output signals Ou 1 and Out 2 , and adjusts the reference voltage source 352 when the first output signal Out 1 is not equal to the second output signal Out 2 . The adjustment of the reference voltage source 352 is for making the first output signal Out 1 equal to the second output signal Out 2 , which will be achieved when the reference voltage level of the reference voltage source 352 has been calibrated to have the value S 1 .

In one embodiment, the calibration module 310 includes a comparator 312 and a controller 314 . The comparator 312 determines if the first output signal Out 1 is equal to the second output signal Out 2 , and then delivers the comparing result to the controller 314 . When the comparing result indicates that the first output signal Out 1 is not equal to the second output signal Out 2 , the controller 314 (a successive approximation register (SAR) in this embodiment) gradually adjusts the reference voltage source 352 (which will change the second control signal Ct 2 and the second output signal Out 2 correspondingly) until the comparator 312 has detected that the first output signal Out 1 is equal to the second output signal Out 2 . In this way, the reference voltage level of the RSSI module 350 is calibrated to be close to the predetermined value S 1 , and the input offset is thereby compensated.

In the second calibration stage, the calibration module 310 compensates the gain variation caused by the demodulator 320 , the amplifier 340 and the comparator 354 by calibrating output gain of the RSSI module 350 . Firstly, a test signal with predetermined signal strength S 2 is generated. The comparator 354 compares the test signal with the reference signal, which has been calibrated to have the desired reference voltage level S 1 in the first calibration stage. The comparator 354 then generates the differential output signal of a first control signal Ct 1 and a second control signal Ct 2 to the demodulator 320 . Since the signal strength S 2 of the test signal is lower than that of the reference signal, the current I 1 flowing through the transistor Q 1 is greater than the current I 2 flowing through the transistor Q 2 ; that is, the second output signal Out 2 will always be larger than the first output signal Out 1 . Therefore, in this situation, the calibration module 310 cannot utilize a simple comparator that can only detect whether the first and the second output signals are equal to each other. A more complex comparator, such as an analog-to-digital converter, is required. In order to solve this problem to reduce the production cost, a circuit is provided as shown in FIG. 6 . An impedance (a resistor in this embodiment) R 2 is coupled to the drain of the transistor Q 1 to let the total impedance coupled to the drain of the transistor Q 1 be less than the impedance coupled to the drain of the transistor Q 2 . As a result, even though the current I 1 is always larger than the current I 2 , the output signals Out 1 and Out 2 can still be the same. The structure and computation complexity of the calibration module 310 can therefore be reduced because a simple comparator can be adopted. In one embodiment, the impedance of R 1 parallel to R 2 (R 1 //R 2 ) is designed to be the impedance of R 1 multiplied by a factor (−A), where A is the desired slope determined by S 1 and S 2 as shown in FIG. 2 .

The demodulator generates the first output signal Out 1 and the second output signal Out 2 according to the first control signal Ct 1 and the second control signal Ct 2 . The comparator 312 then determines if the first output signal Out 1 is equal to the second output signal Out 2 . When the comparing result indicates that the first output signal Out 1 is not equal to the second output signal Out 2 , the controller 314 adjusts gain of the comparator 354 , which is implemented by a programmable gain amplifier (PGA) in this embodiment. When the gain of the comparator 354 has been adjusted to let the first output signal Out 1 be equal to the second output signal Out 2 , the gain variation is compensated, and the second calibration stage is complete. The impedance R 2 is then decoupled from the transistor Q 1 , and the multiplexer 330 changes to input the down-conversion signal rather than the test signal to the amplifier 340 in order to switch the system back to the normal operation mode.

In another embodiment, an output stage (for example, an amplifier) of the demodulator 320 is segmented from the demodulator 320 to become a circuit connected after the demodulator 320 . The control signal of the RSSI module 350 controls the output stage, and the calibration module 310 calibrates the RSSI module 350 according to the output signal of the output stage. The output level of the demodulator can be calibrated as well.

In the above embodiments, by comparing the output signal with a predetermined reference, and compensating the control signal of the RSSI module according to the comparing result, the output level of the demodulator can be calibrated. When the control signal is for selectively enabling or disabling a soft-mute attenuation implemented in the demodulator 320 , the problems met by the prior arts (e.g. the practical soft-mute result varies from the ideal design) can be resolved. The audio signal output from the demodulator 320 is therefore optimum.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.