USPatent applicationPatented

Battery testing apparatus

Granted 14 Aug 2012 · 2 office actions

Life of the application

12 dated events
⤢ drag to zoom20082010201220142016201820202022202420262028ProsecutionOwnershipTerm & fees
ProsecutionOwnershipTerm & feeshover for detail · click to open

Abstract

A battery testing apparatus includes a charge circuit, a discharge circuit, a computer, and a control circuit. The charge circuit is coupled to a direct current (DC) adapter, the DC adapter charges a battery through the charge circuit. The discharge circuit is coupled to the battery and configured to discharge the battery. The computer records charge/discharge time and charge/discharge cycles of the battery, and calculates capacity and cycle life of the battery according to the time and cycles of charge and discharge. The control circuit has an input terminal coupled to the computer, and a plurality of output terminals respectively coupled to the charge circuit and the discharge circuit, the control circuit controls the charge and discharge circuits charging and discharging the battery.

Description

4 parts
›BACKGROUND

1. Field of the Invention

The present invention relates to testing apparatuses, and particularly to a battery testing apparatus for testing parameters and functions of a battery.

2. Description of Related Art

Storage batteries are often used for providing power to various pieces of equipment. Electronic equipment such as mobile phones and notebooks require high quality storage batteries. So the storage batteries need to be tested before being used in these electronic equipment. In general, testers need to test parameters and functions of the storage batteries such as cycle life, capacity, short-circuit protection (SCP), and under-voltage protection (UVP). However, conventional testing apparatuses only test a single parameter or function of a storage battery. Therefore a plurality of testing apparatuses are needed to complete testing.

What is needed, therefore, is to provide a battery single testing apparatus which can test cycle life, capacity, SCP, and UVP of a battery.

›SUMMARY

An exemplary battery testing apparatus includes a charge circuit, a discharge circuit, a computer, and a control circuit. The charge circuit is coupled to a direct current (DC) adapter, the DC adapter charges a battery through the charge circuit. The discharge circuit is coupled to the battery and configured to discharge the battery. The computer records charge/discharge time and charge/discharge cycles of the battery, and calculates capacity and cycle life of the battery according to the time and cycles of charge and discharge. The control circuit has an input terminal coupled to the computer, and a plurality of output terminals respectively coupled to the charge circuit and the discharge circuit, the control circuit controls the charge and discharge circuits charging and discharging the battery.

Other advantages and novel features of the present invention will become more apparent from the following detailed description of preferred embodiment when taken in conjunction with the accompanying drawing, in which:

›BRIEF DESCRIPTION OF THE DRAWING

The drawing is a circuit diagram of an embodiment of a battery testing apparatus in accordance with the present invention.

›DETAILED DESCRIPTION

Referring to the drawing, a battery testing apparatus in accordance with an embodiment of the present invention includes a charge circuit 100 , a discharge circuit 200 , a computer 300 , and a control circuit 400 .

The control circuit 400 includes a single chip microcomputer (SCM) U 1 and a relay. The SCM U 1 is an 8051 chip, and has I/O ports P 0 . 0 ˜P 0 . 3 , and P 1 . 0 . The relay includes a coil K 1 and a normally-open contact K 2 , the I/O port P 0 . 3 is coupled to one terminal of the coil K 1 , and another terminal of the coil K 1 is grounded. The I/O port P 0 . 0 and P 0 . 1 are coupled to the charge circuit 100 , the I/O port P 0 . 2 is coupled to the discharge circuit 200 . The I/O port P 1 . 0 is coupled to the computer 300 . In this embodiment, the I/O ports P 0 . 0 ˜P 0 . 3 act as control signal output terminals of the SCM U 1 , and the I/O port P 1 . 0 acts as data input terminal of the SCM U 1 .

The charge circuit 100 includes a charger 110 and a P-channel MOSFET Q 1 . The charger 110 has an input terminal coupled to a direct current (DC) adapter 600 , an output terminal coupled to the source of the MOSFET Q 1 , and a control terminal coupled to the I/O port P 0 . 0 of the SCM U 1 . The drain of the MOSFET Q 1 is coupled to the anode of a battery 500 via the normally-open contact K 2 of the relay, the gate of the MOSFET Q 1 is coupled to the I/O port P 0 . 1 of the SCM U 1 .

The discharge circuit 200 includes an amplifier U 2 , a load 210 , and a P-channel MOSFET Q 2 . The amplifier U 2 has a non-inverting input terminal coupled to the I/O port P 0 . 2 of the SCM U 1 , an inverting input terminal coupled to the drain of the MOSFET Q 2 , and an output terminal coupled to the gate of the MOSFET Q 2 . The drain of the MOSFET Q 2 is grounded via the load 210 , the source of the MOSFET Q 2 is coupled to the anode of the battery 500 via the normally-open contact K 2 of the relay.

In use, the SCM U 1 is activated by the computer 300 , then the SCM U 1 outputs low level control signals to the relay, the charger 110 , and the MOSFET Q 1 . The normally-open contact K 2 of the relay is closed and the MOSFET Q 1 turns on, the charger 110 , the MOSFET Q 1 , and the battery 500 form a charge loop. The DC adapter 600 charges the battery 500 through the charger 110 . When the voltage on the battery 500 rises to equal a charge cut-off voltage, the SCM U 1 outputs a feedback signal to the computer 300 to indicate that charging has completed, and outputs a high level control signal to turn off the MOSFET Q 1 . Then the SCM U 1 outputs a low level control signal to the amplifier U 2 , the MOSFET Q 2 turns on, the load 210 , the MOSFET Q 2 , and the battery 500 form a discharge loop. The amplifier U 2 controls the discharge of current of the load 210 to be through the MOSFET Q 2 . When the voltage on the battery 500 falls to equal a discharge cut-off voltage, the SCM U 1 outputs a feedback signal to the computer 300 to indicate the discharging has completed, and outputs a high level control signal to turn off the MOSFET Q 2 .

During the charging and discharging operation of the battery testing apparatus, the computer 300 records the charge/discharge time, and calculates capacity of the battery 500 by multiplying the charge time and the charge current or multiplying the discharge time and the discharge current. Charging and discharging the battery 500 again and again until the battery 500 holds eighty percent of the primary charge, the computer 300 records the number of cycles as cycle life of the battery 500 . Short-circuit protection (SCP) and under-voltage protection (UVP) functions of the battery 500 are tested by respectively providing an over-current and an under-voltage to the charge circuit 100 and the discharge circuit 200 . During the charging operation, when the over-current is provided to the battery 500 , if the normally-open contact K 2 of the relay is open, the SCP function is working. During the discharging operation, when the under-voltage is provided to the battery 500 , if the normally-open contact K 2 of the relay is open, the UVP function is working. On the other hand, during the charging and discharging operation, when the over-current or under-voltage is provided to the battery 500 , and the normally-open contact K 2 of the relay is closed, the SCP and/or UVP functions are not working.

It is to be understood, however, that even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.

Claims as granted

6 claims

Log in to read the claims of this application.

Log in to unlock

Classifications

4 codes
IPC · International Patent Classification
Section H — Electricity
  • H02J7/00
USPC · US Patent Classification
320/136320/133324/427

Claim changes

Soon
Coming soonHow the claims changed between publication and grant

See which claims were amended, added or cancelled during examination, with every added and removed word marked.

AmendedAddedCancelledUnchanged

The published claims of this application are not paired with the granted ones in what we hold.

File wrapper

⤢ drag to zoomJan 2008Jul 2008Jan 2009Jul 2009Jan 2010Jul 2010Jan 2011Jul 2011Jan 2012Jul 2012USPTOApplicantNon-final rejectionFinal rejection
USPTOApplicanthover for detail · click to open
Pendency
4.6 y
1,691 days filing → grant
Office actions
2
non-final + final
Responses
3
no RCE
Examiner
Edward Tso
art unit 2859 · TC 2800
Citations: 6 back · 1 forward

See the full prosecution history — every USPTO and applicant action on this file, in order.

Log in to unlock

Documents

Log in to open the documents of this file: the application as filed, every office action and response, the notice of allowance.

Log in to unlock

Chain of title

⤢ drag to zoom20082010201220142016201820202022202420262028Owner 1
Titlehover for detail · click to open

See the full assignment history — every owner this patent has passed through, with recordation dates and reel/frame numbers.

Log in to unlock