Boosted write driver for transmission line with reduction in parasitic effect of protection devices

This application claims the benefit of U.S. Provisional Patent Application No. 60/826,260, filed Sep. 20, 2006, the contents of which are hereby incorporated by reference as if fully stated herein.

The present invention relates to a driver for a transmission line in which the driver includes protection devices for the switches therein, and particularly relates to a driver in which the parasitic effects of such protection devices are reduced.

In the continuing effort to increase the storage capacity of hard disk drives, one area of development has focused on decreasing the rise time (or, equivalently, increasing the “slew rate”) of the write current applied to the magnetic head. Generally speaking, if the rise time can be decreased, then it is possible to record more data bits per second on the hard disk drive, resulting in increased storage capacity.

One way in which rise time has been increased is through a preamplifier drive circuit that deliberately boosts the write current above the target value, for a short boost period at the beginning of the write period. During the boost period, the drive circuit provides additional current so as to cause a deliberate (but short) overshoot in the amount of current supplied to the write head. This increased current during the boost period decreases rise time at the write head, and permits increased storage capacity of the disk.

FIG. 1 is a simplified circuit showing this effect, and FIG. 2 is a timing diagram for the FIG. 1 circuitry. In this regard, the invention was developed in connection with a preamplifier for the write head of a hard disk drive, which is an inductive load. It will be appreciated, however, that the invention has application to drive circuits for transmission lines generally, regardless of whether the driven load is or is not the head of a hard disk drive, and regardless of whether the driven load is or is not an inductive load. Accordingly, and unless otherwise noted, this specification will describe the load as a purely resistive load, and the transmission line as any generalized transmission line.

Turning to FIG. 1 , a load R L at the end of a transmission line T L is driven by a drive circuit 1 . Drive circuit 1 includes a pair of series-connected current sources I W connected between positive supply voltage V DD and negative supply voltage V EE . In the case of driving the head of a hard disk drive, these current sources provide a write current. Switch S 2 controls current supplied by the first current source I W , so as to supply a positive-going current to the load R L , and switch S 4 controls current supplied by the second current source I W , so as to supply a negative-going current to load R L . Switch S 1 is operated for a short boost period T B during a positive-going signal period, and switch S 3 is operated for a short boost period T B during a negative-going signal period. A termination resistor R T is provided for impedance-matching to the impedance Z 0 of transmission line T L . (B) signifies a connector between drive circuitry 1 and the transmission line T L .

FIG. 2 is a timing diagram that depicts operation of drive circuitry 1 in FIG. 1 . Because of pervious operations in the circuitry, the timing diagram of FIG. 2 commences at a state in which switches S 1 , S 2 and S 3 are open, and switch S 4 is closed. In this state, the voltage at connector (B) has reached a steady state, corresponding to a desired negative-going current I L flowing through load R L .

At this time, a positive-going current is needed for load R L . Accordingly, switch S 4 is opened, and both of switches S 1 and S 2 are closed. Switch S 2 causes current from current source I W to flow, and switch S 1 causes a boosted current to flow. As a consequence, the voltage at connector (B) rises almost immediately to V DD , which corresponds to a voltage that is V DS higher than the ultimate driving voltage that is needed.

Switch S 1 is maintained in the closed state for a boost period T B that is shorter than the delay time T D of transmission line T L . At the expiration of the boost period T B , switch S 1 is opened, which allows voltage at connector (B) to fall to the needed voltage.

Meanwhile, the applied voltage travels down the transmission line T L where, after the propagation delay of the transmission line, it appears as a boosted current across the load R L . Likewise, after the boost period T B has expired, current I L through the load R L decreases to the intended target of I W .

As a consequence of this operation, there is a decrease in the rise time of current I L through load R L , as measured from its previous value of −I W to the target value of +I W is decreased, relative to the rise time without the boosted signal. This permits higher density recording on a hard disk drive.

In practical devices, switches S 1 through S 4 are implemented in MOS or bipolar transistor fabrication, and such transistors cannot withstand the large voltage swings that occur in the transition between positive-going and negative-going current flow. For example, in the instant between the time where S 4 opens and S 2 closes, switch S 2 will see the entire voltage drop of (V EE -V DD ) across it. MOS or bipolar transistor devices cannot withstand such a large voltage across them without damage.

Accordingly, in real-world devices, a protection device is provided for these switches. FIG. 3 illustrates the use of such a protection device.

FIG. 3 shows only the upper half of driver circuitry 2 , which is largely similar to the upper half of driver circuitry 1 except for the introduction of protection device M 1 . The protection device M 1 is ordinarily a large p-type device, with its gate tied to V SS . The M 1 protection device operates as follows. Consider a situation in which the voltage at connector (B) has been operating at V DD , corresponding to a positive-flowing current, and a transition to a negative-flowing current is desired. In this case, the voltage at connector (B) switches from V DD to V EE (approximately). Without protection device M 1 , switches S 1 and S 2 would see the entire voltage swing of (V EE -V DD ), which might tend to damage the devices. On the other hand, because of the presence of protection device M 1 and because its gate is tied to V SS , the voltage at the source of protection device M 1 (corresponding to point (A)) cannot go below V SS . Thus, the voltage across protection device M 1 is acceptable, and the voltage across switches S 1 and S 2 is also acceptable.

While the protection device M 1 is a desirable addition, its introduction into the drive circuitry causes difficulties. Specifically, the protection device M 1 is a large device since there is an intention to provide large currents (such as 60 milliamps) to the load R L . Because the protection device M 1 is a large device, its parasitic capacitance C 1 is also large. During the boost period T B , switch S 1 is on and the voltages at points (A) and (B) are both raised to V DD , which drives the protection device M 1 in its linear region. After the boost period T B , switch S 1 opens and the voltage at point (B) drops to a value that depends on the impedance Z 0 of the transmission line T L and on the current I W provided by the current source. For typical large values, such as a current I W =40 milliamps to 60 milliamps and impedance Z 0 =approximately 100 ohms, the voltage at point (B) is around 2 volts. Meanwhile, protection device M 1 is still in its linear region. Thus, when a reflection from the load R L arrives back from the transmission line at point (B), it sees the termination resistor R T in parallel with resistor R ON (which is the on-resistance of device M 1 ), plus the parasitic capacitance C 1 . This is no longer a match to the impedance Z 0 of the transmission line T L , and thus causes a pulse-like disturbance whose size is Γ·V DS , as shown in FIG. 2 , where “Γ” is a reflection coefficient. The disturbance is shaped to the same as the boost pulse, and for its part, the disturbance causes an additional re-reflection back to the load R L . This undesirable re-reflection is shown in FIG. 4 .

The present invention addresses the foregoing disadvantageous effect of the prior art, by reducing the parasitic effect of the protection device.

According to one aspect, the invention pulses the gate voltage of the protection device so as to drive the protection device into saturation mode. The pulsing of the protection device occurs at a time when the reflection from the load is expected to arrive back at the driver, but after the boost period has expired.

As a result, since the protection device is driven to saturation during a time when the reflection from the load arrives back at the driver, the device exhibits low parasitic effects, such that the reflection mainly sees only the termination resistance of the driver. Since this is a good match to the impedance of the transmission line, any re-reflection back to the load is largely avoided.

Preferably, the protection device is driven into saturation by the provision of a switch between its gate and source. The switch is timed to operate at a period after the termination of the boost period, but before the arrival of the reflection of the load. If T P is the time after commencement of the boost period T B , and T r is the time that the switch is closed, then:

T B <T P ≦2T D

T r ≦T B

where T D is the propagation delay of the transmission line.

The invention is applicable to drivers for a load of any nature over a transmission line of any nature. For example, the invention is applicable to situations where the load is an inductive load (such as the head of a hard disk drive), or where the product of the driving current and the impedance of the transmission line is large.

This brief summary has been provided so that the nature of the invention may be understood quickly. A more complete understanding of the invention can be obtained by reference to the following detailed description of the preferred embodiment thereof in connection with the attached drawings.

FIG. 1 is a circuit diagram showing a conventional driver for a transmission line, which uses a boost period to decrease rise time.

FIG. 2 is a timing diagram for the circuitry of FIG. 1 .

FIG. 3 is a circuit diagram showing use of a protection device for protecting the semiconductor switches in a conventional driver circuit.

FIG. 4 illustrates a waveform for the conventional circuitry of FIG. 3 .

FIG. 5 is a circuit diagram showing a first embodiment of the invention.

FIG. 6 is a timing diagram showing the effect of the circuit diagram of FIG. 5 .

FIG. 7 is a circuit diagram showing a second embodiment of the invention.

FIG. 8A is a block diagram showing an embodiment of the invention in a hard disk drive.

FIG. 8B is a block diagram of the invention in a DVD drive.

FIG. 8C is a block diagram of the invention in a high definition television (HDTV).

FIG. 8D is a block diagram of the invention in a vehicle control system.

FIG. 8E is a block diagram of the invention in a cellular or mobile phone.

FIG. 8F is a block diagram of the invention in a set-top box (STB).

FIG. 8G is a block diagram of the invention in a media player.

FIG. 5 is a view showing a circuit diagram according to a first embodiment of the invention. For purposes of simplified explanation, the circuit diagram of FIG. 5 shows only the upper portion of driver circuitry 10 . It will be appreciated that similar circuitry is provided for a lower portion of driver circuitry 10 , constituting a section that leads to voltage V EE .

As shown in FIG. 5 , drive circuitry 10 drives a load R L over a transmission line T L . Drive circuitry 10 includes a connector (B) for connection to the transmission line. In one example, the load is an inductive load such as a magnetic head of a hard disk drive, and the transmission line T L is twisted pair, coaxial cabling, flat bonded, flat ribbon, or other suitable transmission line.

The drive circuit includes a termination resistor R T whose impedance preferably matches the impedance Z 0 of the transmission line.

Drive circuitry 10 includes a current source I W connected between V DD and V SS through signal switch S 2 which is a semiconductor switch. Signal switch S 2 controls application of positive-going current to the load R L during a signal period. Boost switch S 1 is also a semiconductor switch and is likewise connected between V DD and V SS . Boost switch S 1 controls a boost current during a boost period T B .

A semiconductor protection device M 1 is provided between semiconductor switches S 1 and S 2 and connector (B), so as to protect semiconductor switches S 1 and S 2 from damage due to large voltage swings. Protection device M 1 may be a BJT (bipolar junction transistor) or a MOS device (PMOS or NMOS). In the example of this embodiment, protection device M 1 is a PMOS device whose source is connected to semiconductor switches S 1 and S 2 and whose drain is connected to connector (B). The gate of protection device M 1 is connected to V SS (which may be AC ground), and is also connected to its source through a semiconductor switch S r which functions as a reflection-suppression switch. The current characteristics of protection device M 1 are ordinarily selected in correspondence to the amount of current being driven to load R L .

The operation of FIG. 5 is shown in the timing diagram and waveforms depicted in FIG. 6 . As shown in FIG. 6 , at the commencement of the signal period, boost switch S 1 and signal switch S 2 are both closed. The boost switch remains closed for a boost period T B , after which the boost switch opens. Signal switch S 2 remains closed for the duration of the signal period. After a time T P , reflection-suppression switch S r is closed and remains closed for a reflection-suppression period T r . In words, the reflection-suppression switch S r is closed after the boost period is completed, and remains closed during a time of the expected return of a reflection of load R L . Thus, the time T P at which reflection-suppression switch S r is closed should satisfy the following condition:

T B <T P ≦2T D ,

which ensures that the reflection-suppression switch S r is closed after the boost period has been completed but before the reflection returns from load R L . In addition, the reflection-suppression switch S r should remain closed for at least a portion of the reflection of the boost signal. Thus, the time T r during which the reflection-suppression switch Sr remains closed should satisfy the condition

T r ≦T B

which ensures that the reflection-suppression switch S r remains closed during at least part of the time that the reflected boost signal is returned from the load, for a duration that corresponds generally to the duration of the boost period.

Because the reflection-suppression switch S r is closed during the reflection of the boost signal, protection device M 1 is operated in the fully saturated mode in which its source is shorted to its gate. As a consequence, the reflected boost signal “sees” a very low parasitic capacitance C P and a very low parasitic ON resistance R ON . Thus, the reflected signal primary “sees” the termination resistor R T , which provides a good match to the impedance of transmission line T L and largely reduces any re-reflection of the boost signal.

This effect is shown in the waveform of I LOAD in FIG. 6 . This waveform shows the current I LOAD flowing through the load R L as a function of time. As seen in FIG. 6 , the current I LOAD shows an accelerated change and decreased rise time in switching away from a negative current −I W toward a positive current flow +I W , due to the boost deliberately injected by boost switch S 1 . Load R L sees this at a delayed time corresponding to the propagation delay T D of the transmission line. Naturally, the boost will be reflected back from the load R L along the transmission line, where it encounters the drive circuitry at connector (B). Impedance mismatches cause a re-reflection. Without the effect of reflection-suppression switch S r , the load would experience a large re-reflection, as shown by the dotted line in the waveform of FIG. 6 . However, because of the effect of reflection-suppression switch S r in driving protection device M 1 into saturation mode, there is very little impedance mismatch, and a consequently smaller re-reflection.

FIG. 7 shows a second embodiment of the invention, in the form of a simplified circuit for driving a differential output along a pair of transmission lines that differentially drive a load R L . The transmission lines may or may not have the same characteristics, and indeed it is common for the transmission lines to have different lengths. Load R L is depicted as a resistive load, but in general it can be any load including an inductive load, such as a magnetic head for a hard disk drive.

The differential drive circuitry 20 shown in FIG. 7 includes a pair of mirror-image halves 21 and 22 . With respect to half 21 , current source I W is connected through a semiconductor signal switch S S1 and protection device M 1 to a connector for one of the pair of transmission lines. A semiconductor boost switch S B1 is also connected through protection device M 1 to the connector to the transmission line. Protection device M 1 is a semiconductor protection device, preferably a large p-type device, which protects both of semiconductor switches S B1 and S S1 from large voltage swings. The source of protection device M 1 is connected through a reflection-suppression switch S r1 to V SS , to which the gate of protection device M 1 is also connected.

Like circuitry is provided for negative-going current for half 21 . Commencing from voltage V EE of current source I W there are semiconductor switch S S2 , protection device M 2 , semiconductor boost switch S B2 and reflection-suppression switch S r2 .

Half 22 is a mirror image of half 21 , and a description thereof is omitted in the interest of brevity.

Operation of the switches shown in FIG. 7 conforms to the operation of the switches in the first embodiment, whose timing diagram is shown in FIG. 6 . Thus, the semiconductor signal switches are closed at the same time as the semiconductor boost switches, and the boost switches remained closed for a short boost time T B after which they are opened. The semiconductor reflection switches are closed after the boost period T B but before the expected return of a reflection from the transmission line, and the semiconductor reflection-switches remain closed for a time corresponding generally to the boost time T B . Each half 21 and 22 operates to cause negative-going and positive-going current to flow through load R L through its respective transmission line, and halves 21 and 22 operate complementarily to each other so as to enhance this effect through differential driving of load R L .

Referring now to FIGS. 8A-8G , various exemplary implementations of the present invention are shown. Referring to FIG. 6A , the present invention may be embodied as a boosted write driver in a hard disk drive 500 . The present invention may implement either or both signal processing and/or control circuits, which are generally identified in FIG. 8A at 502 . In some implementations, signal processing and/or control circuit 502 and/or other circuits (not shown) in HDD 500 may process data, perform coding and/or encryption, perform calculations, and/or format data that is output to and/or received from a magnetic storage medium 506 .

HDD 500 may communicate with a host device (not shown) such as a computer, mobile computing devices such as personal digital assistants, cellular phones, media or MP3 players and the like, and/or other devices via one or more wired or wireless communication links 508 . HDD 500 may be connected to memory 509 , such as random access memory (RAM), a low latency nonvolatile memory such as flash memory, read only memory (ROM) and/or other suitable electronic data storage.

Referring now to FIG. 8B , the present invention may be embodied as a boosted write driver in a digital versatile disc (DVD) drive 510 . The present invention may implement either or both signal processing and/or control circuits, which are generally identified in FIG. 8B at 512 , and/or mass data storage 518 of DVD drive 510 . Signal processing and/or control circuit 512 and/or other circuits (not shown) in DVD 510 may process data, perform coding and/or encryption, perform calculations, and/or format data that is read from and/or data written to an optical storage medium 516 . In some implementations, signal processing and/or control circuit 512 and/or other circuits (not shown) in DVD 510 can also perform other functions such as encoding and/or decoding and/or any other signal processing functions associated with a DVD drive.

DVD drive 510 may communicate with an output device (not shown) such as a computer, television or other device via one or more wired or wireless communication links 517 . DVD 510 may communicate with mass data storage 518 that stores data in a nonvolatile manner. Mass data storage 518 may include a hard disk drive (HDD) such as that shown in FIG. 8A . The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. DVD 510 may be connected to memory 519 , such as RAM, ROM, low latency nonvolatile memory such as flash memory, and/or other suitable electronic data storage.

Referring now to FIG. 8C , the present invention may be embodied as a boosted write driver in a high definition television (HDTV) 520 . The present invention may implement either or both signal processing and/or control circuits, which are generally identified in FIG. 8C at 522 , a WLAN interface and/or mass data storage of the HDTV 520 . HDTV 520 receives HDTV input signals in either a wired or wireless format and generates HDTV output signals for a display 526 . In some implementations, signal processing circuit and/or control circuit 522 and/or other circuits (not shown) of HDTV 520 may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other type of HDTV processing that may be required.

HDTV 520 may communicate with mass data storage 527 that stores data in a nonvolatile manner such as optical and/or magnetic storage devices. At least one HDD may have the configuration shown in FIG. 8A and/or at least one DVD may have the configuration shown in FIG. 8B . The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. HDTV 520 may be connected to memory 528 such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage. HDTV 520 also may support connections with a WLAN via a WLAN network interface 529 .

Referring now to FIG. 8D , the present invention may be embodied as a boosted write driver in a control system of a vehicle 530 , a WLAN interface and/or mass data storage of the vehicle control system. In some implementations, the present invention implements a powertrain control system 532 that receives inputs from one or more sensors such as temperature sensors, pressure sensors, rotational sensors, airflow sensors and/or any other suitable sensors and/or that generates one or more output control signals such as engine operating parameters, transmission operating parameters, and/or other control signals.

The present invention may also be embodied in other control systems 540 of vehicle 530 . Control system 540 may likewise receive signals from input sensors 542 and/or output control signals to one or more output devices 544 . In some implementations, control system 540 may be part of an anti-lock braking system (ABS), a navigation system, a telematics system, a vehicle telematics system, a lane departure system, an adaptive cruise control system, a vehicle entertainment system such as a stereo, DVD, compact disc and the like. Still other implementations are contemplated.

Powertrain control system 532 may communicate with mass data storage 546 that stores data in a nonvolatile manner. Mass data storage 546 may include optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. At least one HDD may have the configuration shown in FIG. 8A and/or at least one DVD may have the configuration shown in FIG. 8B . The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. Powertrain control system 532 may be connected to memory 547 such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage. Powertrain control system 532 also may support connections with a WLAN via a WLAN network interface 548 . The control system 540 may also include mass data storage, memory and/or a WLAN interface (all not shown).

Referring now to FIG. 8E , the present invention may be embodied as a boosted write driver in a cellular phone 550 that may include a cellular antenna 551 . The present invention may implement either or both signal processing and/or control circuits, which are generally identified in FIG. 8E at 552 , a WLAN interface and/or mass data storage of the cellular phone 550 . In some implementations, cellular phone 550 includes a microphone 556 , an audio output 558 such as a speaker and/or audio output jack, a display 560 and/or an input device 562 such as a keypad, pointing device, voice actuation and/or other input device. Signal processing and/or control circuits 552 and/or other circuits (not shown) in cellular phone 550 may process data, perform coding and/or encryption, perform calculations, format data and/or perform other cellular phone functions.

Cellular phone 550 may communicate with mass data storage 564 that stores data in a nonvolatile manner such as optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. At least one HDD may have the configuration shown in FIG. 8A and/or at least one DVD may have the configuration shown in FIG. 8B . The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. Cellular phone 550 may be connected to memory 566 such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage. Cellular phone 550 also may support connections with a WLAN via a WLAN network interface 568 .

Referring now to FIG. 8F , the present invention may be embodied as a boosted write driver in a set top box 580 . The present invention may implement either or both signal processing and/or control circuits, which are generally identified in FIG. 8F at 584 , a WLAN interface and/or mass data storage of the set top box 580 . Set top box 580 receives signals from a source such as a broadband source and outputs standard and/or high definition audio/video signals suitable for a display 588 such as a television and/or monitor and/or other video and/or audio output devices. Signal processing and/or control circuits 584 and/or other circuits (not shown) of the set top box 580 may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other set top box function.

Set top box 580 may communicate with mass data storage 590 that stores data in a nonvolatile manner. Mass data storage 590 may include optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. At least one HDD may have the configuration shown in FIG. 8A and/or at least one DVD may have the configuration shown in FIG. 8B . The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. Set top box 580 may be connected to memory 594 such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage. Set top box 580 also may support connections with a WLAN via a WLAN network interface 596 .

Referring now to FIG. 8G , the present invention may be embodied as a boosted write driver in a media player 600 . The present invention may implement either or both signal processing and/or control circuits, which are generally identified in FIG. 8G at 604 , a WLAN interface and/or mass data storage of the media player 600 . In some implementations, media player 600 includes a display 607 and/or a user input 608 such as a keypad, touchpad and the like. In some implementations, media player 600 may employ a graphical user interface (GUI) that typically employs menus, drop down menus, icons and/or a point-and-click interface via display 607 and/or user input 608 . Media player 600 further includes an audio output 609 such as a speaker and/or audio output jack. Signal processing and/or control circuits 604 and/or other circuits (not shown) of media player 600 may process data, perform coding and/or encryption, perform calculations, format data and/or perform any other media player function.

Media player 600 may communicate with mass data storage 610 that stores data such as compressed audio and/or video content in a nonvolatile manner. In some implementations, the compressed audio files include files that are compliant with MP3 format or other suitable compressed audio and/or video formats. The mass data storage may include optical and/or magnetic storage devices for example hard disk drives HDD and/or DVDs. At least one HDD may have the configuration shown in FIG. 8A and/or at least one DVD may have the configuration shown in FIG. 8B . The HDD may be a mini HDD that includes one or more platters having a diameter that is smaller than approximately 1.8″. Media player 600 may be connected to memory 614 such as RAM, ROM, low latency nonvolatile memory such as flash memory and/or other suitable electronic data storage. Media player 600 also may support connections with a WLAN via a WLAN network interface 616 . Still other implementations in addition to those described above are contemplated.

The invention has been described above with respect to particular illustrative embodiments. It is understood that the invention is not limited to the above-described embodiments and that various changes and modifications may be made by those skilled in the relevant art without departing from the spirit and scope of the invention.