Circuit board and method of manufacturing the same

This application claims the benefit of Japanese Patent Application No. 2006-235609 filed on Aug. 31,2006, the disclosure of which is incorporated herein by reference.

1. Field of the Invention

The present invention relates to a circuit board and a method of manufacturing the same, and more specifically, to a circuit board, which allows a large electric current to flow through a circuit pattern therein, and a method of manufacturing the same.

2. Description of the Related Art

In general, use of electronic circuits has been rapidly expanded to such fields as industry machines and automobile parts. In particular, a composite circuit board has been widely used in an inverter circuit, a control circuit of a servo motor, a power supply unit, or the like. In the composite circuit board, a thin circuit pattern for a small current (for a signal) and a thick circuit pattern for a large current are formed in one insulating board. Various circuit boards having such composite circuits have been known.

FIG. 8 is a cross sectional view showing a large current circuit board according to a conventional technology. As shown in FIG. 8 , a large current circuit board 60 includes an insulating board 61 made of glass epoxy material or the like; conductors 62 , 63 formed with copper used therein; a control circuit conductor 64 made of copper by etching both sides of the insulating board 61 or the like; and a through hole part 65 which penetrates the insulating board 61 and the conductors 62 , 63 . Interfaces 67 between the through hole part 65 and the conductors 62 , 63 are copper-plated, respectively, thus forming a predetermined current conductor path through the conductors 62 , 63 , 64 . Voltages having opposite polarities are applied to the conductors 62 , 63 . In the large current circuit board 60 , an ordinary conductor has a thickness of about 35 μm.

FIG. 9 and FIG. 10 are a cross sectional view and a perspective view, respectively, each showing another large current circuit board according to a conventional technology. As shown in FIG. 9 and FIG. 10 , a large current circuit board 70 is formed such that different burred terminals 75 are electrically connected on an upper surface of the board 70 via a thick conductor 74 (see, for example, Japanese Laid-Open Patent Application, Publication No. H10-56244, Claim 1, FIG. 1).

Namely, the large current circuit board has a signal conductor 72 and patterned conductors 73 formed by attaching copper foil to a surface 71 a of the insulating board 71 made of glass epoxy material or the like, and etching the copper foil into a predetermined pattern. The thick conductor 74 is formed by cutting a copper sheet into a predetermined pattern, and is soldered to the pattered conductor 73 , which is etched in a shape corresponding to the large current thick conductor 74 .

In the large current circuit board 70 , the burred terminal 75 burred in a cylindrical shape is inserted into the through hole part 76 , which penetrates the insulating board 71 . Then an end 75 a of the burred terminal 75 is soldered to a patterned conductor 77 , which is formed on an underside 71 b of the insulating board 71 . As shown in FIG. 10 , when a plurality of different burred terminals 75 are electrically connected, a plurality of thick conductors 74 each in a rod shape with an insulated surface thereof are disposed one above another. This means that the large current circuit board 70 has a larger volume in a height direction thereof, as a circuit thereof becomes more complicated. In the large current circuit board 70 , an ordinary conductor has a thickness of about 210 to 500 μm.

The large current circuit board 60 shown in FIG. 8 is not suitable, however, for flowing a large current therethrough, because an area of the interfaces 67 between the through hole part 65 and the conductors 62 , 63 are substantially small. Nonetheless, reduction of a combined inductance (a surge reduction) can be expected, since the conductors 62 , 63 in the insulating board 61 are provided close to each other. To flow a large current through the large current circuit board 60 shown in FIG. 8 , it is necessary to provide a large number of the through hole parts 65 , to thereby increase a total electrical contact area of the interfaces 67 . However, a more complicated manufacturing process is required to provide the large number of the through hole parts 65 .

As compared to the large current circuit board 60 , the large current circuit board 70 shown in FIG. 9 and FIG. 10 is suitable for flowing a large current therethrough. However, the large current circuit board 70 requires a longer time in forming and placing the thick conductors 74 therein, because the thick conductors 74 have to be placed between a plurality of the through hole parts 76 for each current path. Further, there may be a region in the large current circuit board 70 , in which a plurality of the thick conductors 74 are multilayered in the height direction. As a result, an area for placing other components inevitably becomes smaller, and a thickness of the board becomes larger. Moreover, reduction of a combined inductance (a surge reduction) cannot be so much expected in the large current circuit board 70 as in the large current circuit board 60 shown in FIG. 8 , because a distance between the opposing patterned conductors 73 , 77 is larger in the large current circuit board 70 .

The present invention has been made in light of the above-mentioned problems. The present invention provides a circuit board capable of flowing a large current therethrough with a relatively simple configuration and without increasing a size thereof in the thickness direction. The present invention also provides a method of manufacturing the circuit board.

According to an aspect of the present invention, a circuit board includes: a multilayer board, in which a plurality of insulating layers and a plurality of conductive layers are alternately stacked; and a plurality of conductive terminals, which are fitted into a plurality of through holes extending in a thickness direction of the multilayer board at predetermined positions thereof. The multilayer board includes cylindrical recesses each having a diameter larger than that of the through hole, having a depth from an outermost insulating layer in the multilayer board to a surface of a predetermined conductive layer in the multilayer board, and partially exposing the surface of the predetermined conductive layer. The conductive layer and the conductive terminal are electrically connected at an interface between the conductive layer and the conductive terminal in the through hole, and at an electrical interface between the conductive terminal and the partially exposed surface of the conductive layer in the predetermined conductive terminal.

In the aspect of the present invention, in the circuit board having the above-mentioned configuration, the conductive layer and the conductive terminal are electrically connected at the interface in the through hole and at the electrical interface on the partially exposed surface of the conductive layer, which is exposed by forming the cylindrical recess. In this way, the circuit board can secure a current path having a large electrical contact area between the conductive layer and the conductive terminal, thus enabling the circuit board to flow a large current therethrough. Further, because the circuit board has the large electrical contact area, when the circuit board flows a large current therethrough, it is possible to prevent that the current is concentrated on the through hole, and a temperature at the through hole goes up.

It is to be noted that the cylindrical recess may be formed concentric with the through hole, or may have a center thereof offset from that of the through hole.

According to another aspect of the present invention, in a method of manufacturing a circuit board, the circuit board includes: a multilayer board, in which a plurality of insulating layers and a plurality of conductive layers are alternately stacked; and a plurality of conductive terminals, which are fitted into a plurality of through holes extending in a thickness direction of the multilayer board at predetermined positions thereof. The method of manufacturing the circuit board includes: a first step of forming the through holes each penetrating the multilayer board in a thickness direction thereof; a second step of forming cylindrical recesses each having a diameter larger than that of the through hole, provided by drilling from an outermost insulating layer in the multilayer board to a surface of a predetermined conductive layer in the multilayer board, and partially exposing the surface of the predetermined conductive layer; a third step of fitting the conductive terminal into the through hole corresponding thereto; and a fourth step of connecting via conductive connecting material at least either at an interface between the conductive layer and the conductive terminal in the through hole, or at an electrical interface between the conductive terminal and the partially exposed surface of the conductive layer in the cylindrical recess.

In another aspect of the present invention, in the method of manufacturing the circuit board including the above-mentioned steps, the cylindrical recess is formed before the conductive terminal is fitted into the through hole, and the conductive terminal is electrically connected to the partially exposed surface of the conductive layer, which is exposed by forming the cylindrical recess. The circuit board is heated to a predetermined temperature with the conductive connecting material applied therein, such as cream solder. Then the conductive terminal fitted into the through hole is electrically connected to the conductive layer at the interface in the through hole and at the electrically interface in the cylindrical recess. As a result, the circuit board can secure a current path having a large electrical contact area between the conductive layer and the conductive terminal.

Other features and advantages of the present invention will become more apparent from the following detailed description of the invention, when taken in conjunction with the accompanying exemplary drawings.

FIG. 1 is a cross sectional view schematically showing a configuration of a circuit board according to a first embodiment of the present invention.

FIG. 2A to FIG. 2D are sequential cross sectional views each schematically showing a key step in a method of manufacturing the circuit board according to the first embodiment.

FIG. 3A to FIG. 3C are plan views each showing the circuit board of the present invention, before a multilayer board is stacked.

FIG. 4A is a plan view showing the circuit board of the present invention, to which electronic components are connected. FIG. 4B is a cross sectional view of FIG. 4A . FIG. 4C is a schematic view for explaining inductance in the circuit board of FIG. 4A .

FIG. 5A to FIG. 5D are sequential cross sectional views each showing a key step in the method of manufacturing a circuit board according to a second embodiment.

FIG. 6A to FIG. 6C are sequential cross sectional views each showing a key step of the method of manufacturing a circuit board according to a third embodiment.

FIG. 7A is an exploded perspective view schematically showing a partially broken circuit board according to a fourth embodiment. FIG. 7B is a perspective view schematically showing the partially broken circuit board according to the fourth embodiment.

FIG. 8 is a cross sectional view showing a large current circuit board according to related art.

FIG. 9 is a cross sectional view showing another circuit board according to related art.

FIG. 10 is a perspective view schematically showing the large current circuit board of FIG. 9 .

With reference to attached drawings, exemplary embodiments of the present invention are described next in detail.

First Embodiment

<General Configuration of Circuit Board>

As shown in FIG. 1 , the circuit board 1 includes a multilayer board 11 , conductive terminals 15 A, 15 B, and through hole pins 14 c , 14 d.

The multilayer board 11 is formed by alternately stacking insulating layers 13 a , 13 b , 13 c and conductive layers 12 a , 12 b . The insulating layers 13 a , 13 b , 13 c are thin layers made of insulating material such as glass epoxy resin. The conductive layers 12 a , 12 b are thin layers made of copper, for example, and have predetermined circuit patterns therein.

The insulating layers 13 a , 13 b , 13 c and the conductive layers 12 a , 12 b have each suitable thickness according to material thereof, a magnitude of a current which is to flow through the conductive layers 12 a , 12 b , and a size of the circuit board 1 .

The multilayer board 11 has cylindrical through holes 14 a , 14 b , which penetrate the multilayer board 11 at predetermined positions thereof; and counterbored holes (cylindrical recesses) 17 a , 17 b to be described later, which penetrate the insulating layer 13 a or the insulating layers 13 a , 13 b so as to reach the conductive layers 12 a , 12 b . Cylindrical through hole pins 14 c , 14 d made of copper are fitted into the through holes 14 a , 14 b , respectively. Conductive terminals 15 A, 15 B made of copper are provided on respective inner circumferences of the through hole pins 14 c , 14 d.

An insulating part g 1 is provided around a portion of the counterbored hole 17 b , which is in contact with the conductive layer 12 b , so as to ensure insulation between the conductive terminal 15 B and the conductive layer 12 a . An insulating part g 2 is provided around a portion of the through hole 14 a , which is in contact with the conductive layer 12 a , so as to ensure insulation between the conductive terminal 15 A and the conductive layer 12 b . The insulating part g 1 has a larger cross section than the counterbored hole 17 b (see FIG. 3B ). The insulating part g 2 has a larger cross section than the counterbored hole 14 a (see FIG. 3B ). It is to be noted that, in FIG. 3A to FIG. 3C , markings M 1 indicate outer circumferences of the through holes 14 a , 14 b , and markings M 2 indicate outer circumferences of the counterbored holes 17 a , 17 b.

<Through Hole>

As shown in FIG. 1 , the through holes 14 a , 14 b are cylindrical holes penetrating the multilayer board 11 in a thickness direction thereof. When the counterbored hole 17 a , 17 b to be described later are formed, the through hole 14 a penetrates the conductive layers 12 a , 12 b and the insulating layers 13 b , 13 c , and the through hole 14 b penetrates the conductive layer 12 b and the insulating layer 13 c.

<Counterbored Hole>

As shown in FIG. 1 , the counterbored holes 17 a , 17 b are cylindrical holes, are concentric with the through holes 14 a , 14 b , and are larger than those in diameter, respectively. The counterbored hole 17 a is formed to penetrate the insulating layer 13 a , to thereby expose a partial upper surface (a partially exposed surface) 16 a of the conductive layer 12 a . The counterbored hole 17 b is formed to penetrate the insulating layer 13 a , conductive layer 12 a , and insulating layer 13 b , to thereby expose a partial upper surface (a partially exposed surface) 16 b of the conductive layer 12 b.

<Through Hole Pin>

The through hole pins 14 c , 14 d are cylindrical members and are made of conductive material such as copper. The through hole pins 14 c , 14 d have diameters to come in contact with the conductive layers 12 a , 12 b in the through holes 14 a , 14 b , respectively. The through hole pins 14 c , 14 d have lengths corresponding to depths of the through holes 14 a , 14 b , respectively.

<Conductive Terminal>

The conductive terminals 15 A, 15 B are made of conductive material such as copper. The conductive terminals 15 A, 15 B include flange parts 18 a , 18 b , which are larger than the through holes 14 a , 14 b in diameter; and body parts 15 a , 15 b , which are smaller than the flange parts 18 a , 18 b in diameter, respectively. The conductive terminals 15 A, 15 B have therein cylindrical holes (communication holes) 15 c , 15 d penetrating upper ends through lower ends of the conductive terminals 15 A, 1513 , respectively. The body parts 15 a , 15 b have diameters to fit into the through hole pins 14 c , 14 d , respectively. The flange part 18 a has a diameter smaller than that of the counterbored hole 17 a , and is electrically connected to the partial upper surface 16 a of the conductive layer 12 a at an electrical interface 19 b . The flange part 18 b has a diameter smaller than that of the counterbored hole 17 b , and is electrically connected to the partial upper surface 16 b of the conductive layer 12 b at another electrical interface 19 b . The flange parts 18 a , 18 b and the body parts 15 a , 15 b have lengths corresponding to depths of the counterbored holes 17 a , 18 b and the through holes 14 a , 14 b , respectively.

<Conductive Connecting Material>

Conductive connecting material 19 is provided between the body part 15 a and the through hole pin 14 c , between the body part 15 b and the through hole pin 14 d , and at the electrical interfaces 19 b . The conductive connecting material 19 in the present embodiment is solder, which may be provided by known methods such as dip soldering and cream soldering. The conductive connecting material 19 fills gaps between the conductive terminals 15 A, 15 B, through hole pins 14 c , 14 d , and conductive layers 12 a , 12 b , while keeping conductivity therebetween. The conductive connecting material 19 also fixes the conductive terminals 15 A, 15 B into the multilayer board 11 .

<Electrical Connection>

In the circuit board 1 having a configuration as described above, the conductive terminal 15 A and the conductive layer 12 a are electrically connected, and the conductive terminal 15 B and the conductive layer 12 b are electrically connected. More specifically, the conductive layer 12 a is electrically connected not only to the through hole pin 14 c at an interface 19 a , but also to the conductive terminal 15 A at the electrical interface 19 b . This makes a surface area of a current path larger, because the flange part 18 a of the conductive terminal 15 A contacts the partial upper surface 16 a of the conductive layer 12 a via the conductive connecting material 19 . Further, the conductive layer 12 b is electrically connected not only to the through hole pin 14 d at another interface 19 a , but also to the conductive terminal 15 B at another electrical interface 19 b . This makes the surface area of the current path larger, because the flange part 18 b of the conductive terminal 15 B contacts the partial upper surface 16 b of the conductive layer 12 b via the conductive connecting material 19 .

Herein, in the circuit board 1 , voltages having opposite polarities are applied to the conductive layers 12 a , 12 b . In a predetermined region in the circuit board 1 , currents in opposite directions flow through the conductive layers 12 a , 12 b , which are provided close to each other. Hence, magnetic fluxes generated by the currents flowing through the conductive layers 12 a , 12 b are cancelled from each other, thus reducing a combined inductance (or a surge) (see FIG. 4 ).

<Variations of Configuration>

In the circuit board 1 , materials and shapes of the insulating layers 13 a , 13 b , 13 c , conductive layers 12 a , 12 b , conductive terminals 15 A, 15 B, through hole pins 14 c , 14 d are not limited to those shown in FIG. 1 . However, any other materials and shapes may be used. In FIG. 1 , the two conductive layers 12 a , 12 b are provided. However, three or more conductive layers may be provided. In FIG. 1 , the two conductive terminals 15 A, 15 B are provided. However, three or more conductive terminals may be provided according to the number of the conductive layers, or of electronic components (see FIG. 4 ) to be mounted afterwards for making the circuit board 1 a finished product.

In the circuit board 1 , gaps are created around outer circumferences of the flange parts 18 a , 18 b , because the counterbored holes 17 a , 17 b have larger diameters than those of the flange parts 18 a , 18 b of the conductive terminals 15 A, 15 B, respectively. The gaps facilitate soldering (insertion of a soldering iron into the counterbored holes 17 a , 17 b ). However, another configuration is possible, in which the counterbored holes 17 a , 17 b have substantially same diameters as those of the conductive terminals 15 A, 15 B, respectively, and the insulating layer 13 a or the like comes in contact with the outer circumferences of the flange parts 18 a , 18 b without gaps.

In the circuit board 1 , the upper ends of the conductive terminals 15 A, 15 B are positioned higher than an upper surface of the insulating layer 13 a . Since the conductive terminals 15 A, 15 B stand higher and the gaps are created around the inner circumferences of the counterbored holes 17 a , 17 b , electronic components to be described later (see FIG. 4 ) can be connected onto the conductive terminals 15 A, 15 B more easily. However, the upper ends of the conductive terminals 15 A, 15 B may be positioned equal to or lower than the upper surface of the insulating layer 13 a , according to a size of an electronic component to be mounted or a height limit of a space in which the circuit board 1 is used.

Instead of the cylindrical holes 15 c , 15 d , the conductive terminals 15 A, 15 B may have grooves for screwing up the electronic components to be described later.

It is to be noted that, in the circuit board 1 , a single conductive layer has a thickness of about 400 μm, for example, and a single insulating layer has a thickness of about 500 μm, for example.

<Steps in Method of Manufacturing Circuit Board>

Next is described a method of manufacturing the circuit board 1 mainly with reference to FIG. 2A to FIG. 2D . FIG. 2A to FIG. 2D are sequential cross sectional views each schematically showing a key step in the method of manufacturing the circuit board 1 of FIG. 1 . FIG. 3A to FIG. 3C are plan views showing each layer of the circuit board 1 . FIG. 4A is a plan view showing the circuit board 1 , to which the electronic components are connected. FIG. 4B is a cross sectional view of FIG. 4A . FIG. 4C is a schematic view for explaining inductance in the circuit board 1 of FIG. 4A . It is to be noted that FIG. 1 is a cross sectional view when cut along the line X 1 -X 1 of, for example, FIG. 3A , FIG. 3B or FIG. 3C .

First, the multilayer board 11 is manufactured. The insulating layers 13 a , 13 b , 13 c are prepared separately, as shown in FIG. 3A , FIG. 3B and FIG. 3C , respectively. The prepared insulating layers 13 a to 13 c are integrally stacked such that the insulating layer 13 a is in an uppermost position; the insulating layer 13 b is in an intermediate position with the conductive layer 12 a provided thereon; and the insulating layer 13 c is in a lowermost position with the conductive layer 12 b provided thereon. Thus the multilayer board 11 is manufactured as shown in FIG. 2A . The multilayer board 11 is pressed to have a multilayered structure, in which the layers 13 a , 13 b , 13 c and 12 a , 12 b are closely stuck to each other. Round holes 82 formed at respective four corners of the insulating layers 13 a , 13 b , 13 c are screw holes used for screwing up the entire circuit board 1 . Small holes 84 penetrating the respective layers at predetermined positions are terminal holes for soldering connectors and electrical wires.

In the multilayer board 11 , the markings M 1 for indicating outer circumferences of through holes and the markings M 2 for indicating those of counterbored holes are provided on the uppermost insulating layer 13 a , as shown in FIG. 3A . This makes it possible for an operator to visually check where to drill the holes. Either or both of the markings M 1 ,M 2 are also provided on the conductive layer 12 a and insulating layer 13 b , as shown in FIG. 3B and FIG. 3C . It is assumed that a position, a depth, and the like to be drilled by drills d 1 ,d 2 (not shown) used herein are numerically controlled.

As shown in FIG. 2A , a first step of manufacturing the circuit board 1 is a step of forming the through holes 14 a , 14 b . The through holes 14 a , 14 b are formed to mechanically penetrate the multilayer board 11 in a thickness direction thereof at respective predetermined positions. Herein, numerically-controlled small-diametered drills d 1 ,d 1 create the through holes 14 a , 14 b simultaneously or separately.

As shown in FIG. 2B , a second step is a step of forming the counterbored holes 17 a , 17 b . In forming the counterbored hole 17 a , a numerically-controlled large-diametered drill d 2 is used to drill a hole, such that the hole reaches the partial upper surface 16 a of the conductive layer 12 a and is concentric with the through hole 14 a . In forming the counterbored hole 17 b , a numerically-controlled large-diametered drill d 2 is also used to drill a hole, such that the hole reaches the partial upper surface 16 b of the conductive layer 12 b and is concentric with the through hole 14 b . The drill d 2 used herein has a flat tip thereof. It is to be noted that, in the present art, a diameter of 0.5 mm or less may be regarded as a “small diameter”, and a diameter of more than 0.5 mm may be regarded as a “large diameter”. However, the “small diameter” and the “large diameter” are herein referred to just for relatively indicating the diameter of the drill d 1 (for example, about 6.0 mm) and that of the drill d 2 (for example, about 12.0 mm), respectively.

As shown also in FIG. 2B , an insertion step is performed between the second and third steps. In the insertion step, the through hole pins 14 c , 14 d are inserted into the through holes 14 a , 14 b , respectively. The insertion is carried out automatically by an automated operating machine or manually by an operator, both not shown. The through hole pins 14 c , 14 d are provided to facilitate and ensure insertion of the conductive terminals 15 A, 15 B, respectively. However, the through hole pins 14 c , 14 d are not indispensably required and may be omitted. Namely, the conductive terminals 15 A, 15 B may be inserted directly into the through holes 14 a , 14 b , respectively. Instead of using the through hole pins 14 c , 14 d , inner surfaces of the through holes 14 a , 14 b may be metal plated. In this case, for example, the through holes 14 a , 14 b may be first created in the multilayer board 11 using the drill d 1 . Entire surfaces of the through holes 14 a , 14 b are then subjected to nonelectrolytic copper plating. After that, the counterbored holes 17 a , 17 b are created using the drill d 2 .

As shown in FIG. 2C , a third step is a step of fitting the conductive terminals 15 A, 15 B into the multilayer board 11 . More specifically, the conductive terminals 15 A, 15 B are set such that the body parts 15 a , 15 b thereof are fitted into the through hole pins 14 c , 14 d , respectively, and the flange parts 18 a , 18 b thereof come in contact with the partial upper surfaces 16 a , 16 b , respectively. Herein, the partial upper surfaces 16 a , 16 b are in exposed states by the counterbored holes 17 a , 17 b , respectively. The conductive terminals 15 A, 15 B are set automatically by an automated operating machine or manually by an operator, both not shown. Alignment of the conductive terminals 15 A, 15 B is easily performed by inserting the conductive terminals 15 A, 15 B all the way into the through hole pins 14 c , 14 d , because the conductive terminals 15 A, 15 B have the flange parts 18 a , 18 b , and the body parts 15 a , 15 b have lengths corresponding to depths of the through hole pins 14 c , 14 d , respectively.

As shown in FIG. 2D , a fourth step is a step of applying the conductive connecting material 19 . Herein, cream solder is used as the conductive connecting material 19 , and reflow soldering with cream solder is used as a soldering method. The conductive connecting material 19 is applied to circumferential edges of the flange parts 18 a , 18 b , which are shown in dotted lines in FIG. 2D . The conductive connecting material 19 flows into respective gaps between the conductive terminals 15 A, 15 B, counterbored holes 17 a , 17 b , through holes 14 a , 14 b , and through hole pins 14 c , 14 d . It would be preferable that an amount of the conductive connecting material 19 to be applied is sufficient to ensure large electrical contact areas between side surfaces of the flange parts 18 a , 18 b and the partial upper surfaces 16 a , 16 b , respectively, even after the conductive connecting material 19 is heated and melted to flow into the gaps. Heating and melting the conductive connecting material 19 is to be described later.

As shown in FIG. 2D , a fifth step is a step of heating the circuit board 1 with the conductive connecting material 19 applied thereon, to a predetermined temperature using a heating furnace not shown. The conductive connecting material 19 is heated and melted to flow into gaps created between the flange parts 18 a , 18 b and counterbored holes 17 a , 17 b , between the body parts 15 a , 15 b and through hole pins 14 c , 14 d , or the like. The conductive connecting material 19 in the gaps forms the interfaces 19 a and the electrical interfaces 19 b , thus ensuring electrical connections between the conductive terminals 15 A, 15 B and conductive layers 12 a , 12 b , respectively. The conductive connecting material 19 also resultantly fixes the above-mentioned members.

The soldering used herein is not limited to the reflow soldering as described above, and may be any known flow soldering. If the flow soldering is used, the cylindrical holes 15 c , 15 d are preferably covered with a polyimide film-based heat-resistant masking tape or the like, before the soldering. This ensures protection of insides of the cylindrical holes 15 c , 15 d shown in FIG. 1 .

When the conductive terminals 15 A, 15 B are set, the flange parts 18 a , 18 b thereof come in contact with the partial upper surfaces 16 a , 16 b (see FIG. 2C ), which are exposed by the counterbored hole 17 a , 17 b , respectively. This results in large electrical contact areas between the conductive terminals 15 A, 15 B and the conductive layers 12 a , 12 b , respectively, thus increasing a surface area of a current path.

Next are described electronic components Db mounted in the circuit board 1 with reference to FIG. 4A and FIG. 4B . It is assumed herein that a power supply circuit (not shown) is connected to the conductive terminals 15 A, 15 B via screws na,na, respectively, and electronic components Db are connected to another conductive terminals 15 A, 15 B via screws nb,nb, respectively. The electronic components Db may be a switching element (for example, IGBT, MOSFET, or the like), a capacitor, a snubber circuit, or the like.

FIG. 4B is a cross sectional view showing the circuit board 1 , when FIG. 4A is cut along the line X 2 -X 2 . FIG. 4C is a schematic view showing an electrical circuit when an electric current flows through the circuit board 1 of FIG. 4 . In FIG. 4B , the conductive terminals 15 A, 15 B on a left side of the figure have taps (internal screws) on upper portions of the cylindrical holes 15 a , 15 b thereof, respectively, and are directly screwed with the screws na,na, which are connected to the power supply circuit. The conductive terminals 15 A, 15 B on a right side of the figure does not have taps on upper portions of the cylindrical holes 15 c , 15 d , but have taps inside screws nb,nb, and are connected to the electronic components Db.

In a configuration shown in FIG. 4A and FIG. 4B , a power supply is turned on, and electric currents flow through current paths Sa,Sb as indicated by arrows in FIG. 4B . When a voltage of, for example, 600V is applied, electric currents of 200 A to 300 A flow therethrough. In this case, as shown in FIG. 4B , when voltages having opposite polarities are applied to the conductive layers 12 a , 12 b , which are positioned above and below across the insulating layer 13 b , electric currents in opposite directions flow therethrough. The opposite electric currents cancel respective magnetic fields generated by themselves. Next is described further the above phenomenon with reference to FIG. 4C . In the circuit board 1 according to the present invention as shown in FIG. 4C , as well as in the circuit boards in the aforementioned prior art with reference to FIG. 8 to FIG. 10 , inductance components L 1 ,L 2 are present between the electronic components Db, and a positive power supply and a negative power supply, respectively. A combined inductance L of the entire circuit board 1 is represented as L=(L 1 +L 2 ±2M). Herein, M is a mutual inductance. However, in the circuit board 1 according to the present invention, the conductive layers 12 a , 12 b are provided close to each other, and directions of the current paths Sa,Sb are opposite to each other. As a result, the magnetic fields generated by electric currents flowing through the conductive layers 12 a , 12 b are cancelled, thus reducing a combined inductance (a surge reduction) to a substantially negligible extent.

As described above, the circuit board 1 according to the present invention ensures electrical connections not only at the interfaces 19 a but also at the electrical interfaces 19 b between the conductive terminal 15 A and the conductive Layers 12 a , 12 b and between the conductive terminal 15 B and the conductive layers 12 a , 12 b . A large electrical contact: area therebetween in the present invention prevents a possible trouble caused by a flow of a large electric current owing to a local heat generation or the like. Thus the circuit board 1 is suitable for flowing a large electric current therethrough. Further, the present invention uses the counterbored holes and the conductive connecting material 19 . This eliminates a need for an enlargement of a size of the circuit board 1 or processing of a number of through holes, which is otherwise required to flow a large electric current. Moreover, the present invention can be realized with a relatively simple process and configuration. The present invention also achieves an inductance reduction by providing the conductive layers 12 a , 12 b close to each other in the multilayer board 11 . It is to be noted that the electrical contact area at the interfaces 19 a or the electrical interfaces 19 b may be determined according to a size of the circuit board 1 , a magnitude of an electric current to flow therethrough, or the like.

Second Embodiment

Next is described a second embodiment with reference to FIG. 5A to FIG. 5D . FIG. 5A to FIG. 5D are sequential cross sectional views showing a first step to a fifth step as key steps in the method of manufacturing a circuit board. A configuration of the second embodiment is the same as that of the first embodiment shown in FIG. 1 , except that the number of layers stacked in the circuit board is different, and that a pair of counterbored holes are formed on both an upper surface and a lower surface of the circuit board. Descriptions of a configuration and a process which have been already mentioned in the first embodiment will be omitted herefrom.

<General Configuration of Circuit Board>

As shown in FIG. 5C and FIG. 5D , a circuit board 2 according to the second embodiment includes: a multilayer board 21 , through hole pins 24 c , 24 d , and conductive terminals 32 A, 32 B, latter two of which are placed in the multilayer board 21 .

The multilayer board 21 is configured such that insulating layers 23 a , 23 b , 23 c , 23 d , 23 e and conductive layers 22 a , 22 b , 22 c , 22 d are alternately stacked.

The multilayer board 21 has cylindrical through holes 24 a , 24 b , which penetrate the multilayer board 21 at predetermined positions thereof; first counterbored holes 27 a , 27 b , formed to reach from the insulating layer 23 a to top surfaces of the conductive layers 22 c , 22 d , respectively; and second counterbored holes 29 a , 29 b formed to reach from the insulating layer 23 e to lower surfaces of the conductive layers 22 c , 22 d , respectively.

The multilayer board 21 has an insulating part g 4 for ensuring insulation between a conductive terminal 32 A and the conductive layer 22 b ; an insulating part g 6 between the conductive terminal 32 A and the conductive layer 22 d ; and an insulating part g 3 between a conductive terminal 32 B and the conductive layer 22 a ; and an insulating part g 5 between the conductive terminal 32 B and the conductive layer 22 c.

<Electrical Connection between Second Counterbored Hole and Conductive Terminal>

As shown in FIG. 5D , body parts 32 a , 32 b of the conductive terminals 32 A, 32 B partly protrude from lower ends of the through holes 24 a , 24 b , respectively, when the conductive terminals 32 A, 32 B are set in the through holes 24 a , 24 b via the through hole pins 24 c , 24 d , respectively. This makes an electrical contact area between the conductive terminals 32 A, 32 B and partial lower surfaces 26 c , 26 d larger, because the conductive terminals 32 A, 32 B contact the partial lower surfaces 26 c , 26 d , respectively, via conductive connecting material 34 applied to respective protruding portions of the body parts 32 a , 32 b.

In other words, the conductive terminals 32 A, 32 B have large electrical contact areas between flange parts 31 a , 31 b thereof and partial upper surfaces 26 a , 26 b , and between the protruding portions of the body parts 32 a , 32 b and the partial lower surfaces 26 c , 26 d , respectively. Thus the circuit board 2 is suitable for flowing a large electric current therethrough.

Lower ends of the conductive terminals 32 A, 32 B protrude from a lower surface of the insulating layer 23 e . Further, gaps are created on respective inner circumferences of the second counterbored holes 29 a , 29 b . Thus, the electronic components Db (see FIG. 4 ) can be easily connected to the conductive terminals 32 A, 32 B. Herein, the lower ends of the conductive terminals 32 A, 32 B may be flush with or lower than the lower surface of the insulating layer 23 e , according to a size of each of the electronic component Db, a height limit in a space where the circuit board 2 is used, or the like.

<Steps of Method of Manufacturing Circuit Board>

Next are described steps of a method of manufacturing the circuit board 2 . Description of the steps which have already mentioned in the first embodiment shown in FIG. 2 will be simplified herein.

First, the multilayer board 21 is manufactured. Next, as a first step of the method, the through holes 24 a , 24 b (see FIG. 5B ) are created as shown in FIG. 5A . The through holes 24 a , 24 b are formed by penetrating the multilayer board 21 in a thickness direction thereof with numerically-controlled small-diametered drills d 3 ,d 3 .

As shown in FIG. 5B , a second step is a step of forming the first counterbored holes 27 a , 27 b and the second counterbored holes 29 a , 29 b in the multilayer board 21 . In forming the first counterbored holes 27 a , 27 b , numerically-controlled large-diametered drills d 4 ,d 4 are used to drill holes, such that the holes reach a partial upper surface 26 a of the conductive layer 22 a and a partial upper surface 26 b of the conductive layer 22 b , and are concentric with the through holes 24 a , 24 b , respectively. In forming the counterbored holes 29 a , 29 b , the numerically-controlled large-diametered drills d 4 ,d 4 are also used to drill holes, such that the holes reach the partial lower surface 26 c of the conductive layer 22 c and the partial lower surface 29 d of the conductive layer 22 d , and are concentric with the through holes 24 a , 24 b , respectively. The drills d 4 ,d 4 used herein each has a flat tip thereof.

As shown in FIG. 5C , a third step is a step of fitting the conductive terminals 32 A, 32 B into the multilayer board 21 . Prior to the third step, however, an insertion step is herein performed, in which the through hole pins 24 c , 24 d are inserted into the through holes 24 a , 24 b , respectively. The through hole pins 24 c , 24 d are provided to facilitate and ensure insertion of the conductive terminals 32 A, 32 B, respectively. However, the through hole pins 24 c , 24 d are not indispensably required and may be omitted. Namely, the conductive terminals 32 A, 32 B may be inserted directly into the through holes 24 a , 24 b , respectively. Instead of using the through hole pins 24 c , 24 d , inner surfaces of the through holes 24 a , 24 b may be metal plated.

The conductive terminals 32 A, 32 B have flange parts 31 a , 31 b , and the body parts 32 a , 32 b have lengths corresponding to depths of the second counterbored holes 29 a , 29 b , respectively. Therefore, alignment of the conductive terminals 32 A, 32 B can be easily performed just by inserting the conductive terminals 32 A, 32 B all the way into the through holes 24 a , 24 b (in accordance with the through hole pins 24 c , 24 d ) so that lower ends of the flange parts 31 a , 31 b come in contact with the partial upper surfaces 26 a , 26 b , respectively.

As shown in FIG. 5D , a fourth step is a step of applying the conductive connecting material 34 around the flange parts 31 a , 31 b of the conductive terminals 32 A, 32 B and the body parts 32 a , 32 b protruding from the through holes 24 a , 24 b , respectively. A fifth step is a step of heating the circuit board 2 to a predetermined temperature in a reflow furnace or the like not shown. The conductive connecting material 34 melted by heating the circuit board 2 is flown into gaps between the conductive terminal 32 A, the through hole pin 24 C, and the through hole 24 a , and between the conductive terminal 32 B, the through hole pin 24 d , and the through hole 24 b . After the conductive connecting material 34 is sufficiently spread into the gaps, the conductive terminals 32 A, 32 B are set into the through holes 24 a , 24 b , respectively, with large electrical contact areas obtained therebetween.

In this step, the conductive connecting material 34 forms conically-shaped electrical interfaces 36 a to 36 d between the partial upper surfaces 26 a , 26 b of the conductive layers 22 a , 22 b and the flange parts 31 a , 31 b , and between the body parts 21 a , 32 b protruding from the through holes 24 a , 24 b and the partial lower surfaces 26 c , 26 d of the conductive layers 22 c , 22 d , respectively. The electrical interfaces 36 a to 36 d , and the interfaces 35 a , 35 b between the conductive terminals 32 A, 32 B and the through holes 24 a , 24 b provide a current path having a large electrical contact area, thus allowing a large electric current to flow through the circuit board 2 .

In the second step, the first counterbored holes 27 a , 27 b may be formed first, and then, the second counterbored holes 29 a , 29 b may be formed, or vice versa. Or, the first counterbored holes 27 a , 27 b and the second counterbored holes 29 a , 29 b may be formed simultaneously.

The circuit board 2 manufactured as described above can flow a large electric current therethrough with a relatively simple configuration thereof and without increasing a size thereof.

Further, in this embodiment as shown in FIG. 5A to FIG. 5D , voltages having opposite polarities are applied to the conductive layers 22 a , 22 b (namely, directions of electric currents flowing therethrough are opposite to each other). Voltages having opposite polarities are also applied to the conductive layers 22 c , 22 d . This results in reduction of a combined inductance (a surge) in the circuit board 2 , as in the first embodiment.

Third Embodiment

Next are described a circuit board and key steps of a method of manufacturing the circuit board according to a third embodiment with reference to FIG. 6A , FIG. 6B and FIG. 6C . FIG. 6A , FIG. 6B and FIG. 6C are sequential cross sectional views each showing a key step of the method of manufacturing the circuit board according to the third embodiment.

A configuration of the third embodiment is the same as that of the embodiments described above, except that no through hole pin is used, and that second flange parts are provided in the third embodiment. Difference between the third and the other embodiments is mainly described herein, and description of same configurations is omitted herefrom.

<General Configuration of Circuit Board>

As shown in FIG. 6A , FIG. 6B and FIG. 6C , a circuit board 3 includes a multilayer board 41 ; first counterbored holes 47 a , 47 b and second counterbored holes 49 a , 49 b each formed concentric with through holes 44 a , 44 b , respectively, the through holes 44 a , 44 b penetrating the multilayer board 41 at predetermined positions thereof; and conductive terminals 52 A, 52 B set into the through holes 44 a , 44 b via the first counterbored holes 47 a , 47 b and the second counterbored holes 49 a , 49 b , respectively. Conductive layers 42 a , 42 b , 42 c , 42 d have insulating parts g 7 ,g 8 ,g 9 ,g 10 around the first counterbored holes 47 b , the through holes 44 a , 44 b , and the second counterbored hole 49 a , respectively.

The conductive terminals 52 A, 52 B include first flange parts 51 a , 51 b thereof integrally formed on one ends of body parts 52 a , 52 b thereof, respectively. The conductive terminals 52 A, 52 B also include second flange parts 54 a , 54 b , which can be freely attached to and removed from the other ends of the body parts 52 a , 52 b , respectively.

The second flange parts 54 a , 54 b are formed in ring shapes having larger diameters than those of the body parts 52 a , 52 b , respectively. The second flange parts 54 a , 54 b and the body parts 52 a , 52 b are made of the same material (copper, for example). The second flange parts 54 a , 54 b are formed to have depths corresponding to the second counterbored holes 49 a , 49 b , respectively. The second flange parts 54 a , 54 b are also formed to have lengths enough to come in contact with the conductive layers 42 c , 42 d exposed by the second counterbored holes 49 a , 49 b , respectively, and enough to slightly protrude from an undermost surface of the multilayer board 41 , when the second flange parts 54 a , 54 b are set from the other ends of the body parts 52 a , 52 b , respectively.

In the configuration described above, an electrical contact area in the circuit board 3 can be made large, because the first flange parts 51 a , 51 b come in contact with the partial upper surfaces 46 a , 46 b of the conductive layers 42 a , 42 b exposed by the first counterbored holes 47 a , 47 b , and the second flange parts 54 a , 54 b come in contact with the partial lower surfaces 46 c , 46 d of the conductive layers 42 c , 42 d exposed by the second counterbored holes 49 a , 49 b , respectively.

<Steps of Method of Manufacturing Circuit Board>

Next is described the method of manufacturing the circuit board 3 .

The same steps as those described above in FIG. 5 are used in the third embodiment for forming the multilayer board 41 , through holes 44 a , 44 b , first counterbored holes 47 a , 47 b , and second counterbored holes 49 a , 49 b.

As shown in FIG. 6A , after the first counterbored holes 47 a , 47 b and second counterbored holes 49 a , 49 b are created, conductive connecting material 55 such as cream molder is applied to portions of the conductive layers 42 a to 42 d , which are exposed by the through holes 44 a , 44 b , the first counterbored holes 47 a , 47 b , and the second counterbored holes 49 a , 49 b , respectively (a third step).

Then the conductive terminals 52 A, 52 B are placed into the through holes 44 a , 44 b (a fourth step and a fifth step). The conductive terminals 52 A, 52 B are fitted thereinto in a state where the second flange parts 54 a , 54 b are removed. Then, as shown in FIG. 6B , the second flange parts 54 a , 54 b are fitted into the body parts 52 a , 52 b protruding from the first counterbored holes 47 a , 47 b of the fitted conductive terminals 52 A, 52 B, respectively.

As shown in FIG. 6C , after the conductive terminals 52 A, 52 B are set in the multilayer board 41 , the conductive terminals 52 A, 52 B are soldered thereto, by heating the circuit board 3 to a predetermined temperature in a reflow furnace or the like (not shown) (a sixth step). If the circuit board 3 is heated with a weight 59 put thereon, the second flange parts 54 a , 54 b hardly move, and are soldered at appropriate positions. It would be preferable to select a material of the weight 59 such that the material ensures contact between the body parts 52 a , 52 b and the second flange parts 54 a , 54 b , does not undergo a chemical change or a deformation even at a high temperature during reflow treatment, and does not damage the multilayer board 41 .

In the circuit board 3 manufactured through the steps described above, the conductive connecting material 55 forms electrical interfaces 58 a to 58 d between the first flange parts 51 a , 51 b and the conductive terminals 52 A, 52 B, and between the second flange parts 54 a , 54 b , and the conductive terminals 52 A, 52 B on upper or lower surfaces of the conductive layers 42 a to 42 d . As a result, in the circuit board 3 , the electrical interfaces 58 a to 58 d can provide an electric current path having a large electrical contact area, in which a large electric current can flow through the conductive layers 42 a to 42 d . In the third embodiment shown in FIG. 6 , voltages having opposite polarities are applied to the conductive layers 42 a , 42 b (namely, directions of electric currents flowing therethrough are opposite to each other). Voltages having opposite polarities are also applied to the conductive layers 42 c , 42 d . This results in reduction of a combined inductance (a surge) in the circuit board 3 , as in the first embodiment.

The other ends of the body parts 52 a , 52 b of the conductive terminals 52 A, 52 B may be formed into external screws (not shown), and the second flange parts 54 a , 54 b may be formed into internal screws. In this case, the second flange parts 54 a , 54 b may be screwed into the conductive terminals 52 A, 52 B fitted into the through holes 44 a , 44 b , respectively. This ensures connection between the body parts 52 a , 52 b and the second flange parts 54 a , 54 b , respectively. Further, the second flange parts 54 a , 54 b may be just screwed into the body parts 52 a , 52 b without using the weight 59 .

In the second and third embodiments described with reference to FIG. 5 , FIG. 6 , respectively, the multilayer boards 21 , 41 with the first counterbored holes created therein may be turned upside down, and may be subjected to processing of forming a lower-positioned second counterbored hole or a lower-positioned conductive interface from above.

In FIG. 6 , the through hole pins or metal plating in the through holes are not provided. However, if metal plating is provided in the through holes 44 a , 44 b , an increase of an area jointed by the metal plating enhances joint strength of the circuit board 3 . Further, metal plating realizes a more reliable and solderable soldering, when a subsequent solder joint is performed through reflow treatment or the like, because solder can easily spread into minute gaps between the conductive terminals 52 A, 52 B and the through holes 44 a , 44 b.

The above embodiments have configurations in which the counterbored holes (first and second counterbored holes) 17 a ( 17 b . . . ) are formed as cylindrical recesses (first and second cylindrical recesses); and an electrical contact area is made larger by electrically connecting the flange part 18 a ( 18 b . . . ) of the conductive terminal 15 A ( 15 B . . . ) to the partial upper surface 16 a ( 16 b . . . ) or the partial lower surface 26 c ( 26 d . . . ) of the conductive layer 12 a ( 17 b . . . ) exposed by the counterbored hole 17 a ( 17 b . . . ), via the conductive connecting material 19 . However, as shown in FIG. 7 , the electrical contact area may be made larger without using the flange part 18 a ( 18 b . . . ).

Fourth Embodiment

FIG. 7A is an exploded perspective view schematically showing a partially broken circuit board according to a fourth embodiment. FIG. 7B is a view schematically showing the partially broken circuit board according to the fourth embodiment. A configuration of the fourth embodiment shown in FIG. 7A and FIG. 7B is the same as those of the above embodiments, except that the conductive terminals used in the fourth embodiment do not have any flange parts. Same configurations which have already been described in the above embodiments are omitted herefrom.

<Configuration of Circuit Board>

As shown in FIG. 7A and FIG. 7B , a circuit board A 1 includes a multilayer board A 22 ; a first counterbored hole (cylindrical recess) A 7 formed concentric with a through hole A 4 , the through hole A 4 being provided at a predetermined position of the multilayer board A 22 ; a through hole pin A 10 fitted into the through hole A 4 ; and a conductive terminal A 5 electrically connected to the through hole pin A 10 via conductive connecting material A 9 . The conductive terminal A 5 used herein is cylindrical-shaped, thicker than the through hole pin A 10 , and made of a conductive material such as copper. An insulating part g 11 is provided around a portion of the through hole A 4 , which is positioned adjacent to one of conductive layers A 2 , so as to ensure insulation between the conductive layer A 2 and the conductive terminal A 5 .

The multilayer board A 22 is configured such that insulating layers A 3 ,A 3 ,A 3 and conductive layers A 2 ,A 2 are alternately stacked. The through hole A 4 is formed at a predetermined position in the multilayer board A 22 . A counterbored hole A 7 is also formed concentric with the through hole A 4 in the multilayer board A 22 , such that a partial upper surface A 6 of the conductive layer A 2 exposes from the insulating layer A 3 . The circuit board A 1 has a through hole pin A 10 in the through hole A 4 . In the through hole pin A 10 , a conductive terminal A 5 is placed. The circuit board A 1 also has conductive connecting material A 9 such as solder or cream solder, such that an electrical contact area is made large between the partial upper surface A 6 of the conductive layer A 2 exposed by the counterbored hole A 7 , and an end of the conductive terminal A 5 .

The circuit board A 1 is configured to have an interface A 11 and an electrical interface A 12 , which are electrically connected to the partial upper surface A 6 of the conductive layer A 2 via the conductive connecting material A 9 thanks to a formation of the counterbored hole A 7 . Thus the circuit board A 1 has a large electrical contact area, and can flow a large electric current therethrough with a simple configuration thereof.

<Method of Manufacturing Circuit Board>

In a method of manufacturing the circuit board A 1 , a step of forming the multilayer board A 22 , a step of forming the through hole A 4 , a step of drilling the counterbored hole A 7 , and a step of setting the through hole pin A 10 are performed as aforementioned. In a step of fitting the conductive terminal A 5 into the through hole pin A 10 , the multilayer board A 22 is placed on a flat surface, or the conductive connecting material A 9 such as cream solder or the like is applied to an inner surface of the through hole pin A 10 as a temporary joint, so as to prevent the conductive terminal A 5 from falling off from the through hole pin A 10 .

Alignment of the conductive terminals A 5 is easily performed just by inserting the conductive terminal A 5 all the way into the through hole pin A 10 , because the conductive terminal A 5 has a length corresponding to a depth of the through hole pin A 10 .

After the conductive terminal A 5 is fitted into the through hole pin A 10 , the conductive connecting material A 9 is applied such that the electrical interface A 12 is formed for electrically connecting the conductive terminal A 5 and the partial upper surface A 6 exposed by the counterbored hole A 7 , and that an interface A 11 is also formed in the through hole A 4 . Then the circuit board A 1 is heated to a predetermined temperature, to thereby fit the conductive terminal A 5 into the circuit board 1 .

<Variations of Configuration>

In FIG. 7 , the conductive terminal A 5 is fitted into the through hole A 4 via the conductive through hole pin A 10 , which is in contact with an inner surface of the through hole A 4 as well as an outer surface of the conductive terminal A 5 . However, the conductive terminal A 5 may be directly fitted into the through hole A 4 without the through hole pin A 10 . Further, metal plating may be provided in an inner surface of the through hole A 4 , instead of providing the through hole pin A 10 .

In the present invention, the numbers of the through holes, conductive layers, and insulating layers are not limited to those described in the above embodiments. Further, in the present invention, a circuit board through which an electric current of a desired magnitude flows can be configured by selecting a thickness and the number of the conductive layers accordingly.

In the above embodiments, a counterbored hole is formed concentric with a through hole corresponding thereto. However, the counterbored hole or a cylindrical recess may have a center thereof offset from that of the through hole. Further, if the cylindrical recess has the center offset from that of the through hole, a flange part thereof may be formed accordingly.

The drills d 1 to d 4 may not have same diameters as those of holes to be drilled therewith. For example, the small-diametered drills d 1 ,d 3 may be used more than once to drill the large-diametered counterbored holes 17 a , 17 b.

The embodiments according to the present invention have been explained as aforementioned. However, the embodiments of the present invention are not limited to those explanations, and those skilled in the art ascertain the essential characteristics of the present invention and can make the various modifications and variations to the present invention to adapt it to various usages and conditions without departing from the spirit and scope of the claims.