Power-control circuit with threshold limiting characteristics

This application hereby claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application Ser. No. 60/853,160, filed 20 Oct. 2006, entitled “POWER-CONTROL ARCHITECTURE WITH THRESHOLD LIMITING CHARACTERISTICS”. The present invention is related to that disclosed in U.S. Provisional Patent Application Ser. No. 60/853,160. U.S. Provisional Patent Application Ser. No. 60/853,160 is assigned to the assignee of the present application. The subject matter disclosed in U.S. Provisional Patent Application Ser. No. 60/853,160 is hereby incorporated by reference into the present disclosure as if fully set forth herein.

Embodiments of the present invention relate generally to radio frequency (RF) power amplifiers and more specifically, to a power-control circuit with threshold limiting characteristics.

Radio frequency (RF) power amplifiers are often used in wireless devices, such as cellular telephones. Extending the battery life is a key concern for users and manufacturers of these wireless devices. One of the key factors in determining the battery life of a wireless device is the power consumption of the RF power amplifiers. The RF power amplifiers are designed to operate into an optimal load impedance and are typically coupled to an antenna of the wireless device.

However, under a load mismatch condition, such as, for example, when the antenna of the wireless device approaches objects (e.g., metal structures, human contact, a hand, etc., in the near field of the antenna, or the like), the load impedance of the RF power amplifier changes and the RF power amplifier draws excess current. In some cases, the current can exceed more than two times the current drawn under an optimal load impedance. When the RF power amplifier draws excess current, the battery life of the wireless device is reduced. In addition, the adjacent channel power ratio (ACPR) and error vector magnitude (EVM) linearity and distortion limits are often exceeded when the RF power amplifier draws excess current. This reduction in battery life and distortion limits of the wireless device is undesirable.

FIG. 1 illustrates a schematic diagram of a power-control circuit 100 according to the prior art. Power-control circuit 100 includes a low drop-out (LDO) circuit 102 , RF amplifier stages A 1 -A 3 , a battery voltage V BATT , an RF IN signal, a RF OUT signal and a V RAMP signal. LDO circuit 102 includes a divider network R 1 and R 2 , a comparator 104 , and a transistor Q 1 . As the collector voltage V CC in the RF amplifier stages A 1 -A 3 decreases, due to, for example, a load mismatch condition, comparator 104 senses voltage Vd across the divider network R 1 and R 2 and compares voltage Vd with V AMP . The output of comparator 104 is applied to transistor Q 1 , which adjusts collector voltage V CC until voltage Vd equalizes with the V RAMP signal, thereby substantially maintaining the collector voltage V CC at a specified voltage.

However, the use of power-control circuit 100 is disadvantageous, because LDO circuit 102 does not provide a mechanism to limit the amount of current that is driven into the RF amplifier stages A 1 -A 3 . For example, under a load mismatch condition, LDO circuit 102 will continue to drive as much current as is necessary in order to maintain the collector voltage V CC constant with respect to the V RAMP signal. Among other things, this reduces the efficiency of RF amplifier stages A 1 -A 3 and decreases the battery life of the wireless device, which, as described above, is disadvantageous for users and manufacturers of these wireless devices.

Another disadvantage of power-control circuit 100 is that it adversely affects the characteristics of the power control loop of the LDO circuit, even under normal operation. For example, as the collector voltage V CC is ramping to a specified output limit, as defined by the V RAMP signal, a sharp discontinuity occurs when the collector voltage V CC equals the V RAMP signal. This sharp discontinuity is commonly referred to as a hard limit and causes various spurious emissions and unwanted harmonics in the frequency domain. These spurious emissions and unwanted harmonics are undesirable.

The novel features believed to be characteristic of embodiments of the invention are set forth in the appended claims. However, embodiments of the invention will best be understood by reference to the following detailed description when read in conjunction with the accompanying drawings, wherein embodiments of the invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings in which like reference numerals refer to similar elements.

FIG. 1 illustrates a schematic diagram of a power-control circuit according to the prior art;

FIG. 2 illustrates a high-level block diagram of a wireless device according to an exemplary embodiment of the present invention;

FIG. 3 illustrates a schematic diagram of a power-control circuit according to one embodiment of the present invention;

FIG. 4 illustrates a schematic diagram of a power-control circuit according to another embodiment of the present invention;

FIG. 5 illustrates a schematic diagram of a power-control circuit according to another embodiment of the present invention; and

FIG. 6 illustrates a schematic diagram of a power-control circuit according to another embodiment of the present invention.

Reference will now be made to the following detailed description of the exemplary embodiments of the present invention. Those skilled in the art will recognize that embodiments of the present invention provide many inventive concepts and novel features that are merely illustrative and not to be construed as restrictive. Accordingly, the specific embodiments discussed herein are given by way of example and do not limit the scope of the embodiments of the present invention. In addition, those skilled in the art will understand that for purposes of explanation, numerous specific details are set forth, though embodiments of the invention can be practiced without these specific details, and that certain features have been omitted so as to more clearly illustrate embodiments of the invention.

FIG. 2 illustrates a high-level block diagram of a wireless device 200 according to an exemplary embodiment of the present invention. In one embodiment of the present invention, wireless device 200 comprises an antenna 202 , a switch/duplexer 204 , a transmitter 206 , a receiver 208 , TX/RX circuitry 210 , a speaker/microphone 212 , a main processor 214 , a display/keypad 216 , a memory 218 , and a battery 220 . Wireless device 200 may be any wireless device, including, but not limited to, conventional cellular telephones, paging devices, personal digital assistant devices, text-messaging devices, portable computers, or any other like device capable of wireless communication.

As will be explained below in greater detail, transmitter 206 comprises radio frequency (RF) power amplifier circuitry including one or more current limiting circuits, one or more RF power amplifier stages, and other like circuitry. In one embodiment of the present invention, the RF power amplifier circuitry of transmitter 206 is formed on a Gallium Arsenide (GaAs) substrate. However, other semiconductor materials (e.g., silicon, silicon germanium, indium phosphide, gallium nitride, silicon carbide) may be used. In addition, for purposes of illustration and ease of explanation, embodiments of the present invention are described in terms of bipolar junction transistor (BJT) technology (e.g., heterojunction bipolar transistors (HBTs)). However, embodiments of the invention may be practiced using other transistor technology, including, for example, but not limited to, field effect transistor (FET) technology (e.g., metal-semiconductor field effect transistors (MESFETs) and pseudomorphic high electron mobility transistors (pHEMTs)) or complementary metal-oxide semiconductor (CMOS) technology.

TX/RX circuitry 210 receives from antenna 202 an incoming signal, transmitted by, for example, a communication system or a wireless network provider, through switch/duplexer 204 and receiver 208 . TX/RX circuitry 210 processes and sends the incoming signal to the speaker (i.e., voice data) or to main processor 214 (e.g., web browsing) for further processing. Likewise, TX/RX circuitry 210 receives analog or digital voice data from the microphone or other outgoing data (e.g., web data, e-mail) from main processor 214 . TX/RX circuitry 210 transmits an RF signal that is transmitted through transmitter 206 via antenna 202 .

Main processor 214 executes a basic operating system program stored in memory 218 in order to control the overall operation of wireless device 200 . For example, main processor 214 controls the reception of signals and the transmission of signals by TX/RX circuitry 210 , receiver 208 , and transmitter 206 . Main processor 214 is capable of executing other processes and programs resident in memory 218 and may move data into or out of memory 218 , as required by an executing process.

Main processor 214 is also coupled to display/keypad 216 . The user of wireless device 200 uses the keypad to enter data into wireless device 200 . The display may be a liquid crystal display capable of rendering text and/or at least various graphics; alternate embodiments may use other types of displays. Battery 220 is coupled with the electrical components of wireless device 200 , in accordance with known electrical principles.

Those skilled in the art will recognize that wireless device 200 is given by way of example and that for simplicity and clarity, only so much of the construction and operation of wireless device 200 as is necessary for an understanding of the present invention is shown and described. For example, wireless device 200 is capable of communicating using one or more of a number of conventional standards, including, but not limited to GSM/EDGE, CDMA, W-CDMA, or the like. In addition, or as an alternative, although an exemplary wireless device 200 is shown and described, embodiments of the present invention contemplate any suitable component or combination of components performing any suitable tasks in association with wireless device 200 , according to particular needs. Moreover, it is understood that wireless device 200 should not be construed to limit the types of devices in which embodiments of the present invention may be implemented.

In accordance with the principles of embodiments of the present invention, the RF power amplifier circuitry of transmitter 206 of wireless device 200 provides for maintaining certain parameters within the RF power amplifier circuitry above certain threshold levels, as described below in greater detail. In addition, or as an alternative, below the threshold levels, the RF power amplifier circuitry control-loop parameters are unchanged.

FIG. 3 illustrates a schematic diagram of a power-control circuit 300 according to one embodiment of the present invention. Power-control circuit 300 comprises a current limiting circuit 302 , a V RAMP signal, a plurality of RF amplifier stages A 4 -A 6 , an RF IN signal, an RF OUT signal, and a battery voltage V BATT . Current limiting circuit 302 comprises transistors Q 2 and Q 3 , a differential amplifier 304 , a summing network 306 , a voltage divider network R 3 and R 4 , and a resistor R 5 . Although differential amplifier 304 is shown and described as a differential amplifier, embodiments of the present invention contemplate any circuit which detects a difference in two voltage levels and outputs a signal corresponding to this difference.

In one embodiment of the present invention, transmitter 206 of wireless device 200 of FIG. 2 comprises RF power amplifier circuitry including power-control circuit 300 . In addition or as an alternative, the plurality of RF amplifier stages A 4 -A 6 are RF amplification stages associated with the RF power amplifier circuitry of wireless device 200 . The plurality of RF amplifier stages A 4 -A 6 may be driven by the RF IN signal via a RF driver stage or by TX/RX circuitry 210 of wireless device 200 . In addition, the plurality of RF amplifier stages A 4 -A 6 may transmit the RF OUT signal into a load. In one embodiment of the present invention, the load may be an antenna and may be, for example, antenna 202 of wireless device 200 . The plurality of RF amplifier stages A 4 -A 6 , and in particular RF amplifier stage A 6 , may experience a load mismatch of antenna 202 of wireless device 200 .

To further explain the operation of power-control circuit 300 , an example is now given. In the following example, RF amplifier stage A 6 experiences a load mismatch condition, such as, for example, when antenna 202 of wireless device 200 comes in close proximity with objects, for example, a hand, in the near field of antenna 202 , or the like. Although a load mismatch condition of RF amplifier stage A 6 of the plurality of RF amplifier stages A 4 -A 6 is described as a load mismatch generated from an antenna mismatch condition, embodiments of the present invention contemplate any suitable load mismatch condition. For example, a load mismatch condition may be any load mismatch condition that causes collector current I CC to increase in the plurality of RF amplifier stages A 4 -A 6 , thereby increasing the power consumption and decreasing the battery life or exceeding the adjacent channel power ratio (ACPR) and error vector magnitude (EVM) limits of wireless device 200 .

In an embodiment of the present invention, transistor Q 3 is a current mirror transistor, and is coupled in parallel with transistor Q 2 , such that the gate and drain of transistor Q 3 are coupled to the gate and drain of transistor Q 2 , respectively. Since transistor Q 3 is configured as a mirror transistor, transistor Q 3 senses a portion of the current flowing through transistor Q 2 , such that the current flowing through transistor Q 3 is proportional to the current flowing through transistor Q 2 . In addition, because transistor Q 3 is configured as a mirror transistor, transistor Q 3 may be sized smaller than, for example, the size of transistor Q 2 . As an example only and not by way of limitation, transistor Q 2 may be sized to handle several amps of current flowing through transistor Q 2 , wherein transistor Q 3 may be sized to handle only a hundredth of the current flowing through transistor Q 2 . However, even though transistor Q 3 may be sized smaller than transistor Q 2 , the current flowing through transistor Q 3 is proportional to the current flowing through transistor Q 2 .

Thus, in accordance with the principles of embodiments of the present invention, the current flowing through transistor Q 3 generates a voltage V 1 that is proportional to collector current I CC . Transistor Q 3 provides voltage V 1 at one input of summing network 306 . Although transistor Q 3 is shown and described as a current mirror transistor, embodiments of the present invention contemplate any suitable transistor or combination of transistors performing the same or substantially similar function as transistor Q 3 .

In an embodiment of the present invention, voltage divider network R 3 and R 4 senses collector voltage V CC that is supplied to the plurality of RF amplifier stages A 4 -A 6 . In addition, voltage divider network R 3 and R 4 provides a voltage V 2 at another input of summing network 306 , wherein voltage V 2 is proportional to collector voltage V CC . Voltages V 1 and V 2 are then applied to summing network 306 . Summing voltage V S of summing network 306 has the following dependence on voltages V 1 and V 2 :

V S =α×V 2+β×max(0 ,I CC −I T )  (1)

where α and β are fixed gains and threshold current I T is a threshold value that is set during the design phase of power-control circuit 300 . In addition, α and β provide the ability to determine how aggressively collector current I CC is limited by the threshold value of threshold current I T .

To further explain the threshold value of threshold current I T , an example is now given. In the following example, the maximum current of the plurality of RF amplifier stages A 4 -A 6 may require a current limit, such as, for example, 2.3 Amps. The threshold value of threshold current I T may be set to any value below the current limit, such as, for example, 2.0 Amps. Although an example maximum current and an example threshold current I T is described, embodiments of the present invention contemplate using any maximum current or any threshold value of threshold current I T .

As shown and described in equation 1, when collector current I CC is below the threshold value of threshold current I T , the control-loop parameters of power-control circuit 300 are unchanged. For example, when collector current I CC is below the threshold value of threshold current I T , 0 is the maximum as between 0 and (I CC −I T ). Thus, multiplying β by 0 eliminates β from the calculation of summing voltage V s , and summing voltage V S is proportional to collector voltage V CC because V 2 is proportional to V CC . In addition, when collector current I CC is equal to the threshold value of threshold current I T , the control-loop parameters of power-control circuit 300 are also unchanged, because collector current I CC minus threshold current I T is equal to zero, (i.e., (I CC −I T =0)).

However, when collector current I CC exceeds the threshold value of threshold current I T , there is excess current, and summing voltage V S is increased by an amount proportional to the excess current. For example, summing voltage V S , which is the output of summing network 306 , is input into differential amplifier 304 and results in a reduction of collector voltage V CC , thereby limiting the excess current. The form of the collector voltage V CC dependence is:

V CC =G 1× V RAMP −G 2×max(0 ,I CC −I T )  (2)

where G 1 and G 2 are fixed gains. It is important to note, with reference to equation (2), that below the threshold value of threshold current I T , collector voltage V CC is proportional to the V RAMP signal, with an essentially fixed gain G 1 . However, once collector current I CC exceeds the threshold value of threshold current I T , the gain of collector voltage V CC and the V RAMP signal is progressively reduced with increasing current. Among other things, the continuity in collector voltage V CC coupled with the ability to adjust the gain about the threshold value of threshold current I T , provides control-loop stability for power-control circuit 300 and minimizes any spurious emissions associated with the plurality of RF amplifier stages A 4 -A 6 .

Although current limiting circuit 302 is shown and described as supplying collector voltage V CC of the plurality of RF amplifier stages A 4 -A 6 , embodiments of the present invention contemplate supplying an output RF power amplifier stage, or a driver RF power amplifier stage, or any combination of RF power amplifier stages.

As described above, the threshold value of threshold current I T may be set to any value below a maximum current limit using current limiting circuit 302 . However, unlike in the prior art, no abrupt discontinuity occurs in collector voltage V CC as a function of the V RAMP signal at the threshold value of threshold current I T . Embodiments of the present invention use the threshold value of threshold current I T to progressively reduce the increasing current associated with the plurality of RF amplifier stages A 4 -A 6 as collector voltage V CC is increased in response to the V RAMP signal. Among other things, this reduces any spurious emissions and unwanted harmonics in the frequency domain of embodiments of the present invention, which enables embodiments of the present invention to provide control-loop stability for power-control circuit 300 .

In addition, because the maximum current of the plurality of RF amplifier stages A 4 -A 6 is limited under load mismatch conditions, the battery life of, for example, battery 220 of wireless device 200 , is increased relative to prior art circuits that do not limit the maximum current. Among other things, this increases the talk time associated with wireless device 200 , improves the ruggedness of the plurality of RF amplifier stages A 4 -A 6 , and reduces any excessive heating associated with power-control circuit 300 .

FIG. 4 illustrates a schematic diagram of a power-control circuit 400 according to another embodiment of the present invention. Power-control circuit 400 comprises a current limiting circuit 402 , V RAMP signal, a plurality of RF amplifier stages A 4 -A 6 , RF IN signal, RF OUT signal, and battery voltage V BATT . Current limiting circuit 402 comprises transistor Q 4 , a differential amplifier 404 , a summing network 406 , a diode D 1 , a voltage divider network R 6 and R 7 , and resistors R 8 and R 9 . As discussed above, although a differential amplifier is shown and described, embodiments of the present invention contemplate any circuit which detects a difference in two voltage levels and outputs a signal corresponding to this difference.

FIG. 4 is similar to FIG. 3 , except that rather than using a current mirror transistor to generate voltage V 1 , embodiments of the present invention operate in conjunction with diode D 1 and resistors R 8 and R 9 to generate voltage V 1 . For example, the voltage drop across a forward-biased diode, e.g., diode D 1 , will decrease with an increase in temperature. Therefore, voltage V 1 increases with the increase in temperature in conjunction with resistors R 8 and R 9 . In addition, as described above, voltages V 1 and V 2 are similarly applied to summing network 406 and the voltage dependencies of current limiting circuit 402 are:

V S =α×V 2+β×max(0 ,T−T 0 )  (3) V CC =G 1× V RAMP −G 2×max(0 ,T−T 0 )  (4)

where T equals the temperature of diode D 1 , T 0 equals the threshold temperature, and α, β, G 1 , G 2 , are fixed gains.

In one embodiment of the present invention, transmitter 206 of wireless device 200 of FIG. 2 comprises RF power amplifier circuitry including power-control circuit 400 . In addition or as an alternative, the plurality of RF amplifier stages A 4 -A 6 are RF amplification stages associated with the RF power amplifier circuitry of wireless device 200 . The plurality of RF amplifier stages A 4 -A 6 may be driven by the RF IN signal via a RF driver stage or by TX/RX circuitry 210 of wireless device 200 . In addition, the plurality of RF amplifier stages A 4 -A 6 may transmit the RF OUT signal into a load. In one embodiment of the present invention, the load may be an antenna and may be, for example, antenna 202 of wireless device 200 . The plurality of RF amplifier stages A 4 -A 6 , and in particular RF amplifier stage A 6 , may experience a load mismatch of antenna 202 of wireless device 200 .

In an embodiment of the present invention, diode D 1 and resistors R 8 and R 9 of current limiting circuit 402 provide temperature compensation for power-control circuit 400 . Although a single diode D 1 and resistors R 8 and R 9 are shown and described for compensating for the temperature variation of power-control circuit 400 , any number of diodes or resistors may be used. As an example only and not by way of limitation, when the temperature increases in power-control circuit 400 , and in particular when the temperature increases in current limiting circuit 402 , the voltage across diode D 1 decreases and additional current is pulled through diode D 1 and resistors R 8 and R 9 , thereby providing an increase in voltage V 1 .

In addition, or as an alternative, when the temperature decreases in power-control circuit 400 , and in particular when the temperature decreases in current limiting circuit 402 , the voltage across diode D 1 increases and less current is pulled through diode D 1 and resistors R 8 and R 9 , thereby resulting in a decrease in voltage V 1 . Thus, in accordance with the principles of embodiments of the present invention, diode D 1 and resistors R 8 and R 9 provide for temperature compensation of power-control circuit 400 .

FIG. 5 illustrates a schematic diagram of a power-control circuit 500 according to another embodiment of the present invention. Power-control circuit 500 comprises a current limiting circuit 502 , V RAMP signal, an RF amplifier circuit 508 , RF IN signal, RF OUT signal, a bias voltage V BIAS , and a battery voltage V BATT . Current limiting circuit 502 comprises transistor Q 5 , a differential amplifier 504 , a summing network 506 , and a voltage divider network R 10 and R 11 . As discussed above, although a differential amplifier is shown and described, embodiments of the present invention contemplate any circuit which detects a difference in two voltage levels and outputs a signal corresponding to this difference.

RF amplifier circuit 508 comprises transistors Q 6 -Q 8 , resistors R 12 -R 14 , capacitors C 1 -C 4 , and inductors L 1 -L 3 . For simplicity and clarity, only transistors Q 6 -Q 8 , resistors R 12 -R 14 , capacitors C 1 -C 4 , and inductors L 1 -L 3 of RF amplifier circuit 508 are shown and described. Although RF amplifier circuit 508 is shown and described as having only these components, any number of transistors, capacitors, resistors, inductors, or other components may be used.

FIG. 5 is similar to FIG. 3 , except that rather than using a current mirror transistor to generate voltage V 1 , embodiments of the present invention operate in conjunction with the bias network associated with RF amplifier circuit 508 to generate voltage V 1 . As an example only, and not by way of limitation, the bias network of RF amplifier circuit 508 generates a voltage V 1 that is proportional to the current flowing through the output stage of RF amplifier circuit 508 .

In one embodiment of the present invention, voltage V 1 is generated from the bias network associated with the output stage of RF amplifier circuit 508 . Although voltage V 1 is shown and described as generated from the bias network of the output stage associated with RF amplifier circuit 508 , embodiments of the present invention contemplate generating voltage V 1 from the bias network associated with transistor Q 6 , or transistor Q 7 , or transistor Q 8 , or any combination of bias networks of RF amplifier circuit 508 . In addition, as described above, voltages V 1 and V 2 are applied to summing network 506 and therefore, equations (1) and (2) are likewise valid for current limiting circuit 502 .

In one embodiment of the present invention, transmitter 206 of wireless device 200 of FIG. 2 comprises RF power amplifier circuitry including power-control circuit 500 . In addition or as an alternative, RF amplifier circuit 508 is a plurality of RF amplification stages associated with the RF power amplifier circuitry of wireless device 200 . RF amplifier circuit 508 may be driven by the RF IN signal via a RF driver stage or by TX/RX circuitry 210 of wireless device 200 . In addition, RF amplifier circuit 508 may transmit the RF OUT signal into a load. In one embodiment of the present invention, the load may be an antenna and may be, for example, antenna 202 of wireless device 200 . RF amplifier circuit 508 and in particular transistor Q 8 may experience a load mismatch of antenna 202 of wireless device 200 .

Thus, in accordance with the principles of embodiments of the present invention, when the current increases in the bias network associated with RF amplifier circuit 508 , collector voltage V CC is adjusted to limit the maximum collector current I CC of RF amplifier circuit 508 . Among other things, this decreases the power consumption and increases the battery life of, for example, battery 220 , of wireless device 200 relative to prior art circuits that do not limit the maximum current. In addition, among other things, this increases the talk time associated with wireless device 200 , improves the ruggedness of RF amplifier circuit 508 , and reduces any excessive heating associated with power-control circuit 500 .

FIG. 6 illustrates a schematic diagram of a power-control circuit 600 according to another embodiment of the present invention. Power-control circuit 600 comprises a current limiting circuit 602 , V RAMP signal, a plurality of RF amplifier stages A 4 -A 6 , RF IN signal, RF OUT signal, and battery voltage V BATT . Current limiting circuit 602 comprises transistors Q 6 and Q 7 , a differential amplifier 604 , a summing network 606 , a diode D 2 , a voltage divider network R 15 and R 16 , and resistors R 17 - 19 . As discussed above, although a differential amplifier is shown and described, embodiments of the present invention contemplate any circuit which detects a difference in two voltage levels and outputs a signal corresponding to this difference.

As described above, the current flowing through transistor Q 7 generates a voltage V 1 at one input of summing network 606 , wherein voltage V 1 is proportional to the current flowing through transistor Q 6 . In addition, voltage divider network R 15 and R 16 provides a voltage V 2 at another input of summing network 606 , wherein voltage V 2 is proportional to collector voltage V CC . In addition, or as an alternative, diode D 2 and resistors R 18 and R 19 generate voltage V 3 at another input of summing network 606 , wherein voltage V 3 provides for temperature compensation for power-control circuit 600 . Voltages V 1 -V 3 are then applied to summing network 606 . Summing voltage V S and collector voltage V CC have the following dependencies on voltages V 1 -V 3 :

V S =α×V 2+β1×max(0 ,I CC −I T )+β2×max(0 ,T−T 0 )  (5)

V CC =G 1× V RAMP −G 2×max(0 ,I CC −I T )− G 3×max(0 ,T−T 0 )  (6)

where T equals the temperature of diode D 2 , T 0 equals the threshold temperature, and α, β 1 , β 2 , G 1 , G 2 , and G 3 are fixed gains.

In one embodiment of the present invention, transmitter 206 of wireless device 200 of FIG. 2 comprises RF power amplifier circuitry including power-control circuit 600 . In addition or as an alternative, the plurality of RF amplifier stages A 4 -A 6 are RF amplification stages associated with the RF power amplifier circuitry of wireless device 200 . The plurality of RF amplifier stages A 4 -A 6 may be driven by the RF IN signal via a RF driver stage or by TX/RX circuitry 210 of wireless device 200 . In addition, the plurality of RF amplifier stages A 4 -A 6 may transmit the RF OUT signal into a load. In one embodiment of the present invention, the load may be an antenna and may be, for example, antenna 202 of wireless device 200 . The plurality of RF amplifier stages A 4 -A 6 and in particular RF amplifier stage A 6 may experience a load mismatch of antenna 202 of wireless device 200 .

Thus, in accordance with the principles of embodiments of the present invention, when the collector current I CC increases in the plurality of RF amplifier stages A 4 -A 6 , collector voltage V CC is adjusted to limit the maximum collector current I CC of the plurality of RF amplifier stages A 4 -A 6 . Among other things, this decreases the power consumption and increases the battery life of, for example, battery 220 , of wireless device 200 relative to prior art circuits that do not limit the maximum current. In addition, among other things, this increases the talk time associated with wireless device 200 , improves the ruggedness of the plurality of RF amplifier stages A 4 -A 6 , and reduces any excessive heating associated with power-control circuit 600 .

In another embodiment of the present invention, when the temperature increases in power-control circuit 600 , and in particular when the temperature increases in current limiting circuit 602 , the voltage across diode D 2 decreases and additional current is pulled through diode D 2 and resistors R 18 and R 19 , thereby providing an increase in voltage V 1 . Conversely, when the temperature decreases in power-control circuit 600 , and in particular when the temperature decreases in current limiting circuit 602 , the voltage across diode D 2 increases and less current is pulled through diode D 2 and resistors R 18 and R 19 , thereby providing an decrease in voltage V 1 . Thus, in accordance with the principles of embodiments of the present invention, diode D 2 and resistors R 18 and R 19 provide for temperature compensation of power-control circuit 600 .

Reference in the foregoing specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.

While the exemplary embodiments of the present invention have been shown and described, it will be understood that various changes and modifications to the foregoing embodiments may become apparent to those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, the invention is not limited to the embodiments disclosed, but rather by the appended claims and their equivalents.