USPatent applicationPatented

Power supply apparatus and liquid crystal display including the same

Granted 2 Aug 2011 · 1 office action

Current assignee: Samsung Display · originally Samsung Electronics

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Attorney: Attorney · Log in to unlock

Inventors: Dal-jung Kwon, Eui-dong Hwang, Moon-shik Kang, Young-sub Kwon · Examiner: Nitin Patel · AU 2629 · TC 2600

Life of the application

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Abstract

A power supply apparatus capable of reducing power consumption and a liquid crystal display including the power supply apparatus includes a first DC-AC converting unit enabled by a driving signal to convert a DC voltage into a first AC voltage, increase the first AC voltage, and supply the increased first AC voltage as a first power supply voltage; a switching unit which selectively transmits the driving signal in response to a selection signal; and a second DC-AC converting unit enabled by the driving signal selectively transmitted by the switching unit to convert the DC voltage into a second AC voltage, increase the second AC voltage, and supply the increased second AC voltage as a second power supply voltage.

Description

11 parts
›This application claims priority to Korean Patent Application…

This application claims priority to Korean Patent Application No. 10-2006-0094263, filed on Sep. 27, 2006, and all the benefits accruing therefrom under 35 U.S.C. §119, the contents of which in its entirety are herein incorporated by reference.

›BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to a power supply apparatus and a liquid crystal display including the same, and more particularly, to a power supply apparatus capable of reducing power consumption and a liquid crystal display including the same.

2. Description of the Related Art

A liquid crystal display “LCD” typically includes a liquid crystal panel, which has a first display panel including a plurality of pixel electrodes, a second display panel including a common electrode, and a liquid crystal layer with dielectric anisotropy interposed between the first and second display panels. An electric field is formed between the pixel electrode and the common electrode. When the strength of the electric field is adjusted, the amount of light passing through the liquid crystal panel is controlled, which results in a desired image to be displayed.

Such a liquid crystal display is not a self-emitting display, and is thus provided with a plurality of lamps serving as a light source. If all of the lamps are driven, the power consumption is at a maximum. However, depending upon a user's intention or a usage state of a device including an LCD, it is desirable to reduce the power consumption of the display. For example, where the LCD power source is a battery, in order to reduce the power consumption of the lamps (and hence conserve battery power), to the lamps are selectively driven.

›BRIEF SUMMARY OF THE INVENTION

Aspects of the present invention provide a power supply apparatus capable of reducing power consumption.

Aspects of the present invention also provide a liquid crystal display capable of reducing power consumption.

According to an exemplary embodiment of the present invention, there is provided a power supply apparatus including: a first DC-AC converting unit enabled by a driving signal to convert a DC voltage into a first AC voltage, increase the first AC voltage and to supply the increased first AC voltage as a first power supply voltage; a switching unit which selectively transmits the driving signal in response to a selection signal; and a second DC-AC converting unit enabled by the driving signal selectively transmitted by the switching unit to convert the DC voltage into a second AC voltage, increase the second AC voltage, and supply the increased second AC voltage as a second power supply voltage.

According to another exemplary embodiment of the present invention, there is provided a power supply apparatus including: a first DC-AC converting unit enabled by a driving signal to convert a DC voltage into a first AC voltage, increase the first AC voltage and to supply the increased first AC voltage as a first power supply voltage; a switching unit which selectively transmits the DC voltage in response to a selection signal; and a second DC-AC converting unit enabled by the driving signal to convert the DC voltage selectively transmitted by the switching unit into a second AC voltage, increase the second AC voltage, and supply the increased second AC voltage as a second power supply voltage.

According to another exemplary embodiment of the present invention, they are is provided a liquid crystal display including: a backlight assembly that emits light and having a plurality of lamps arranged into a first lamp unit and a second lamp unit and a power supply apparatus that supplies a power supply voltage to the first lamp unit and selectively supplies the power supply voltage to the second lamp unit in response to a selection signal; and a liquid crystal panel assembly that receives the light emitted from the backlight assembly and implements an image display.

Details of other exemplary embodiments are included in this specification and the accompanying drawings.

›BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects and features of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:

FIG. 1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention;

FIG. 2 is a block diagram illustrating a power supply apparatus according to another exemplary embodiment of the present invention;

FIG. 3A is a circuit diagram illustrating an exemplary embodiment of the DC-AC converting unit of the power supply apparatus shown in FIGS. 1 and 2 ;

FIG. 3B is an equivalent circuit diagram of the second DC-AC converting unit included in the DC-AC converting unit of FIG. 3A when a selection signal is at a high level;

FIG. 3C is a table illustrating the operation of the second DC-AC converting unit of FIG. 3A ;

FIG. 4A is a circuit diagram illustrating another exemplary embodiment of the DC-AC converting unit of the power supply apparatus shown in FIGS. 1 and 2 ;

FIG. 4B is an equivalent circuit diagram of the second DC-AC converting unit included in the DC-AC converting unit of FIG. 4A when the selection signal is at the high level;

FIG. 4C is a table illustrating the operation of the second DC-AC converting unit of FIG. 4A ;

FIG. 5A is a circuit diagram illustrating another exemplary embodiment of the DC-AC converting unit of the power supply apparatus shown in FIGS. 1 and 2 ;

FIG. 5B is an equivalent circuit diagram of the second DC-AC converting unit included in the DC-AC converting unit of FIG. 5A when the selection signal is at the high level;

FIG. 5C is a table illustrating the operation of the second DC-AC converting unit of FIG. 5A ;

FIG. 6A is a circuit diagram illustrating another exemplary embodiment of the DC-AC converting unit of the power supply apparatus shown in FIGS. 1 and 2 ;

FIG. 6B is an equivalent circuit diagram of the second DC-AC converting unit included in the DC-AC converting unit of FIG. 6A when the selection signal is at the high level;

FIG. 6C is a table illustrating the operation of the second DC-AC converting unit of FIG. 6A ;

FIG. 7 is a block diagram illustrating a power supply apparatus according to another exemplary embodiment of the present invention;

FIG. 8 is a circuit diagram illustrating a power supply apparatus according to another exemplary embodiment of the present invention;

FIG. 9 is a circuit diagram illustrating a power supply apparatus according to another exemplary embodiment of the present invention; and

FIG. 10 is a circuit diagram illustrating a power supply apparatus according to another exemplary embodiment of the present invention.

›DETAILED DESCRIPTION OF THE INVENTION · 1 of 7

The invention now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout.

It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.

Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another elements as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The exemplary term “lower”, can therefore, encompasses both an orientation of “lower” and “upper,” depending of the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The exemplary terms “below” or “beneath” can, therefore, encompass both an orientation of above and below.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Exemplary embodiments of the present invention are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments of the present invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the present invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present invention.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

A liquid crystal display according to an exemplary embodiment of the invention will now be described with reference to FIG. 1 . FIG. 1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the invention.

Referring to FIG. 1 , a liquid crystal display 1 according to an exemplary embodiment of the invention includes a backlight assembly 100 and a liquid crystal panel assembly 400 , with the backlight assembly 100 further including a power supply apparatus 200 and a plurality of lamps 300 .

The power supply apparatus 200 includes an AC input unit 210 , an AC-DC rectifying unit 220 , a DC-DC converting unit 230 , and a DC-AC converting unit 240 . The lamps 300 are classified into a first lamp unit ( 300 _ 1 and 300 — n ) and a second lamp unit ( 300 _ 2 ). The power supply apparatus 200 supplies power supply voltages Vac_ 1 and Vac — n to the first lamp unit 300 _ 1 and 300 — n and selectively supplies a power supply voltage Vac_ 2 to the second lamp unit 300 - 2 in response to a selection signal “SEL”. As described herein, the “first lamp unit” and the “second lamp unit” are used to distinguish between a lamp to which the power supply apparatus 200 continuously supplies a power supply voltage from a lamp to which the power supply apparatus 200 selectively supplies a power supply voltage. A “lamp unit” may refer to one or more lamps, and thus does not necessarily mean a plurality of lamps.

›DETAILED DESCRIPTION OF THE INVENTION · 2 of 7

In an exemplary embodiment, an input AC voltage of 120 V is supplied to the AC input unit 210 , such as through a plug that is plugged into a receptacle outlet.

The AC-DC rectifying unit 220 converts the output AC voltage “AC” of the AC input unit 210 into a first DC voltage DC 1 and supplies the first DC voltage DC 1 to the DC-DC converting unit 230 . The AC-DC rectifying unit 220 may have a PFC (power factor correction) function associated therewith.

The DC-DC converting unit 230 converts the first DC voltage DC 1 into a second DC voltage DC 2 . In one embodiment, the second DC voltage DC 2 may have a voltage level higher than the first DC voltage DC 1 . The DC-DC converting unit 230 may be a buck converter or a boost converter.

In the event that the liquid crystal display 1 uses a battery as the input power source thereto, the AC input unit 210 and the AC-DC rectifying unit 220 may be omitted . The DC-DC converting unit 230 may also be omitted if not necessary.

The DC-AC converting unit 240 is enabled by a driving signal CONT to convert the second DC voltage DC 2 into power supply voltages Vac_ 1 to Vac_n. The DC-AC converting unit 240 may selectively supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 in response to the selection signal SEL. The DC-AC converting unit 240 may include a plurality of inverter circuits, wherein the inverter circuit may be a half bridge inverter, a full bridge inverter, or a push-pull inverter. The driving signal CONT may be a signal for controlling brightness and supplied from a controller (not shown) formed in an integrated circuit. The selection signal SEL may also be supplied from the same or a different controller (not shown) formed in an integrated circuit.

The power supply voltages Vac_ 1 to Vac_n may be selectively supplied to all or some of the lamps 300 _ 1 to 300 — n by supplying the second DC voltage DC 2 to all or some of the plurality of inverter circuits in response to the selection signal SEL or by supplying the driving signal CONT to all or some of the plurality of inverter circuits in response to the selection signal SEL. The internal circuits and detailed operation of the DC-AC converting unit 240 will be described below with reference to FIGS. 3A to 10 .

A lamp unit 300 includes the plurality of lamps 300 _ 1 to 300 — n and emits light using the power supply voltages Vac_ 1 to Vac_n supplied from the power supply apparatus 200 . Since the power supply apparatus 200 selectively supplies the power supply voltages Vac_ 1 to Vac_n, all or some of the plurality of lamps 300 _ 1 to 300 — n emit light.

The backlight assembly 100 may be an edge type or a direct type assembly. In the case of an edge type assembly, the backlight assembly 100 may also include a light guiding plate and one or two lamps are provided at one or both sides of the light guiding plate.

The liquid crystal panel assembly 400 receives light from the backlight assembly 100 and displays images.

The liquid crystal display 1 can selectively drive all or some of the plurality of lamps 300 _ 1 to 300 — n according to user's intention or circumstances. For example, when it is not necessary to increase luminance in respect to the environment, only some of the lamps 300 _ 1 to 300 — n may be driven, thereby reducing the power consumption.

FIG. 2 is a block diagram illustrating a power supply apparatus according to an exemplary embodiment of the invention. For purposes of simplicity, an example in which the first lamp unit and the second lamp unit each have one lamp is described.

Referring to FIG. 2 , the DC-AC converting unit 240 of the power supply apparatus 200 of FIG. 1 includes a first DC-AC converting unit 250 , a second DC-AC converting unit 270 , and a switching unit 260 .

The first DC-AC converting unit 250 is enabled by the driving signal CONT to convert the second DC voltage DC 2 into the power supply voltage Vac_ 1 and supply the power supply voltage Vac_ 1 to the first lamp unit 300 _ 1 .

In response to the selection signal SEL, the switching unit 260 either transmits the driving signal CONT to the second DC-AC converting unit 270 or blocks the driving signal CONT. In other words, selection signal SEL selectively enables or disables the driving signal CONT from controlling the second DC-AC converting unit 270 .

When the switching unit 260 passes the driving signal CONT, the second DC-AC converting unit 270 converts the second DC voltage DC 2 into the power supply voltage Vac_ 2 and supplies the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 . Conversely, when the switching unit 260 blocks the driving signal CONT, the second DC-AC converting unit 270 does not convert the second DC voltage DC 2 into the power supply voltage Vac_ 2 .

Therefore, the power supply apparatus 200 ( FIG. 1 ) can selectively drive the lamps 300 _ 1 and 300 _ 2 .

Exemplary embodiments will now be described with reference to FIGS. 3A to 6C .

FIG. 3A is a circuit diagram illustrating an exemplary embodiment of the DC-AC converting unit of the power supply apparatus shown in FIGS. 1 and 2 , FIG. 3B is an equivalent circuit diagram of the second DC-AC converting unit included in the DC-AC converting unit of FIG. 3A when the selection signal SEL is at a high level, and FIG. 3C is a table illustrating the operation of the second DC-AC converting unit of FIG. 3A .

First, referring to FIG. 3A , a first DC-AC converting unit 251 includes a half-bridge inverter HB_ 1 and a transformer TF_ 1 , and a second DC-AC converting unit 271 includes a half-bridge inverter HB_ 2 and a transformer TF_ 2 .

The half-bridge inverter HB_ 1 includes two MOS transistors Q_P 1 and Q_N 1 and two capacitors C 1 and C 2 , and the half-bridge inverter HB_ 2 includes two MOS transistors Q_P 2 and Q_N 2 and two capacitors C 3 and C 4 . In the embodiment depicted in FIG. 3A , the two MOS transistors Q_P 1 and Q_P 2 are PMOS transistors and the two MOS transistors Q_N 1 and Q_N 2 are NMOS transistors. However, the invention is not limited thereto. For example, both of the two MOS transistors Q_P 1 and Q_N 1 may be PMOS transistors or NMOS transistors, and both of the two MOS transistors Q_P 2 and Q_N 2 may be PMOS transistors or NMOS transistors.

›DETAILED DESCRIPTION OF THE INVENTION · 3 of 7

The half-bridge inverter HB_ 1 of the first DC-AC converting unit 251 is enabled by the driving signal CONT, which includes a P-type driving signal CONT_P and an N-type driving signal CONT_N to convert the second DC voltage DC 2 into an AC voltage at a predetermined level. The transformer TF_ 1 of the first DC-AC converting unit 251 is supplied with an AC voltage at a predetermined level from the half-bridge inverter HB_ 1 , increases (steps up) the AC voltage, and outputs the increased AC voltage as the power supply voltage Vac_ 1 .

The first capacitor C 1 and the second capacitor C 2 are charged with voltages at predetermined levels over which the second DC voltage DC 2 is divided. For example, the first capacitor C 1 and the second capacitor C 2 each may be charged to half of the second DC voltage DC 2 . The third and fourth capacitors C 3 and C 4 are charged in a similar manner with respect to the second DC-AC converting unit 271 .

The P-type driving signal CONT_P and the N-type driving signal CONT_N are input to a gate of a first PMOS transistor Q_P 1 and a gate of a first NMOS transistor Q_N 1 , respectively, such that the first PMOS transistor Q_P 1 and the first NMOS transistor Q_N 1 are alternately enabled. That is, when the first PMOS transistor Q_P 1 is turned on, the first NMOS transistor Q_N 1 is turned off, and when the first PMOS transistor Q_P 1 is turned off, the first NMOS transistor Q_N 1 is turned on.

Therefore, a voltage at a predetermined level is applied to a primary coil CL 1 of the transformer TF_ 1 while the polarity of the voltage varies. For example, if the second DC voltage DC 2 is 12V, then voltages of +6 V and −6 V are alternately applied to the primary coil CL 1 of the transformer TF_ 1 .

The transformer TF_ 1 increases the AC voltage applied to the primary coil CL 1 and outputs the increased AC voltage as the power supply voltage Vac_ 1 . When the power supply voltage Vac_ 1 is supplied, the first lamp unit 300 _ 1 emits light.

In contrast to the first DC-AC converting unit 251 , the P-type driving signal is not directly applied to PMOS transistor Q_P 2 . Rather, the switching unit 261 selectively passes or block the P-type driving signal CONT_P to a gate G 1 of the second PMOS transistor Q_P 2 based on the value of the selection signal SEL. Accordingly, the second DC-AC converting unit 271 selectively supplies the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 . In the embodiment illustrated, the switching unit 261 includes an OR gate “OR” having the selection signal SEL and the P-type driving signal CONT_P as inputs thereto. The output of the OR gate is coupled to the gate G 1 of PMOS transistor Q_P 2 .

An example in which the second DC-AC converting unit 271 supplies the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 3A and 3C .

When the selection signal SEL is at a logic low level L, the P-type driving signal CONT_P is effectively passed through to the gate G 1 of the second PMOS transistor Q_P 2 . That is, when the P-type driving signal CONT_P is at a low level L, a logic low voltage level L is also applied to the gate G 1 of the second PMOS transistor Q_P 2 , and when the P-type driving signal CONT_P is at a high level H, a logic high voltage level H is applied to the gate G 1 of the second PMOS transistor Q_P 2 . Therefore, when SEL is at logic low, the second DC-AC converting unit 271 operates in the same manner as the first DC-AC converting unit 251 , an AC voltage is applied to a primary coil CL 2 of the transformer TF_ 2 , and the transformer TF_ 2 increases (boosts) the applied AC voltage and supplies the increased AC voltage to the second lamp unit 300 _ 2 , such that the second lamp unit 300 _ 2 emits light.

Next, an example in which the second DC-AC converting unit 271 does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 3B and 3C .

When the selection signal SEL is at a high level H, logic high voltage H is applied to the gate G 1 of the second PMOS transistor Q_P 2 , regardless of the value of the P-type driving signal CONT_P. Therefore, the second PMOS transistor Q_P 2 is turned off and thus the second DC-AC converting unit 271 becomes a circuit as illustrated in FIG. 3B . In this case, even though a second NMOS transistor Q_N 2 is turned on or off according to the N-type driving signal CONT_N, an AC voltage is not applied to the primary coil CL 2 and thus the transformer TF_ 2 does not output the power supply voltage Vac_ 2 . As a result, the second lamp unit 300 _ 2 is in an OFF state. Also, prior to the selection signal SEL transitioning to the low level L, the high level voltage H is continuously applied to the gate G 1 of the second PMOS transistor Q_P 2 . Therefore, the second lamp unit 300 _ 2 is held in the OFF state. That is, the gate G 1 of the second PMOS transistor Q_P 2 does not float but instead holds the voltage at the low level L.

Therefore, the DC-AC converting unit 241 selectively supplies the power supply voltage Vac_ 2 according to the value of selection signal SEL. Again, when the selection signal SEL is at the low level L, both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light, whereas when the selection signal SEL is at the high level H, only the first lamp unit 300 _ 1 emits light. In will be appreciated that the switching unit 260 could also be configured in a manner so as to supply the power supply voltages Vac_ 1 and Vac_ 2 to the first and second lamp units 300 _ 1 and 300 _ 2 when the selection signal SEL is at the low level, and supply only the power supply voltages Vac_ 1 to the first lamp unit 300 _ 1 when the selection signal SEL is at the high level.

A power supply apparatus according to another exemplary embodiment of the invention will now be described with reference to FIGS. 4A to 4C .

FIG. 4A is a circuit diagram illustrating the DC-AC converting unit of the power supply apparatus according to another exemplary embodiment of the invention, FIG. 4B is an equivalent circuit diagram of the second DC-AC converting unit included in the DC-AC converting unit of FIG. 4A when the selection signal SEL is at the high level, and FIG. 4C is a table illustrating the operation of the second DC-AC converting unit of FIG. 4A . In FIGS. 4A and 4B , components having the same functions as the components illustrated in FIGS. 3A and 3B are denoted by the same reference numerals and a detailed description thereof is omitted for purposes of simplicity.

›DETAILED DESCRIPTION OF THE INVENTION · 4 of 7

Referring to FIG. 4A , a switching unit 262 either supplies the N-type driving signal CONT_N to the gate G 2 of the second NMOS transistor Q_N 2 or blocks the N-type driving signal CONT_N, depending on the value of selection signal SEL, and thus a second DC-AC converting unit 271 selectively supplies or does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 . In the embodiment illustrated, the switching unit 262 includes an AND gate “AND” and an inverter INV, having the selection signal SEL and the N-type driving signal CONT_N as respective inputs thereto. The inverted value of SEL and the N-type driving signal CONT_N are inputs to the AND gate, and the output of the AND gate is coupled to the gate G 2 of NMOS transistor Q_N 2 .

An example in which the second DC-AC converting unit 271 supplies the power supply voltage Vac_ 2 to the second unit lamp 300 _ 2 will now be described in detail with reference to FIGS. 4A and 4C .

When the selection signal SEL is at the low level L, the N-type driving signal CONT_N is effectively passed through to the gate of the second NMOS transistor Q_N 2 . That is, when the selection signal SEL is at the low level L, the low level voltage L is applied to the gate G 2 of the second NMOS transistor Q_N 2 , and when the N-type driving signal CONT_N is at the high level H, the high level voltage H is applied to the gate G 2 of the second NMOS transistor Q_N 2 . Therefore, when SEL is at logic low, the second DC-AC converting unit 271 operates in the same manner as the above-mentioned first DC-AC converting unit 251 , the AC voltage is applied to the primary coil CL 2 of the transformer TF_ 2 , and the transformer TF_ 2 increases the applied AC voltage and supplies the increased AC voltage to the second lamp unit 300 _ 2 . As a result, the second lamp unit 300 _ 2 emits light.

An example in which the second DC-AC converting unit 271 does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 4B and 4C .

When the selection signal SEL is at the high level H, a low level voltage L is applied to the gate G 2 of the second NMOS transistor Q_N 2 , regardless of the value of the value of the N-type driving signal CONT_N. Therefore, the second NMOS transistor Q_N 2 is turned off and thus the second DC-AC converting unit 271 becomes a circuit as illustrated in FIG. 4B . In this case, even though the second PMOS transistor Q_P 2 is turned on or off according to the P-type driving signal CONT_P, the AC voltage is not applied to the primary coil CL 2 and thus the transformer TF_ 2 does not supply the power supply voltage Vac_ 2 . As a result, the second lamp unit 300 _ 2 is in an OFF state. Also, prior to the selection signal SEL transitioning to the low level L, the voltage at the, low level L is continuously applied to the gate G 2 of the second NMOS transistor Q_N 2 . Therefore, the second lamp unit 300 _ 2 is held in the OFF state.

Therefore, the DC-AC converting unit 242 selectively supplies the power supply voltage Vac_ 2 according to the value of the selection signal SEL such that both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light or only the first lamp unit 300 _ 1 emits light.

A power supply apparatus according to another exemplary embodiment of the invention will now be described with reference to FIGS. 5A and 5C . FIG. 5A is a circuit diagram illustrating the DC-AC converting unit of the power supply apparatus according to another exemplary embodiment of the invention, FIG. 5B is an equivalent circuit diagram of a second DC-AC converting unit included in the DC-AC converting unit of FIG. 5A when the selection signal is at the high level, and FIG. 5C is a table illustrating the operation of the second DC-AC converting unit of FIG. 5A .

Referring to FIG. 5A , a first DC-AC converting unit 252 includes a full-bridge inverter FB_ 1 and a transformer TF_ 1 , and a second DC-AC converting unit 272 includes a full-bridge inverter FB_ 2 and a transformer TF_ 2 .

First, the full-bridge inverter FB_ 1 includes four MOS transistors Q_P 1 , Q_N 1 , Q_P 2 , and Q_N 2 , and the full-bridge inverter FB_ 2 includes four MOS transistors Q_P 3 , Q_N 3 , Q_P 4 , and Q_N 4 . FIG. 5A illustrates an embodiment where the MOS transistors Q_P 1 , Q_P 2 , Q_P 3 , and Q_P 4 are all PMOS transistors and the MOS transistors Q_N 1 , Q_N 2 , Q_N 3 , and Q_N 4 are all NMOS transistors. However, the invention is not limited thereto. For example, of the MOS transistors Q_P 1 , Q_N 1 , Q_P 2 , Q_N 2 , Q_P 3 , Q_N 3 , Q_P 4 , and Q_N 4 may either be all PMOS transistors or NMOS transistors.

The full-bridge inverter FB_ 1 of the first DC-AC converting unit 252 is enabled by first and second P-type driving signal CONT_P 1 and CONT_P 2 and first and second N-type driving signal CONT_N 1 and CONT_N 2 to convert the second DC voltage DC 2 into an AC voltage at a predetermined level. The transformer TF_ 1 of the first DC-AC converting unit 252 is supplied with the AC voltage at the predetermined level from the full-bridge inverter FB_ 1 , increases the supplied AC voltage, and outputs the increased AC voltage as the power supply voltage Vac_ 1 .

More specifically, when the first PMOS transistor Q_P 1 and the second PMOS transistor Q_P 2 are turned on, the first NMOS transistor Q_N 1 and the second NMOS transistor Q_N 2 are turned off, while when the first PMOS transistor Q_P 1 and the second PMOS transistor Q_P 2 are turned off, the first NMOS transistor Q_N 1 and the second NMOS transistor Q_N 2 are turned on.

The pair of first and second PMOS transistors Q_P 1 and Q_P 2 and the pair of first and second NMOS transistors Q_N 1 and Q_N 2 are alternately turned on/off, and thus the second DC voltage DC 2 is applied to a primary coil CL 1 of the transformer TF_ 1 while the polarity of the second DC voltage DC 2 varies. For example, when the second DC voltage DC 2 is 12 V, +12 V and −12 V are sequentially applied to the primary coil CL 1 of the transformer TF_ 1 .

›DETAILED DESCRIPTION OF THE INVENTION · 5 of 7

The transformer TF_ 1 increases the AC voltage applied to the primary coil CL 1 and outputs the increased AC voltage as the power supply voltage Vac_ 1 . When the power supply voltage Vac_ 1 is supplied, the first lamp unit 300 _ 1 emits light.

Depending on the value of the selection signal SEL, a switching unit 263 supplies the second P-type driving signal CONT_P 2 to a gate G 3 of a fourth PMOS transistor Q_P 4 of the full-bridge inverter FB_ 2 or blocks the second P-type driving signal CONT_P 2 and supplies the second N-type driving signal CONT_N 2 to a gate G 4 of a fourth NMOS transistor Q_N 4 or blocks the second N-type driving signal CONT_N 2 . Accordingly, the second DC-AC converting unit 272 selectively does or does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 . In the embodiment illustrated, switching unit 263 includes an AND gate “AND”, an OR gate “OR”, and an inverter INV. The OR gate has the second P-type driving signal CONT_P 2 and the selection signal SEL as inputs thereto, while the AND gate has the second N-type driving signal CONT_N 2 and the inverted value of the selection signal SEL as inputs thereto. The output of the OR gate drives gate G 3 of the fourth PMOS transistor Q_P 4 , while the output of the AND gate drives gate G 4 of the fourth NMOS transistor Q_N 4 .

An example in which the second DC-AC converting unit 272 supplies the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 5A and 5C .

When the selection signal SEL is at the low level, the second P-type driving signal CONT_P 2 is passed to the gate G 3 of the fourth PMOS transistor Q_P 4 , and the second N-type driving signal CONT_N 2 is passed to the gate G 4 of the fourth NMOS transistor Q_N 4 . Therefore, in this case, since the second DC-AC converting unit 272 operates in the same manner as the above-mentioned first DC-AC converting unit 252 , the AC voltage is applied to the primary coil CL 2 of the transformer TF_ 2 , and the transformer TF_ 2 increases the applied AC voltage and supplies the increased AC voltage to the second lamp unit 300 _ 2 as the power supply voltage Vac_ 2 . As a result, the second lamp unit 300 _ 2 emits light.

An example in which the second DC-AC converting unit 272 does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 5B and 5C .

When the selection signal SEL is at the high level H, the high level voltage H is applied to the gate G 3 of the fourth PMOS transistor Q_P 4 and the low level L voltage is applied to the gate G 4 of the fourth NMOS transistor Q_N 4 . Therefore, both the fourth PMOS transistor Q_P 4 and the fourth NMOS transistor Q_N 4 are turned off, and thus the second DC-AC converting unit 272 becomes a circuit as illustrated in FIG. 5B . In this case, even though the third PMOS transistor Q_P 3 and the third NMOS transistor Q_N 3 are turned on/off according to the second P-type driving signal CONT_P 2 and the second N-type driving signal CONT_N 2 , the AC voltage is not applied to the primary coil CL 2 , such that the transformer TF_ 2 does not output the power supply voltage Vac_ 2 . Accordingly, the second lamp unit 300 _ 2 is in the OFF state.

Therefore, the DC-AC converting unit 243 selectively supplies the power supply voltage Vac_ 2 according to the value of the selection signal SEL such that both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light or only the first lamp unit 300 _ 1 emits light.

In this embodiment, the switching unit 263 controls both the fourth PMOS transistor Q_P 4 and the fourth NMOS transistor Q_N 4 . However, the switching unit 263 may alternatively control either the fourth PMOS transistor Q_P 4 or the fourth NMOS transistor Q_N 4 .

A power supply apparatus according to another exemplary embodiment of the invention will now be described with reference to FIGS. 6A to 6C . FIG. 6A is a circuit diagram illustrating the DC-AC converting unit of the power supply apparatus according to another exemplary embodiment of the invention, FIG. 6B is an equivalent circuit diagram of a second DC-AC converting unit included in the DC-AC converting unit of FIG. 6A when the selection signal is at the high level, and FIG. 6C is a table illustrating the operation of the second DC-AC converting unit of FIG. 6A .

First, referring to FIG. 6A , a first push-pull inverter PP_ 1 includes MOS transistors Q_P 1 and Q_N 1 , capacitors C 5 and C 6 , and an inductor L 1 , while a second push-pull inverter PP_ 2 includes MOS transistors Q_P 2 and Q_N 2 , capacitors C 7 and C 8 , and an inductor L 2 . FIG. 6A illustrates an embodiment where the MOS transistors Q_P 1 and Q_P 2 are PMOS transistors and the MOS transistors Q_N 1 and Q_N 2 are NMOS transistors. However, the invention is not limited thereto. For example, MOS transistors Q_P 1 , Q_N 1 , Q_P 2 , and Q_N 2 may all be either PMOS transistors or NMOS transistors.

The push-pull inverter PP_ 1 of a first DC-AC converting unit 253 is enabled by a driving signal CONT including a P-type driving signal CONT_P and an N-type driving signal CONT_N to convert the second DC voltage DC 2 into an AC voltage at a predetermined level. A transformer TF_ 1 of the first DC-AC converting unit 253 is supplied with the AC voltage at the predetermined level from the push-pull inverter PP_ 1 , increases the supplied AC voltage, and outputs the increased AC voltage as the power supply voltage Vac_ 1 .

More specifically, a first PMOS transistor Q_P 1 and a first NMOS transistor Q_N 1 are alternately turned on/off. That is, when the first PMOS transistor Q_P 1 is turned on, the first NMOS transistor Q_N 1 is turned off, while when the first PMOS transistor Q_P 1 is turned off, the first NMOS transistor Q_N 1 is turned on.

While the first PMOS transistor Q_P 1 and the first NMOS transistor Q_N 1 are alternately turned on/off, an AC voltage is applied to a primary coil CL 1 of the transformer TF_ 1 by the inductor L 1 and the capacitors C 5 and C 6 . The transformer TF_ 1 increases the AC voltage applied to the primary coil CL 1 and outputs the increased AC voltage as the power supply voltage Vac_ 1 . The first lamp unit 300 _ 1 is supplied with the power supply voltage Vac_ 1 so as to emit light.

›DETAILED DESCRIPTION OF THE INVENTION · 6 of 7

A switching unit 264 selectively supplies or does not supply the N-type driving signal CONT_N to a gate G 5 of a second NMOS transistor Q_N 2 and thus the second DC-AC converting unit 270 selectively does or does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 . In the embodiment illustrated, the switching unit 264 includes an AND gate “AND” and an inverter INV, having the selection signal SEL and the N-type driving signal CONT_N as respective inputs thereto. The inverted value of SEL and the N-type driving signal CONT_N are inputs to the AND gate, and the output of the AND gate is coupled to the gate G 5 of NMOS transistor Q_N 2 .

An example in which a second DC-AC converting unit 273 supplies the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 6A and 6C .

When the selection signal SEL is at the low level L, the N-type driving signal CONT_N is passed through to the gate of the second NMOS transistor Q_N 2 . Therefore, in this case, since the second DC-AC converting unit 273 operates in the same manner as the above-mentioned first DC-AC converting unit 253 , an AC voltage is applied to a primary coil CL 2 of a transformer TF_ 2 , and the transformer TF_ 2 increases the applied AC voltage and supplies the increased AC voltage to the second lamp unit 300 _ 2 , then the second lamp unit 300 _ 2 emits light.

An example in which the second DC-AC converting unit 272 does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 will now be described in detail with reference to FIGS. 6B and 6C .

When the selection signal SEL is at the high level H, a low level L voltage is applied to the gate G 5 of the second NMOS transistor Q_N 2 , and thus the second NMOS transistor Q_N 2 is turned off, such that the second DC-AC converting unit 273 becomes a circuit as illustrated in FIG. 6C . In this case, even though the second PMOS transistor Q_P 2 is turned on/off according to the P-type driving signal CONT_P, capacitors C 7 and C 8 are charged to a second DC voltage and thus the AC voltage is not applied to the primary coil CL 2 . As a result, the transformer TF_ 2 does not output the power supply voltage Vac_ 2 . Therefore, the second lamp unit 300 _ 2 is in the OFF state.

In other words, the DC-AC converting unit 244 selectively supplies the power supply voltage Vac_ 2 according to the value of the selection signal SEL such that both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light or only the first lamp unit 300 _ 1 emits light.

The power supply apparatuses according to some of the above-mentioned exemplary embodiments can selectively supply the power supply voltages to the lamps by transmitting the driving signal to the second DC-AC converting unit or blocking the driving signal in response to the selection signal. Therefore, it is possible to reduce the power consumption of the lamps.

A power supply apparatus according to certain exemplary embodiments of the invention will be described with reference to FIG. 7 . FIG. 7 is a block diagram illustrating a power supply apparatus according to some exemplary embodiments of the invention.

Referring to FIG. 7 , a DC-AC converting unit 290 includes a first DC-AC converting unit 250 , a second DC-AC converting unit 270 , and a switching unit 280 . In contrast to the above-mentioned exemplary embodiments, the switching unit 280 either transmits the second DC voltage DC 2 to the second DC-AC converting unit 270 or blocks transmission of the second DC voltage DC 2 in response to the selection signal SEL. Therefore, the power supply apparatus 200 ( FIG. 1 ) selectively supplies the power supply voltages Vac_ 1 and Vac_ 2 to the lamps 300 _ 1 and 300 _ 2 according to value of the selection signal SEL.

Exemplary embodiments will now be described with reference to FIGS. 8 to 10 .

FIG. 8 is a circuit diagram illustrating a power supply apparatus according to another exemplary embodiment of the invention. In FIG. 8 , components having the same or similar functions as the components illustrated in FIG. 3A are designated by the same reference numerals, and thus a description thereof will be omitted.

Referring to FIG. 8 , a first DC-AC converting unit 251 includes a half-bridge inverter HB_ 1 and a transformer TF_ 1 , and a second DC-AC converting unit 271 includes a half-bridge inverter HB_ 2 and a transformer TF_ 2 . A switching unit 281 includes an inverter INV and a MOS transistor Qs. In response to the selection signal SEL, the switching unit 281 either transmits the second DC voltage DC 2 to the half-bridge inverter HB_ 2 of the second DC-AC converting unit 271 or blocks the transmission of the second DC voltage DC 2 thereto.

For example, where the MOS transistor Qs is an NMOS transistor, when the selection signal SEL is at the high level, a low level voltage is applied to a gate of the NMOS transistor Qs and thus the NMOS transistor Qs is turned off. Therefore, since the second DC voltage DC 2 is not applied to the half-bridge inverter HB_ 2 , the second DC-AC converting unit 271 does not supply the power supply voltage Vac_ 2 to the second lamp unit 300 _ 2 .

That is, the DC-AC converting unit 291 selectively supplies the power supply voltage Vac_ 2 according to the value of the selection signal SEL such that both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light or only the first lamp unit 300 _ 1 emits light. Alternatively, the MOS transistor Qs may be a PMOS transistor and the inverter INV may be omitted.

FIG. 9 is a circuit diagram illustrating a power supply apparatus according to another exemplary embodiment of the invention. In FIG. 9 , components having the same functions as the components illustrated in FIGS. 5A and 8 are designated by the same reference numerals and a detailed description thereof will be omitted for purposes of simplicity.

Referring to FIG. 9 , a first DC-AC converting unit 252 includes a full-bridge inverter FB_ 1 and a transformer TF_ 1 , and a second DC-AC converting unit includes a full-bridge inverter FB_ 2 and a transformer TF_ 2 . A switching unit 281 includes an inverter INV and a MOS transistor Qs. In response to the selection signal SEL, the switching unit 281 either transmits the second DC voltage DC 2 to the half-bridge inverter HB_ 2 of the second DC-AC converting unit 272 or blocks the transmission of second DC voltage DC 2 thereto. Therefore, it is possible to selectively drive the second lamp unit 300 _ 2 according to the value of the selection signal SEL.

›DETAILED DESCRIPTION OF THE INVENTION · 7 of 7

That is, a DC-AC converting unit 292 selectively supplies the power supply voltage Vac_ 2 according to the value of the selection signal SEL such that both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light or only the first lamp unit 300 _ 1 emits light. Alternatively, the MOS transistor Qs may be a PMOS transistor and the inverter 1V may be omitted.

FIG. 10 is a circuit diagram illustrating a power supply apparatus according to another exemplary embodiment of the invention. In FIG. 10 , components having the same functions as the components illustrated in FIG. 6A are designated by the same reference numerals and a detailed description thereof will be omitted for purposes of simplicity.

Referring to FIG. 10 , a first DC-AC converting unit 253 includes a push-pull inverter PP_ 1 and a transformer TF_ 1 , and a second DC-AC converting unit 273 includes a push-pull inverter PP_ 2 and a transformer TF_ 2 . A switching unit 282 includes an OR gate “OR”. In response to the selection signal SEL, the switching unit 282 either transmits or blocks transmission of the second DC voltage DC 2 . In this embodiment, the switching unit 282 operates in the same or similar manner as the switching unit 260 illustrated in FIG. 3A and thus a detailed description thereof will be omitted.

Therefore, a DC-AC converting unit 293 selectively supplies the power supply voltage Vac_ 2 according to the value of the selection signal SEL such that both of the first and second lamp units 300 _ 1 and 300 _ 2 emit light or only the first lamp unit 300 _ 1 emits light.

The power supply apparatuses according to the above-mentioned exemplary embodiments can selectively supply the power supply voltages to the lamps by transforming the second DC voltage to the second DC-AC converting unit or disrupting the second DC voltage. Therefore, it is possible to reduce the power consumption of the lamps.

Although the present invention has been described in connection with the exemplary embodiments of the present invention, it will be apparent to those skilled in the art that various modifications and changes may be made thereto without departing from the scope and spirit of the invention. Therefore, it should be understood that the above exemplary embodiments are not limitative, but illustrative in all aspects.

As described above, according to the power supply apparatus and a liquid crystal display including the power supply apparatus according to the invention, it is possible to selectively drive a plurality of lamps and thus to reduce the power consumption.

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Classifications

3 codes
IPC · International Patent Classification
Section G — Physics
  • G09G5/00
USPC · US Patent Classification
345/211345/87

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⤢ drag to zoomJul 2007Jan 2008Jul 2008Jan 2009Jul 2009Jan 2010Jul 2010Jan 2011Jul 2011USPTOApplicantNon-final rejectionResponse after non-final
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1,406 days filing → grant
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no RCE
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Nitin Patel
art unit 2629 · TC 2600
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