Adaptive Dynamic Range Control

CLAIM OF PRIORITY UNDER 35 U.S.C. §119

The present Application for Patent claims priority to Provisional Application No. 60/950,590 entitled “Adaptive Dynamic Range Control,” filed Jul. 18, 2007, and assigned to the assignee hereof and hereby expressly incorporated by reference herein.

1. Field

The disclosure relates generally to the electronic arts, and more specifically to apparatuses and techniques for adaptive dynamic range control for sigma-delta modulators and other circuits.

2. Background

Sigma-delta modulators and other similar circuits have existed for many years and have a wide range of applications such as communication systems, audio systems, precision measurement devices, and many others. In audio applications, for example, a sigma-delta modulator is often used to covert an audio signal into a stream of one-bit digital signals. The conversion process is performed by oversampling the audio signal, thus spreading the quantization noise over a larger spectrum. The modulator further modifies the spectral properties of the quantization noise such that it is low in the band of interest (i.e., the audio band), and high elsewhere.

In many audio systems, the digital bit stream is processed, stored, retrieved, or transmitted before being converted back to an audio signal for playback. In these systems, errors can be introduced into the digital bit stream due to processing errors, unreliable storage mediums, or disturbances in the transmission medium. These errors can result in significant audio artifacts.

In many audio systems, there is a further desire to lower the oversampling ratio, in order to save computational power and transmission bandwidth. The quantization noise increases in the band of interest (i.e., the audio band) as the oversampling ratio is decreased.

Accordingly, there is a need in the art for improved sigma-delta modulators and similar devices that address audio quality due to errors in the digital bit stream and power, bandwidth limitations.

In one aspect of the disclosure, an apparatus for processing signals includes a sigma-delta modulator, and an adaptive dynamic range controller configured to adaptively adjust the dynamic range of a signal output from the sigma-delta modulator.

In another aspect of the disclosure, an apparatus is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The apparatus includes a filter, and an adaptive dynamic range controller configured to produce an output comprising the received signal with its dynamic range inversely adjusted and provide the output to the filter.

In yet another aspect of the disclosure, an apparatus for processing signals includes a sigma-delta modulator, and means for adaptively adjusting the dynamic range of a signal output from the sigma-delta modulator

In a further aspect of the disclosure, an apparatus is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The apparatus includes means for processing the received signal to produce an output comprising the received signal with its dynamic range inversely adjusted, and means for filtering the output

In yet a further aspect of the disclosure, a method for processing signals includes passing a signal through a sigma-delta modulator, and adaptively adjusting the dynamic range of the signal output from the sigma-delta modulator.

In still yet a further aspect of the disclosure, a method to process a signal received from an output of a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted, includes processing the received signal to produce an output comprising the received signal with its dynamic range inversely adjusted, and filtering the output.

In another aspect of the disclosure, a computer-program product for processing signals includes a machine-readable medium comprising instructions executable by a processing system, the instructions including code for passing a signal from a sigma-delta modulator, and adaptively adjusting the dynamic range of the signal output from the sigma-delta modulator.

In yet another aspect of the disclosure, a computer-program product for processing signals includes a machine-readable medium comprising instructions executable by a processing system configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted, the instructions including code for processing the received signal to produce an output comprising the received signal with its dynamic range inversely adjusted, and filtering the output.

In still yet another aspect of the disclosure, an apparatus for processing signals includes a filter configured to receive an input signal and a scaled signal and to generate a filtered signal, a quantizer configured to generate a quantized signal based on the filtered signal, and an adaptive dynamic range controller configured to generate the scaled signal based on the quantized signal.

In a further aspect of the disclosure, an apparatus is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The apparatus includes an adaptive dynamic range controller configured to receive the signal from the sigma-delta modulator and generate a scaled signal, and a filter configured to receive the scaled signal.

In yet a further aspect of the disclosure, an apparatus for processing signals includes means for filtering an input signal based on a scaled signal to generate a filtered signal, means for generating a quantized signal based on the filtered signal, and means for generating the scaled signal based on the quantized signal.

In still yet another aspect of the disclosure, an apparatus is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The apparatus includes means for generating a scaled signal based on the received signal output from the sigma-delta modulator, and means for filtering the scaled signal.

In a further aspect of the disclosure, a method for processing signals includes filtering an input signal based on a scaled signal to generate a filtered signal, generating a quantized signal based on the filtered signal, and generating the scaled signal based on the quantized signal.

In yet a further aspect of the disclosure, a method for processing a signal received from an output of a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted, includes generating a scaled signal based on the received signal output from the sigma-delta modulator, and filtering the scaled signal.

In still yet a further aspect of the disclosure, a computer-program product for processing signals includes a machine-readable medium comprising instructions executable by a processing system, the instructions includes code for filtering an input signal based on a scaled signal to generate a filtered signal, generating a quantized signal based on the filtered signal, and generating the scaled signal based on the quantized signal.

In another aspect of the disclosure, a computer-program product for processing signals includes a machine-readable medium comprising instructions executable by a processing system configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted, the instructions include code for generating a scaled signal based on the received signal output from the sigma-delta modulator, and filtering the scaled signal.

In yet another aspect of the disclosure, a headset includes a signal source configured to generate a signal, a sigma-delta modulator configured to receive the signal from the signal source and produce an output, and an adaptive dynamic range controller configured to adaptively adjust the dynamic range of the output from the sigma-delta modulator.

In still yet another aspect of the disclosure, a headset is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The headset includes a signal load, an adaptive dynamic range controller configured to produce an output comprising the received signal with its dynamic range inversely adjusted, and a filter configured to filter the output from the adaptive dynamic range controller and provide the filtered output to the signal load.

In a further aspect of the disclosure, a headset includes a signal source configured to generate a signal, a filter configured to receive the signal from the signal source and a scaled signal and to generate a filtered signal, a quantizer configured to generate a quantized signal based on the filtered signal, and an adaptive dynamic range controller configured to generate the scaled signal based on the quantized signal.

In yet a further aspect of the disclosure, a headset is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted, the handset includes an adaptive dynamic range controller configured to receive the signal from the sigma-delta modulator and generate a scaled signal, a filter configured to receive the scaled signal and generate a filtered signal, and a signal load configured to receive the filtered signal.

It is understood that other aspects of the invention will become readily apparent to those skilled in the art from the following detailed description, wherein various aspects of the invention are shown and described by way of illustration. As will be realized, the invention is capable of other and different configurations and implementations and its several details are capable of modification in various other respects, all without departing from the scope of this disclosure. Accordingly, the drawings and detailed description are to be regarded as illustrative in nature and not as restrictive.

FIG. 1 is a conceptual diagram illustrating an example of an audio system;

FIG. 2 is a conceptual block diagram illustrating an example of an encoder with a first order sigma-delta modulator;

FIG. 3 is a conceptual block diagram illustrating an example of an encoder with a third order sigma-delta modulator;

FIG. 4 is a conceptual diagram illustrating an example of an adaptive dynamic range controller;

FIG. 5 is a schematic diagram illustrating an example of a decoder;

FIGS. 6A and 6B are functional block diagrams illustrating examples of an encoder; and

FIGS. 7A and 7B are functional block diagrams illustrating examples of a decoder.

The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations of the invention and is not intended to represent the only configurations in which the invention may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring the concepts of the invention.

FIG. 1 is a conceptual diagram illustrating an example of an audio system. The audio system 100 is shown with an encoder 104 which converts an audio signal from a signal source 102 to a digital bit stream. The digital bit stream may be processed, stored, retrieved or transmitted before being converted back to an audio signal by a decoder 108 for presentation to a signal load 110 . The processing, storage, retrieval, or transmission of the digital bit stream is broadly represented in FIG. 1 as a channel 106 .

The ensemble of components shown in FIG. 1 is intended to broadly represent many different types of audio systems. By way of example, the audio system 100 may represent a headset engaging in wireless communications with a cellular phone, personal (PDA), desktop or laptop computer, or any other suitable device. In this example, the signal source 102 and encoder 104 represent the sending device and the decoder 108 and signal load 110 represent the receiving device. The signal source 102 comprises the audio circuitry associated with a microphone and the encoder 104 converts the audio signal from the audio circuitry into a digital bit stream. The channel 106 represents the wireless channel between the two devices including various physical layer processing (e.g., RF front-end processing, symbol mapping, turbo coding etc.). The decoder 108 converts the digital bit stream to an audio signal and presents it to the signal load 110 , which may be a speaker on the receiving phone, memory, a component for further routing of the audio signal.

Another example of an audio system is a digital audio player, sometimes referred to as an MP3 player because of the MP3 format's ubiquity. The digital audio player may be a stand alone device or integrated into a cellular phone, PDA, desktop or laptop computer, or any other suitable device. In this example, the signal source 102 may be an integrated FM tuner. The encoder 104 converts the audio signal from the FM tuner to a digital data stream and stores this information in memory in the form of an audio file. The memory and associated processing is represented by the channel 106 . The digital data stream, or contents of the audio file, is read out of memory and converted to an analog signal by the decoder 108 and presented to the signal load 110 , typically a speaker.

Various concepts will now be presented with reference to the encoder 104 and decoder 108 of FIG. 1 . These concepts are designed to address audio quality due to errors in the digital bit stream by modulating the amplitude of disturbances at the decoder 108 according to the instantaneous amplitude of the original audio signal. While these concepts are well suited for the audio systems discussed thus far, those skilled in the art will readily recognize that these concepts may be extended to many other types of audio systems, and may also be applicable to systems supporting other type of media.

FIG. 2 is a conceptual block diagram illustrating an example of an encoder. In this example, the encoder 104 will be described as an analog-to-digital converter (ADC), but as those skilled in the art will readily appreciate, the various concepts presented may be equally applicable to an encoder configured as a digital-to-analog converter (DAC).

Referring to FIG. 2 , the encoder 104 includes a first order sigma-delta modulator, although higher order modulators may be used to decrease quantization noise. In this example, an audio signal is input to a summing node 206 . The summing node 206 also receives an input from an adaptive dynamic range controller 204 . The difference between the two inputs is provided to a filter 208 that provides an integration function. The filtered output is then provided to a one-bit quantizer 210 . The quantizer 210 generates the encoder output comprising a digital bit stream at the oversampling frequency (i.e., a frequency much greater than the Nyquist frequency). The digital bit stream is also fed back to the adaptive dynamic range controller 204 to generate the input to the summing node 206 .

The adaptive dynamic range controller 204 is configured to adaptively adjust the dynamic range of a signal output from the sigma-delta modulator 202 . This is achieved by passing the digital bit stream output from the sigma-delta modulator 202 through a signal reconstruction unit 212 and an envelope detector 214 and then using the result to scale the digital bit stream through a multiplication node 216 . The scaled output from the multiplication node 216 is provided to the sigma-delta modulator 202 where it is subtracted from the audio input signal at the summing node 206 . As a result, the dynamic range of the signal output from the sigma-delta modulator 202 is adjusted inversely proportional to the instantaneous amplitude of the audio input signal. Stated differently, low signal amplitude regions in the audio signal receive the maximum increase in dynamic range. Thus, any audio artifacts picked up in the channel will be significantly reduced at the decoder 108 (see FIG. 1 ) in the low signal amplitude regions, where the audio is most vulnerable to noise.

As discussed earlier, higher order modulation may be used to better shape the quantization noise out of the audio signal band. An example of an encoder with a third order sigma-delta modulator will now be presented with reference to FIG. 3 . The sigma-delta modulator 202 in his example is an extension of the first order sigma-delta modulator discussed in connection with FIG. 2 . Several integration stages are implemented with three filters 208 a - 208 c . A summing node 206 a - 206 c is provided at the input of each stage to subtract out the scaled output from the adaptive dynamic range controller 204 . A feedback path is also introduced between the output of the last stage and the input to the second stage.

FIG. 4 is a conceptual diagram illustrating an example of an adaptive dynamic range controller in more detail. The signal reconstruction unit 212 includes a one-pole filter comprising a delay element 404 for delaying the input and a summing node 408 to combine the input with the delayed input. The gains in the filter and feedback paths are individually controlled with amplifiers 402 , 406 . The filter functions to provide a coarse reconstruction of the audio signal input to the encoder.

The envelope detection is similarly done by passing a rectified output from the signal reconstruction unit 212 through a one-pole filter to smooth out any discontinuities due to the coarse reconstruction of the audio signal and to further reduce high frequency quantization noise output from the sigma-delta modulator. The envelope detector 214 includes a rectifier 410 followed by a one-pole filter comprising a delay element 416 for delaying the input from the signal reconstruction unit 212 and a summing node 414 to combine the input with the delayed version. The gains in the filter and feedback paths are individually controlled with amplifiers 412 , 418 .

The adaptive dynamic range controller 204 may also include a variable gain amplifier 420 at the output of the envelope detector 212 . The variable gain of the amplifier 420 that may be used to change the amplitude of the envelope signal.

FIG. 5 is a schematic diagram illustrating an example of a decoder. The decoder 108 includes an adaptive dynamic range controller 204 that functions to adjust the dynamic range of the digital bit stream to recover the audio signal. More precisely, the adaptive dynamic range controller 204 adaptively adjusts the dynamic range of the digital bit stream directly proportional to the instantaneous amplitude of the audio signal. As result, low signal amplitude regions in the audio signal receive the maximum decrease in dynamic range, which significantly reduces any audio artifacts picked up in the channel.

The adaptive dynamic range controller 204 is similar to that described earlier in connection with the encoder 202 . It has a signal reconstruction unit 212 followed by an envelope detector 214 . Both the signal reconstruction unit 212 and the envelope detector 214 are shown as one-pole filters with independently controlled gains in the filter and feedback paths. Preferably, the combination of gains of the each filter is one. In some configurations, the gains of the amplifiers 402 , 406 , 412 , 418 may be tunable parameters. A variable gain amplifier 420 provides a tunable parameter and a clipping circuit 502 prevents the output of the adaptive dynamic range controller from saturating. The tunable parameters may be used to address issues such as the slew-rate control of the envelope detection and the stability of the core sigma-delta modulator loop.

The decoder 108 also includes a low pass filter 504 . The filter 504 functions as a decimator that filters the digital bit stream to the Nyquist sampling rate to recover the underlying audio bandwidth. The output from the filter 504 may be provided to the signal load 110 (see FIG. 1 ), which may be an audio speaker, memory, transmitter, or other suitable device. In the case of an audio speaker, the digital bit stream from the adaptive dynamic range controller may be provided to a class-D amplifier that drives an audio output comprising a speaker and a low pass filter. As a result of this decoder configuration, the power consumed by the class-D amplifier is proportional to the audio signal level (i.e., loudness). This may provide an added benefit in consumer electronic devices that need to conserve battery power.

FIGS. 6A and 6B are functional block diagrams illustrating examples of an encoder. In FIG. 6A , an apparatus for processing signals includes a sigma-delta modulator 602 A and a module 604 A for adaptively adjusting the dynamic range of a signal output from the sigma-delta modulator. In FIG. 6B , an apparatus for processing signals includes a module 602 B for filtering an input signal based on a scaled signal to generate a filtered signal, a module 604 B for generating a quantized signal based on the filtered signal, and a module 606 B for generating the scaled signal based on the quantized signal.

FIGS. 7A and 7B are functional block diagrams illustrating examples of a decoder. In FIG. 7A , an apparatus is configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The apparatus includes a module 702 A for processing the received signal to produce an output comprising the received signal with its dynamic range inversely adjusted, and a module 704 A for filtering the output. In FIG. 7B , an apparatus is also configured to receive a signal output from a sigma-delta modulator, wherein the dynamic range of the received signal has been adaptively adjusted. The apparatus includes a module 702 B for generating a scaled signal based on the received signal output from the sigma-delta modulator, and a module 704 B for filtering the scaled signal.

The various illustrative logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented within or performed by an integrated circuit (“IC”), an access terminal, or an access point. The IC may comprise a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, electrical components, optical components, mechanical components, or any combination thereof designed to perform the functions described herein, and may execute codes or instructions that reside within the IC, outside of the IC, or both. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

The teachings herein may be incorporated into (e.g., implemented within or performed by) a variety of apparatuses (e.g., devices). For example, one or more aspects taught herein may be incorporated into a phone (e.g., a cellular phone), a personal data assistant (“PDA”), an entertainment device (e.g., a music or video device), a headset (e.g., headphones, an earpiece, etc.), a microphone, a medical device (e.g., a biometric sensor, a heart rate monitor, a pedometer, an EKG device, etc.), a user I/O device (e.g., a watch, a remote control, a light switch, a keyboard, a mouse, etc.), a tire pressure monitor, a computer, a point-of-sale device, an entertainment device, a hearing aid, a set-top box, or any other suitable device.

The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein, but is to be accorded the full scope consistent with the language claims, wherein reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” Unless specifically stated otherwise, the term “some” refers to one or more. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. No claim element is to be construed under the provisions of 35 U.S.C. §112, sixth paragraph, unless the element is expressly recited using the phrase “means for” or, in the case of a method claim, the element is recited using the phrase “step for.”