Rectified power supply

Radio frequency identification (RFID) chips typically include circuitry that rectifies a carrier wave to generate a regulated power supply for the chip. The carrier wave is generated by an RFID chip reader. The RFID chips additionally include an inductor coil antenna in parallel with a tuning capacitor, creating an antenna circuit tuned to the carrier frequency.

Uplink communication between an RFID chip and an RFID card reader is accomplished through backscatter modulation by periodically increasing the load on the tuned antenna circuit. In order to maximize the signal strength of the uplink communication, it is desirable to present the largest load to the antenna.

FIG. 1 is block diagram representing the present invention rectified power supply.

FIG. 2 is circuit diagram of one embodiment of the present invention rectified power supply.

FIG. 3 is circuit diagram of an alternate embodiment of the present invention rectified power supply.

FIG. 1 is a block diagram illustrating an embodiment of a rectified power supply 2 . In this embodiment, power supply 2 includes voltage signal source 4 , capacitive coupling element 6 , rectifying diodes 8 , 10 , energy storage element 12 , bypass means 14 , and regulator 16 between high power supply rail V DD and low power supply rail V SS .

Rectified power supply 2 creates a voltage difference between high V DD and low V SS power supply rails, suitable for use as a power supply for an RFID chip (not shown). Voltage signal source 4 provides a radio frequency (RF) signal to coupling capacitive element 6 . In one embodiment, this RF signal is induced in voltage signal source 4 by an RFID chip reader (not shown).

Coupling capacitive element 6 causes a direct current (dc) voltage offset in the RF signal. Rectifying diodes 8 , 10 rectify the signal from coupling capacitive element 6 . Energy storage element 12 stores the energy between the high V DD and low V SS power supply rails. Regulator 16 regulates the level of energy stored in energy storage element 12 . Bypass means 14 , responsive to regulator 16 , selectively decreases the impedance between voltage signal source 4 and low power supply rail V SS , increasing the load presented to voltage signal source 4 .

FIG. 2 is a circuit diagram illustrating one embodiment of rectified power supply 2 . In this embodiment, bypass means 14 includes a bypass diode element 26 in parallel with capacitive coupling element 6 . Diode element 26 is arranged to favor current flow toward the first 8 and second 10 rectifying diodes from voltage signal source 4 .

In one embodiment, voltage signal source 4 includes inductor coil antenna 22 and tuning capacitive element 24 in parallel with antenna 22 . The capacitance of tuning capacitive element 24 is selected so that voltage signal source 4 is tuned to the frequency of a carrier signal from an RFID chip reader.

Capacitive coupling element 6 is connected to voltage signal source 4 . Capacitive coupling element 6 couples the radio frequency signal of the carrier signal to the rectifying diodes 8 , 10 .

Rectifying diode 8 is positioned between capacitive coupling element 6 and energy storage element 12 . Rectifying diode 8 is coupled to voltage signal source 4 through capacitive coupling element 6 . Rectifying diode 8 is arranged to favor current flow toward energy storage element 12 from capacitive coupling element 6 .

Rectifying diode 10 is positioned between capacitive coupling element 6 and low power supply rail V SS . Rectifying diode 10 is coupled to voltage signal source 4 through capacitive coupling element 6 . Rectifying diode 10 is arranged to favor current flow toward capacitive coupling element 6 from low power supply rail V SS .

Energy storage element 12 stores energy for power supply 2 . For instance, energy storage element 12 may store energy at around 1.2 volts for use by an integrated circuit such as a radio frequency identification (RFID) circuit. In one embodiment, energy storage element 12 includes a capacitive element.

Regulator 16 regulates the level of energy stored in energy storage element 12 . In one embodiment, regulator 16 is a shunt regulator arranged in parallel with energy storage element 12 . In one embodiment, this shut regulator is a metal oxide semiconductor field effect transistor (MOSFET) having a gate 28 . Gate 28 is controlled so that when the supply voltage from capacitive coupling element 6 is too high, gate 28 is driven high, turning on MOSFET 16 so that current flows out of high power supply rail V DD and into low power supply rail V SS , effectively clamping the voltage at high power supply rail V DD .

In one embodiment, regulator 16 is also used for uplink communication with an RFID chip reader. A digital signal is applied to gate 28 , turning MOSFET 16 on and off, thereby alternately increasing and decreasing the load on the antenna through capacitive coupling element 6 and rectifying diode 8 .

When MOSFET 16 is off, preventing current from flowing between high power supply rail V DD and low power supply rail V SS , bypass diode element 26 is reverse biased, having little effect on the operation of rectified power supply 2 . When MOSFET 16 is turned on, the voltage between capacitive coupling element 6 and rectifying diode 8 is reduced and bypass diode element 26 is forward biased. In this forward biased state, current flows from the voltage signal supply through rectifying diode 8 and MOSFET 16 and into low power supply rail V SS . The load presented to the antenna is much greater than, and the impedance much less than, it would be without bypass diode element 26 .

FIG. 3 is a circuit diagram illustrating one embodiment of rectified power supply 2 . Elements having reference numbers like those in FIG. 2 are like those described for FIG. 2 . In the embodiment of FIG. 3 , bypass means 14 includes a PNP bipolar transistor 30 having an emitter 32 , a base 34 , and a collector 36 . PNP bipolar transistor 30 is arranged with emitter 32 connected to voltage signal source 4 , collector 36 connected to low power supply rail V SS , and base 34 connected between the capacitive coupling element 6 and rectifying diode 8 .

In one embodiment, regulator 16 is a shunt regulator arranged in parallel with rectifying diode 10 . In one embodiment, this shut regulator is a metal oxide semiconductor field effect transistor (MOSFET) having a source 18 and a drain 20 . Source 18 is connected to between the capacitive coupling element 6 and rectifying diode 8 and drain 20 is connected to low power supply rail V SS .

When MOSFET 16 is off, the base 34 -emitter 32 junction is reverse biased, having little effect on the operation of rectified power supply 2 . When MOSFET 16 is turned on, the voltage between capacitive coupling element 6 and rectifying diode 8 is reduced and the base 34 -emitter 32 junction is forward biased. In this forward biased state, current flows from the voltage signal supply into low power supply rail V SS . The load presented to the antenna is much greater than, and the impedance much less than, it would be without PNP bipolar transistor 30 .

Rectifying diode 10 is a directional current flow control means for favoring current flow toward capacitive coupling element 6 from low power supply rail V SS . In one embodiment, rectifying diode 10 is omitted from the rectified power supply 2 . When rectifying diode 10 is omitted, the directional current flow control means function of rectifying diode 10 is accomplished by the base 32 -collector 36 junction of bipolar transistor 30 . Although it may be advantageous to omit rectifying diode 10 , rectifying diode 10 may be desirable in some applications, particularly if rectifying diode 10 has a lower forward drop than the base 32 -collector 36 junction.

The foregoing description is only illustrative of the invention. Various alternatives, modifications, and variances can be devised by those skilled in the art without departing from the invention. Accordingly, the present invention embraces all such alternatives, modifications, and variances that fall within the scope of the described invention.