Structure of gate driver

This application claims priority to Taiwanese Patent Application No. 095104271 filed on Feb. 8, 2006 including the specification, claims, drawings and abstract. The disclosure of the above Taiwanese application is incorporated herein by reference in its entirety.

The present invention relates to a gate driver structure for a TFT (Thin Film Transistor) display apparatus and in particular, the invention relates to a new structure comprising only one gate driver.

As multimedia age arrives, the resolution of a display apparatus becomes more important than ever. Generally, multimedia apparatuses, especially for video purposes, are divided into two groups. One group emits light actively and the other emits light passively. The active group includes CRT (Cathode Ray Tube) and LED (Light Emitting Diode). The passive group includes LCD (Liquid Crystal Display).

LCD technology is the main stream technology utilized in display apparatuses today. Its advantages include power saving and small dimensions when compare to the traditional CRT technology. It is well known to those skilled in the art that a colorful LCD display apparatus utilizes a LCD panel comprising a plurality of TFT transistors, a polarizer, and a light source for generating colorful images. TFT transistors can be used as controllers to control images on colorful display apparatus composed of red, green and blue pixels. To construct display or non-display status of display pixels in the specific area on a TFT panel, a driver circuit first controls a plurality of data signals. The driver circuit then scans signals to drive the pixels located in a specific area on the TFT panel. Finally, the driver circuit utilizes TFT transistors to activate the “on” state or “off” state of the pixels.

An active matrix LCD display utilizes a TFT substrate as a base to develop pixels and as a conjunction for driving current to pass by. Thus, it has the advantages of small dimensions and reduced manufacturing cost, e.g., PCB boards used for connection. The TFT substrate further comprises TFT transistors, each of which controls an LCD pixel. Each TFT transistor comprises a gate terminal coupled with a scan line, a source terminal coupled with a data line, and a drain terminal coupled with an anode of the LCD pixel. The cathode of the LCD pixel may be connected to ground. When the scan line is driven by a high voltage, the transistor is switched on. Then, the data line provides a specific voltage to the source terminal of the TFT transistor and then to the anode of the LCD pixel.

To drive the voltage of the data line into the LCD pixel for displaying images, the LCD display apparatus further comprises drivers whose main function is to output appropriate voltages into pixels to control the “twisting” of liquid crystal molecules. Generally, there are two types of drivers: one is a gate driver positioned along the X axis of the display apparatus and the other is a source driver positioned along the Y axis. The function of the source driver is to input data signals. The function of the gate driver is to twist the liquid crystal molecules.

Because of market demand, the resolution of LCD display apparatus needs to be better than ever. More gate drivers are needed to support high resolution LCD. For example, an LCD display apparatus with resolution 1366×768 requires three gate drivers; each contains two hundred and fifty six channels. Please refer to FIG. 1 which illustrates a gate driver structure for an LCD display apparatus in the prior art. The structure of the LCD display apparatus comprises a first gate driver 102 , a second gate driver 104 , a third gate driver 106 , and a substrate 108 on which a plurality of TFT transistors is grown. The material of the substrate 108 may be glass or transparent insulating materials like polyester resin, polyimide etc. The first gate driver 102 , positioned on a FPC (Flexible Printed Circuit Board) (not shown), is coupled to the substrate 108 . The first gate driver 102 comprises a first pad (STV 1 ) to receive a trigger voltage signal, and a two hundred and fifty six channels including a first channel D_CH 1 , a second channel D_CH 2 , a third channel D_CH 3 , . . . , and a two hundred and fifty sixth channel D_CH 256 . In addition, the gate driver 102 also outputs a trigger voltage signal from a second pad (STV 2 ). By driving voltages via the first channel D_CH 1 , the second channel D_CH 2 , the third channel D_CH 3 , . . . , and the two hundred and fifty sixth channel D_CH 256 , to a first horizontal channel P_CH 1 , a second horizontal channel P_CH 2 , a third horizontal channel P_CH 3 , . . . , and a two hundred and fifty sixth horizontal channel P_CH 256 , on the substrate 108 respectively, there will be two hundred and fifty six horizontal outputs from the gate driver 102 . Similarly, a second gate driver 104 comprises a first pad (STV 1 ) to receive a trigger voltage signal, and a two hundred and fifty six channels including a two hundred and fifty seventh channel D_CH 257 , a two hundred and fifty eighth channel D_CH 258 , a two hundred and fifty ninth channel D_CH 259 , . . . , and a five hundred and twelfth channel D_CH 512 . Furthermore, the gate driver 104 outputs another trigger voltage signal from a second pad (STV 2 ). By driving voltages via the two hundred and fifty seventh channel D_CH 257 , the two hundred and fifty eighth channel D_CH 258 , the two hundred and fifty ninth channel D_CH 259 , . . . , and the five hundred and twelfth channel D_CH 512 , to a two hundred and fifty seventh horizontal channel P_CH 257 , a two hundred and fifty eighth horizontal channel P_CH 258 , a two hundred and fifty ninth horizontal channel P_CH 259 , . . . , and a five hundred and twelfth horizontal channel P_CH 512 , on the substrate 108 respectively, there are additional two hundred and fifty six horizontal outputs from the gate driver 104 . The third gate driver 106 also performs a similar function. A second gate driver 106 comprises a first pad (STV 1 ) to receive a trigger voltage signal and a two hundred and fifty six channels including a five hundred and thirteenth channel D_CH 513 , a five hundred and fourteenth channel D_CH 514 , a five hundred and fifteenth channel D_CH 515 , . . . , and a seven hundred and sixty eighth channel D_CH 768 . The gate driver 106 outputs another trigger voltage signal from a second pad (STV 2 ). By driving voltages via the five hundred and thirteenth channel D_CH 513 , the five hundred and fourteenth channel D_CH 514 , the five hundred and fifteenth channel D_CH 515 , . . . , and the seven hundred and sixty eighth channel D_CH 768 , to a five hundred and thirteenth horizontal channel P_CH 513 , a five hundred and fourteenth horizontal channel P_CH 514 , a five hundred and fifteenth horizontal channel P_CH 515 , . . . , and a seven hundred and sixty eighth horizontal channel P_CH 768 , on the substrate 108 respectively, there are another two hundred and fifty six horizontal outputs from the gate driver 106 .

In effect, the demands for higher resolution on LCD display increases the number of gate drivers required, and raises the costs and inefficiencies in the manufacturing processes.

The purpose of the present invention is to solve some of the disadvantages in the prior arts. According to the invention, a gate driver structure suitable for TFT display apparatuses that 1) decreases the number of gate drivers used; 2) enhances the reusability of the gate driver; and 3) reduces the on-chip area of the gate driver, is disclosed in order to achieve the stringent requirements on the cost and manufacturing efficiency of LCD displays.

A gate driver structure described in one embodiment of the invention comprises a gate driver having at least one channel to output voltage signals; a switch circuit to control the voltage signals outputted from the gate driver; and a substrate wherein the gate driver and the switch circuit are manufactured on the substrate. Another embodiment of the invention discloses a gate driver structure comprises a gate driver having at least one channel to output voltage signals; a switch circuit to control the voltage signals outputted from the gate driver; a substrate wherein the gate driver and the switch circuit are manufactured on the substrate; and a switch controller to control the transmission of the voltage signals outputted from the gate driver.

Various objects and advantages of the present invention will be more readily understood from the following description when read in conjunction with the appended drawings, in which:

FIG. 1 illustrates a gate drivers structure of an LCD display apparatus in the prior art;

FIG. 2 shows a gate driver structure for an LCD display apparatus according to one embodiment of the invention;

FIG. 3 shows a gate driver structure for an LCD display apparatus according to another embodiment of the invention; and

FIG. 4 shows a gate driver structure for an LCD display apparatus according to another embodiment of the invention.

One embodiment of the present invention provides a gate driver structure for an LCD display apparatus. According to the gate driver structure of the invention, the number of gate drivers used is reduced, the reusability of the gate driver is increased, and the chip area of the gate driver is smaller. Accordingly, a gate driver structure with low cost and efficient manufacturing processes is achieved. The following descriptions are for illustration only so that certain embodiments and applications of the invention can be more easily understood. However, it is possible to make modifications and changes to these embodiments without departing from the scope of the annexed claims.

FIG. 2 shows a gate driver structure for an LCD display apparatus according to one embodiment of the invention. The gate driver structure comprises a gate driver 202 , a switch circuit 204 , and a substrate 206 wherein the material of the substrate 206 can be glass or transparent insulating materials like polyester resin, polyimide etc. The switch circuit 204 can be positioned on the substrate 206 . A voltage signal triggers gate driver 202 via a first pad (STV 1 ). In one embodiment, there are 256 channels on the gate driver which includes a first channel D_CH 1 , a second channel D_CH 2 , a third channel D_CH 3 , . . . , and a two hundred and fifty sixth channel D_CH 256 . Furthermore, the gate driver 202 outputs a voltage signal from a second pad (STV 2 ). The switch circuit 204 can comprise a plurality of switch elements. In one embodiment, the number of switch elements can be equivalent to the number of channels in the gate driver 202 such that each channel corresponds to one switch element. These switch elements are controlled by a same control signal. The switching frequency of the switch elements is relatively low so that any issue resulting from the limited electronic mobility of the substrate 206 . is eliminated.

Specifically, in one embodiment of the invention, each of the channels D_CH 1 ˜_CH 256 corresponds to one of the 256 switch elements of the switch circuit 204 . The switch elements may comprise a first switch element SW 1 , a second switch element SW 2 . . . a two hundred and fifty fifth switch element SW 255 , and a two hundred and fifty sixth switch element SW 256 . The outputs of the gate driver 202 are sent to the substrate 206 through the switch elements, each of which selects one path for transferring the received output of the gate driver 202 to one of the three groups on the substrate 206 . The selection is repeated for each group. The frequency of selections is determined by dividing the number of channels in the substrate 206 by the number of channels on gate driver 202 . For example, the frequency of selections may be three if the number of channels in the gate driver 202 is 256, and the number of channels in the substrate 206 is 768. Various methods can be used to implement the switch circuit 204 and one of them is described below.

FIG. 2 shows an implementation of the switch circuit 204 . The switch circuit 204 transfers a first voltage signal of the channel D_CH 1 to the first horizontal channel P_CH 1 , a second voltage signal of the channel D_CH 2 to the second horizontal channel P_CH 2 , . . . , and a two hundred and fifty sixth voltage signal of D_CH 256 to the two hundred and fifty sixth horizontal channel P_CH 256 . After a first scan, the switch circuit 204 transfers another first voltage signal of the channel D_CH 1 to the two hundred and fifty seventh horizontal channel P_CH 257 , another second voltage signal of the channel D_CH 2 to P_CH 258 , . . . , and another two hundred and fifty sixth voltage signal of the channel D_CH 256 to P_CH 512 . After this second scan, the switch circuit 204 transfers still another first voltage signal of the channel D_CH 1 to P_CH 513 , another second voltage signal of the channel D_CH 2 to P_CH 514 , . . . , and another two hundred and fifty sixth voltage signal of the channel D_CH 256 to P_CH 768 .

FIG. 3 demonstrates a gate driver structure according to another embodiment of the invention. In this embodiment, a gate driver structure comprises a gate driver 302 , a switch circuit 304 , and a substrate 306 wherein the material of the substrate 306 can be glass or transparent insulating materials like polyester resin, polyimide etc. A voltage signal triggers the gate driver 302 via a first pad (STV 1 ). Here, the gate driver 302 comprises two hundred and fifty six channels including a first channel D_CH 1 , a second channel D_CH 2 , a third channel D_CH 3 , . . . , and a two hundred and fifty sixth channel D_CH 256 . Furthermore, the gate driver 302 outputs a voltage signal from a second pad (STV 2 ). In addition, the switch circuit 304 comprises a plurality of switch elements. These switch elements can be arranged in cascade and controlled sequentially by a specific voltage signal. When this embodiment is in operation, the switching speed of the switch elements may not be fast. However, the electronic mobility on the substrate 306 is still sufficient to support such switching speed.

FIG. 3 also shows an implementation of the switch circuit 304 . The channels of the gate driver 302 , including the first channel D_CH 1 , the second channel D_CH 2 , the third channel D_CH 3 , . . . , and the two hundred and fifty sixth channel D_CH 256 , correspond respectively to the two hundred and fifty six switch elements of the switch circuit 304 which comprises a first switch element SW 1 , a second switch element SW 2 , . . . , a two hundred and fifty fifth switch element SW 255 , and a two hundred and fifty sixth switch element SW 256 . Moreover, each switch element controls the three adjacent, contiguous horizontal channels in the substrate 306 . The first switch element SW 1 controls a first horizontal channel P_CH 1 , a second horizontal channel P_CH 2 , and a third horizontal channel P_CH 3 ; the second switch element SW 2 controls a fourth horizontal channel P_CH 4 , a fifth horizontal channel P_CH 5 and a sixth horizontal channel P_CH 6 ; . . . ; and the two hundred and fifty sixth switch element SW 256 controls P_CH 766 , P_CH 767 , and P_CH 768 . There are other methods to drive the horizontal channels on the substrate that can be implemented without departing from the scope of the invention. For example, it is possible to use the first switch element SW 1 to control the first horizontal channel PCH_ 1 , the third horizontal channel PCH_ 3 and the fifth horizontal channel PCH_ 5 and so forth.

FIG. 4 illustrates a gate driver structure for an LCD display apparatus according to another embodiment of the invention. In this embodiment, a gate driver structure comprises a gate driver 402 , a switch circuit 404 , a substrate 406 , and a switch controller 408 . The material of the substrate 406 can be glass or transparent insulating materials like polyester resin, polyimide etc. The switch controller 408 is developed on the substrate 406 . A voltage signal triggers the gate driver 402 via a first pad (STV 1 ). Here, there are two hundred and fifty six channels that comprises a first channel D_CH 1 , a second channel D_CH 2 , a third channel D_CH 3 , . . . , and a two hundred and fifty sixth channel D_CH 256 . Furthermore, the gate driver 402 outputs a voltage signal from a second pad (STV 2 ). The switch circuit 404 comprises a plurality of switch elements. The number of switch elements is three times the number of channels in the gate driver 402 , which means that there are seven hundred and sixty eight switch elements. These switch elements can be arranged in cascade and controlled sequentially by a voltage signal. When this embodiment is in operation, the switching speed of the switch elements may be slow. However, the electronic mobility on the substrate 406 is still sufficient to support such switching speed.

An implementation of the switch circuit 404 is shown in FIG. 4 . The outputs of the channels in the gate driver 402 , including the first channel D_CH 1 , the second channel D_CH 2 , the third channel D_CH 3 . . . and the two hundred and fifty sixth channel D_CH 256 , are controlled by the switch controller 408 . The switch controller 408 is coupled to the switch circuit 404 , which comprises seven hundred and sixty-eight switch elements, each of which is connected to a single channel. The switch controller 408 uses at least one control signal to control the switch circuit 404 . Moreover, each switch element drives one horizontal channel of the substrate 406 . For example, a first switch element SW 1 drives a first horizontal channel P_CH 1 , a second switch element SW 2 drives a second horizontal channel P_CH 2 , . . . , a seven hundred and sixty seventh switch element SW 767 drives a P_CH 767 , and a seven hundred and sixty eighth switch element SW 768 drives a P_CH 768 .

It should be noted that the embodiments described herein are not limitations of the present invention, but exemplary descriptions. Indeed, other adaptations that are apparent to those skilled in the art but not described herein can still fall within the scope of the annexed claims.