USPatent applicationPatented

LCD panel driving method and device with charge sharing

Granted 20 Sep 2011 · 5 office actions

Current assignee: Xiamen University · originally Sunplus Technology Co., Ltd.

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Inventors: Kuei-Kai Chang, Kun-Tsung Lin, Bo-Wen Wang · Examiner: Chanh Nguyen · AU 2629 · TC 2600

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Abstract

An LCD panel driving method and device with charge sharing is disclosed. The LCD panel includes a plurality of switches, a plurality of data lines, a signal driving circuit for generating a plurality of image signals, a charge sharing common voltage driving circuit and a common capacitor having one end connected to the charge sharing common voltage driving circuit through a common voltage node. The method turns the switches on to thereby form the charge sharing common voltage driving circuit and the signal driving circuit as a short circuit, such that charges stored in the common capacitor flow into the data lines to drive the common voltage node to enter in an inverse phase state in order to sequentially turn the switches on and then off to accordingly sample the respective data lines.

Description

5 parts
›BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a technical field of flat displays and, more particularly, to an LCD panel driving method and device with charge sharing.

2. Description of Related Art

Current portable electronic products, such as PDAs, MP3 players and the like, are getting more and more popular with the development of the electronics industry. In general, the portable electronic products typically are equipped with a small-scale liquid crystal display (LCD), such as a thin-film transistor LCD (TFT-LCD).

FIG. 1 is a schematic diagram of a typical TFT-LCD panel. The panel includes four scan lines (SL 1 -SL 4 ) 102 , three data lines 104 , twelve pixels 106 , a gate driving circuit 108 , a signal driving circuit 110 , a common voltage driving circuit 126 , three switches (SW 1 R, SW 2 R, SW 3 R) 112 , a switch control circuit 114 and a common capacitor 116 . Each pixel 106 has a transistor 118 and a capacitor 120 to store charges. Each data line 104 has parasitic resistors 122 and parasitic capacitors 124 .

The ends of each capacitor 120 are connected to the respective electrodes at two ends of a liquid crystal (not shown). The transmittance of a liquid crystal is changed by changing the voltage stored in the respective capacitor 120 . Further, each capacitor 120 has one end connected to a drain of a respective transistor 118 and the other commonly connected to a common voltage node Vcom, and the transistor 118 has a source connected to a data line 104 and a gate connected to a scan line 102 . The panel is driven by first using the gate driving circuit 108 to send a switch voltage to the scan lines 102 in order to sequentially turn the transistors 118 on, then using the switch control circuit 114 to sequentially switch the switches 112 on, and finally using the signal driving circuit 110 to sent a voltage to the data lines 104 in order to charge the capacitors 120 through the respective transistors 118 , thereby reaching a specific voltage.

To prevent a liquid crystal from being dissolved and becoming unusable, an alternating current (AC) power is typically used to drive an LCD. One well-known technique is the common voltage swing drive method. Namely, a voltage of each data line 104 is alternately higher and lower than a voltage of the common voltage node Vcom, and accordingly the liquid crystals receive alternate positive and negative driving of the AC to thus prevent a damage from being driven by a direct current (DC) voltage. FIG. 2 is a diagram of voltage waveforms of a data line 104 and the common voltage node Vcom. FIG. 3 is a flowchart of the common voltage swing drive method. FIG. 4 is a diagram of waveforms that are presented on nodes T 1 -T 4 when using the common voltage swing drive method. As shown in FIG. 4 , when the common voltage node Vcom is phase inverted, the signal driving circuit 110 requires driving the data lines to a target voltage, which consumes much power and has a very long rising time.

›SUMMARY OF THE INVENTION

The object of the invention is to provide a liquid crystal display (LCD) panel driving method and device with charge sharing, which reduces the power consumption caused by parasitic capacitors of data lines to thus save the power.

In accordance with one aspect of the invention, a liquid crystal display (LCD) panel driving device with charge sharing is provided, which includes a plurality of scan lines, a plurality of data lines, a plurality of pixels, a signal driving circuit, a plurality of switches, a switch control circuit, a charge sharing common voltage driving circuit and a common capacitor. The scan lines are arranged in rows, and the data lines are arranged in columns and intersect with the scan lines respectively. Each pixel locates on an intersection of a scan line and a data line. The signal driving circuit produces a plurality of image signals. The switches are coupled to the signal driving circuit and the data lines such that the image signals are sent to the data lines when the switches are on. The switch control circuit is connected to the switches in order to produce a plurality of sampling signals to thereby control the switches to be on or off. The charge sharing common voltage driving circuit is connected to the signal driving circuit. The common capacitor has a first terminal connected to the pixels and the charge sharing common voltage driving circuit through a common voltage node, and a second terminal connected to ground. The charge sharing common voltage driving circuit and the signal driving circuit form a short circuit at charge sharing, and the switch control circuit controls the switches to be on in order to neutralize charges stored in the common capacitor with charges on the data lines.

In accordance with another aspect of the invention, a driving method with charge sharing for a liquid crystal display (LCD) panel is provided. The LCD panel includes a plurality of switches, a plurality of data lines, a signal driving circuit to produce a plurality of image signals, a charge sharing common voltage driving circuit and a common capacitor. The common capacitor has a terminal connected to the charge sharing common voltage driving circuit through a common voltage node. The method includes the steps of: (A) turning the switches on; (B) forming the charge sharing common voltage driving circuit and the signal driving circuit to be a short circuit in order to neutralize charges stored in the common capacitor with charges on the data lines; (C) driving the common voltage node to be in an inverse phase; and (D) sequentially turning the switches on and then off to accordingly sample the respective data lines.

Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

›BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a typical TFT-LCD panel;

FIG. 2 is a diagram of voltage waveforms of data line and common voltage node;

FIG. 3 is a flowchart of a typical common voltage swing drive method;

FIG. 4 is a diagram of waveforms that are presented on nodes when using a typical common voltage swing drive method;

FIG. 5 is a schematic diagram of a TFT-LCD panel according to the invention;

FIG. 6 is a flowchart of a preferred embodiment of the invention;

FIG. 7 is a diagram of waveforms on nodes according to the invention; and

FIG. 8 is a flowchart of another preferred embodiment of the invention.

›DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT · 1 of 2

The invention uses the charge sharing to reduce the power consumption in an LCD panel. Namely, when the voltage of a common voltage node Vcom is in an inverse phase, data lines and the common voltage node Vcom are short-circuited to thereby neutralize the charges and reduce charging to the data lines and a common capacitor.

FIG. 5 is a schematic diagram of a TFT-LCD panel according to the invention. As shown in FIG. 5 , for convenient description, the panel includes four scan lines (SL 1 -SL 4 ) 502 , three data lines (DL 1 R, DL 1 G, DL 1 B) 504 , twelve pixels 506 , a gate driving circuit 508 , a signal driving circuit 510 , three switches (SW 1 R, SW 1 G, SW 1 B) 512 , a switch control circuit 514 , a common capacitor 516 and a charge sharing common voltage driving circuit 526 .

For illustrative purpose, the number of scan lines and the number of data lines are four and three respectively. However, the number of scan lines and the number of data lines can be any number, for example, n and m, where n, m are positive integers.

The scan lines 502 are arranged in rows, and the data lines 504 are arranged in columns and intersect with the scan lines respectively. Each data line 504 has a parasitic resistor 522 and a parasitic capacitor 524 . Each pixel 506 is located on an intersection of a scan line 502 and a data line 504 , and has a transistor 518 and a capacitor 520 to store charges. The capacitor 520 has one terminal connected to a drain of the transistor 518 and the other terminal connected to a common voltage node Vcom. The transistor 518 has a source connected to a data line 504 and a gate connected to a scan line 502 .

The signal driving circuit 510 produces a plurality of image signals. The switches 512 are coupled to the signal driving circuit 510 and the data lines 504 . The switch control circuit 514 is connected to the switches 512 in order to produce a plurality of sampling signals to thereby control the switches to be on or off. When the switches are on, the image signals are sent to the data lines 504 .

The gate driving circuit 508 is connected to the scan lines 502 , which produces a switch voltage to the scan lines 502 in order to sequentially turn on the transistors 518 such that the switch control circuit 514 can sequentially switch the switches 512 on, and then the signal driving circuit 510 can send a gray voltage to the data lines 504 to charge the capacitors 520 through the respective transistors 518 until a target voltage is reached, thereby changing the transmittance of the respective liquid crystals (not shown).

The charge sharing common voltage driving circuit 526 is connected to the signal driving circuit 510 . The common capacitor 516 has a first terminal connected to the pixels 506 and the charge sharing common voltage driving circuit 526 through a common voltage node Vcom, and a second terminal connected to ground. The charge sharing common voltage driving circuit 526 and the signal driving circuit 510 form a short circuit at charge sharing, and the switch control circuit 514 controls the switches 512 to be on in order to neutralize charges stored in the common capacitor 516 with charges on the data lines 504 .

FIG. 6 is a flowchart of a preferred embodiment of the invention, and FIG. 7 is a diagram of waveforms on nodes according to the embodiment of FIG. 6 . In step S 610 , the switch control circuit 514 controls the switches 512 to be on in a charge sharing trigger time, denoted as T 1 as shown in FIGS. 6 and 7 . In step S 620 , the charge sharing common voltage driving circuit 526 and the signal driving circuit 510 form a short circuit in order to neutralize charges stored in the common capacitor 516 with charges on the data lines 504 to a fixed voltage V 1 in the charge sharing trigger time (T 1 ).

In step S 630 , the charge sharing common voltage driving circuit 514 controls the switches 512 to be off in a switch-off time, denoted as T 2 in FIG. 7 , such that the voltages of the data lines 504 are remained at the fixed voltage V 1 .

In step S 640 , the charge sharing common voltage driving circuit 526 drives the node Vcom to be an inverse phase state, as T 2 shown in FIG. 7 . In steps S 650 , S 660 and S 670 , the switch control circuit 514 sequentially switches the switches SW 1 R, SW 1 G, SW 1 B on/off in data driving time, denoted as T 3 , T 4 , and T 5 in FIG. 7 . The signal driving circuit 510 sequentially drives the data lines DL 1 R, DL 1 G, DL 1 B to voltages V 2 , V 3 , V 4 respectively. Accordingly, as shown in FIG. 7 , when the node Vcom changes its voltage from high to low, the voltages of the data lines DL 1 R, DL 1 G, DLIB are changed from V 1 to V 2 , V 3 , V 4 , respectively, due to the charge sharing. This can save the power because the voltages are not changed from 0V to V 2 , V 3 , V 4 . In addition, since the signal driving circuit 510 requires driving the voltages of the data lines DL 1 R, DL 1 G, DL 1 B from V 1 to V 2 , V 3 , V 4 , respectively, a transistor with a weaker driving capability can be used to save the cost. Further, because the voltages of the data lines DL 1 R, DL 1 G, DL 1 B are precharged to V 1 , the signal driving circuit 510 can take less time to drive the voltages from V 1 to V 2 , V 3 , V 4 , thereby reducing the rising time of the data lines.

FIG. 8 is a flowchart of another preferred embodiment of the invention. Steps S 810 , S 820 , S 840 , S 860 and S 870 in this embodiment are similar to steps S 610 , S 620 , S 640 , S 660 and S 670 except that step S 840 is executed immediately after step 820 , i.e., the switches SW 1 R, SW 1 G, SW 1 B are still on in step S 840 . In step S 850 , the switches SWIG and SW 1 B are turned off.

In view of the foregoing, it is known that the invention makes the data lines and the node Vcom to be a short circuit to thereby obtain the charge sharing and reduce the power consumption required for the panel. In addition, the signal driving circuit 510 requires only driving the voltages of the data lines from V 1 to V 2 , V 3 , V 4 respectively, so that a transistor with weaker driving capability can be used to save the cost and to simplify the circuit.

›DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT · 2 of 2

Although the present invention has been explained in relation to its preferred embodiment, it is to be understood that many other possible modifications and variations can be made without departing from the spirit and scope of the invention as hereinafter claimed.

Claims as granted

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Classifications

3 codes
IPC · International Patent Classification
Section G — Physics
  • G09G3/36
USPC · US Patent Classification
345/98345/100

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Pendency
5.3 y
1,945 days filing → grant
Office actions
5
non-final + final
Responses
3
2 RCE
Interviews
1
examiner interview summaries
Examiner
Chanh Nguyen
art unit 2629 · TC 2600
Citations: 9 back · 2 forward

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