Full-bridge soft switching inverter and driving method thereof

1. Field of the Invention

The present invention generally relates to a full-bridge soft switching inverter and a driving method thereof and, more particularly, to a full-bridge soft switching inverter and a driving method using zero-voltage switching and conducting a circular current in a circuit including two n-channel metal-oxide-semiconductor field-effect transistors (MOSFET's) so as to drive a load such as a cold cathode fluorescent lamp (CCFL) or a signal output device.

2. Description of the Prior Art

Soft switching has become a mainstream technique in the power control IC industry due to its capability in handling signals at high frequencies with low switching loss and high efficiency.

A conventional full-bridge soft switching inverter is as shown in FIG. 1 . The full-bridge soft switching inverter generally comprises four n-channel MOSFET's Q AN , Q BN , Q CN , Q DN and a transformer T X . More particularly, the transistors Q AN and Q CN are coupled to an input voltage V in , respectively, and the node V AB between the transistors Q AN and Q BN and the node V CD between the transistors Q CN and Q DN are coupled to the primary side of the transformer T X with its secondary side coupled to a load L. The load L is also coupled to the negative terminal of a first diode D 1 and the positive terminal of a second diode D 2 . The positive terminal of the first diode D 1 is grounded and the negative terminal of the second diode D 2 is grounded through a feedback resistor R S .

FIG. 2 is another conventional full-bridge soft switching inverter and driving signals thereof. The full-bridge soft switching inverter in FIG. 2 is almost the same as the one in FIG. 1 except that the transistors Q AP and Q CP are p-channel MOSFETs.

FIG. 2 also shows the gate driving signals for the transistors Q AP , Q BN , Q CP , and Q DN . In FIG. 2 , the first gate driving signal Drive_A and the second gate driving signal Drive_B are substantially in-phase and their duty cycles are approximately 50%. In order to insure zero-voltage switching, the duty cycle of the second gate driving signal Drive_B is slightly smaller than that of the first gate driving signal Drive_A, so that a period of turn-on dead time is available between the first and the second gate driving signals. Moreover, the third gate driving signal Drive_C and the fourth gate driving signal Drive_D are substantially in-phase and their duty cycles are approximately 50%. In order to insure zero-voltage switching, the duty cycle of the fourth gate driving signal Drive_D is slightly smaller than that of the third gate driving signal Drive_C, so that a period of turn-on dead time is available between the third and the fourth gate driving signals.

The full-bridge soft switching inverter in FIG. 2 conducts circular currents in a circuit including the transistors Q AP and Q CP and a circuit including the transistors Q BN and Q DN . A p-channel MOSFET is inferior to an n-channel MOSFET in turn-on characteristics such as carrier mobility, turn-on resistance and reaction time, which adversely affects switching efficiency and operation speed of a full-bridge soft switching inverter.

Therefore, there is need in providing a full-bridge soft switching inverter and a driving method thereof so as to drive at least a load such as cold cathode fluorescent lamp (CCFL) or a signal output device at high frequency with low switching loss and high efficiency.

It is a primary object of the present invention to provide a full-bridge soft switching inverter and a driving method thereof, using zero-voltage switching and conducting a circular current in a circuit including two n-channel MOSFET's so as to achieve low switching loss and high efficiency.

In order to achieve the foregoing object, the present invention provides a full-bridge soft switching inverter, comprising:

a full-bridge circuit configuration comprising:

a first p-channel MOSFET having a first gate, a first drain and a first source, wherein said first gate receives a first gate driving signal and said first source receives an input voltage; a first n-channel MOSFET having a second gate, a second drain and a second source, wherein said second gate receives a second gate driving signal, said second drain is coupled to said first drain and said second source is grounded; a second p-channel MOSFET having a third gate, a third drain and a third source, wherein said third gate receives a third gate driving signal and said third source receives said input voltage; and a second n-channel MOSFET having a fourth gate, a fourth drain and a fourth source, wherein said fourth gate receives a fourth gate driving signal, said fourth drain is coupled to said third drain and said fourth source is grounded;

wherein said first gate driving signal and said second gate driving signal are substantially in-phase and the duty cycle of said second gate driving signal is greater than 50% and slightly smaller than that of said first gate driving signal so as to insure zero-voltage switching; wherein said third gate driving signal and said fourth gate driving signal are substantially in-phase and the duty cycle of said fourth gate driving signal is greater than 50% and slightly smaller than that of said third gate driving signal so as to insure zero-voltage switching.

The present invention further provides method for driving a full-bridge soft switching inverter, comprising steps of:

providing a first gate driving signal received by a first gate of a first p-channel MOSFET; providing a second gate driving signal received by a second gate of a first n-channel MOSFET; providing a third gate driving signal received by a third gate of a second p-channel MOSFET; and providing a fourth gate driving signal received by a fourth gate of a second n-channel MOSFET; wherein said first gate driving signal and said second gate driving signal are substantially in-phase and the duty cycle of said second gate driving signal is greater than 50% and slightly smaller than that of said first gate driving signal so as to insure zero-voltage switching; wherein said third gate driving signal and said fourth gate driving signal are substantially in-phase and the duty cycle of said fourth gate driving signal is greater than 50% and slightly smaller than that of said third gate driving signal so as to insure zero-voltage switching.

FIG. 1 is a conventional full-bridge soft switching inverter;

FIG. 2 shows a conventional full-bridge soft switching inverter and driving signals thereof;

FIG. 3 shows a full-bridge soft switching inverter and driving signals thereof in accordance with one embodiment of the present invention; and

FIG. 4 shows a full-bridge soft switching inverter in accordance with another embodiment of the present invention.

The present invention providing a full-bridge soft switching inverter and a driving method thereof can be exemplified by the preferred embodiments as described hereinafter:

Please refer to FIG. 3 , which is a full-bridge soft switching inverter and driving signals thereof in accordance with one embodiment of the present invention. The full-bridge soft switching inverter according to the present invention mainly comprises a full-bridge circuit configuration. The full-bridge circuit configuration comprises: a first p-channel MOSFET Q AP having a first gate, a first drain and a first source, wherein the first gate receives a first gate driving signal Drive_A and the first source receives an input voltage V in ; a first n-channel MOSFET Q BN having a second gate, a second drain and a second source, wherein the second gate receives a second gate driving signal Drive_B, the second drain is coupled to the first drain and the second source is grounded; a second p-channel MOSFET Q CP having a third gate, a third drain and a third source, wherein the third gate receives a third gate driving signal Drive_C and the third source receives the input voltage V in ; and a second n-channel MOSFET Q DN having a fourth gate, a fourth drain and a fourth source, wherein the fourth gate receives a fourth gate driving signal Drive_D, the fourth drain is coupled to the third drain and the fourth source is grounded.

In this embodiment, the full-bridge soft switching inverter of the present invention mainly comprises a transformer T X . The transformer T X has a primary side and a secondary side. The primary side is coupled to a first node V AB between the first drain and the second drain and to a second node V CD between the third drain and the fourth drain, and the secondary side is coupled to at least one load L.

In this embodiment, the first gate driving signal Drive_A and the second gate driving signal Drive_B are substantially in-phase and the duty cycle of the second gate driving signal Drive_B is greater than 50% and slightly smaller than that of the first gate driving signal Drive_A so as to insure zero-voltage switching. Similarly, the third gate driving signal Drive_C and the fourth gate driving signal Drive_D are substantially in-phase and the duty cycle of the fourth gate driving signal Drive_D is greater than 50% and slightly smaller than that of the third gate driving signal Drive_C so as to insure zero-voltage switching.

When the first gate driving signal Drive_A and the second gate driving signal Drive_B are both low, the transistor Q AP is on and the transistor Q BN is off. When the first gate driving signal Drive_A and the second gate driving signal Drive_B are both high, the transistor Q AP is off and the transistor Q BN is on. Similarly, when the third gate driving signal Drive_C and the fourth gate driving signal Drive_D are both low, the transistor Q CP is on and the transistor Q DN is off. When the third gate driving signal Drive_C and the fourth gate driving signal Drive_D are both high, the transistor Q CP is off and the transistor Q DN is on. A zero-voltage circular current flowing in a circuit including the n-channel transistors Q BN and Q DN on the primary side of the transformer T X . The arrangement of transistors Q AP , Q BN , Q CP , Q DN helps to reduce the direct-current (DC) voltage level of the input voltage V in . Preferable, the load L is coupled to a feedback resistor R S so as to output a feedback current.

FIG. 4 is a full-bridge soft switching inverter in accordance with another embodiment of the present invention. The full-bridge soft switching inverter of the present invention mainly comprises a full-bridge circuit configuration being coupled to a signal output device such as a speaker S through a filter circuit F.

In general, the full-bridge soft switching inverter and a driving method thereof in according to the present invention can be used to drive a cold cathode fluorescent lamp in a LCD backlight module or a signal output device such as a speaker. The present invention should not be limited to the aforementioned applications since many modifications can be made within the scope of the present invention by persons with ordinary skills in this art.

According to the present invention, the first gate driving signal Drive_A and the second gate driving signal Drive_B are substantially in-phase and the duty cycle of the second gate driving signal Drive_B is approximately 75% and slightly smaller than that of the first gate driving signal Drive_A so that a period of turn-on dead time is available between the first and the second gate driving signals to insure zero-voltage switching. Similarly, the third gate driving signal Drive_C and the fourth gate driving signal Drive_D are substantially in-phase and the duty cycle of the fourth gate driving signal Drive_D is approximately 75% and slightly smaller than that of the third gate driving signal Drive_C so that a period of turn-on dead time is available between the third and the fourth gate driving signals to insure zero-voltage switching. Preferably, the first gate driving signal Drive_A has a phase difference of half a cycle from the third gate driving signal Drive_C.

According to the above description, the present invention discloses a full-bridge soft switching inverter and a driving method using zero-voltage switching and conducting a circular current in a circuit including two n-channel MOSFET's. Since the electron mobility μ n is as high as 1500 cm 2 /V-sec and the hole mobility μ p is only 475 cm 2 /V-sec for Si at 300 k, the full-bridge soft switching inverter of the present invention provides reduced turn-on resistance and enhanced operation speed of the transistors. Therefore, the full-bridge soft switching inverter of the present invention can be used to drive a load such as a cold cathode fluorescent lamp and a signal output device with low switching loss and high efficiency.

Although this invention has been disclosed and illustrated with reference to particular embodiment, the principles involved are susceptible for use in numerous other embodiments that will be apparent to persons skilled in the art. This invention is, therefore, to be limited only as indicated by the scope of the appended claims.