Over-power protection apparatus with programmable over-current threshold

1. Field of the Invention

The present invention relates to an over-power protection apparatus, and more particular to an over-power protection apparatus used in a power supply for programming an over-current threshold.

2. Description of Related Art

Various power converters have been widely used to provide a regulated output voltage and current. For the sake of safety reasons, an over-power protection means must be provided to protect both the power converter itself and the power system. A limited power output is thus required for the power converter during the conditions for overloading, short-circuit and feedback open-loop.

Referring to FIG. 1 for the circuit diagram of a prior art power converter, the power converter comprises a transformer T 1 , a control unit 14 , a driving unit 10 , an oscillator 12 , a current sense resistor R S , and a power switch Q 1 . The output terminal of the power converter can obtain a voltage feedback signal V FB . A current sense signal V CS is produced by a primary switching current I P of the transformer T 1 through a current sense resistor R S . The control unit 14 receives the current sense signal V CS , a maximum power signal V LMT , and the voltage feedback signal V FB . The clear signal CLR outputted by the control unit 14 is generated when the current sense signal V CS is higher than the maximum power signal V LMT or the voltage feedback signal V FB . The driving unit 10 receives a pulse signal CLK outputted by the oscillator 12 and a clear signal CLR outputted by the control unit 14 for controlling the driving unit 10 to periodically disable the driving signal V PWM . Therefore, the output of the power converter is regulated, and the primary switching current I P of the transformer T 1 and the maximum output power are limited further.

In practical application, the power converter is used in printers and scanners having a motor load that must provide a peak power for a short period. In other words, the peak power greater than the over-current threshold is permitted within a predetermined period to meet a larger output power and a starting torque for the motor load needed. The peak power is always equal to several times of the maximum output power, such that the power switch and the other power devices must increase the voltage and current stresses, and thus increasing the cost. Therefore, it is an important to provide an appropriate protection and to avoid an erroneous judgment for the power converter. Since the pin number in the integrated circuit is limited to satisfy the commercial specification, therefore the peak power is usually set to a constant value according to the load requirement, and there is no additional pin to adjust the over-current threshold. Such power converter is provided for a specific load, but it is not applicable for a common use in the industry application.

In view of the foregoing shortcomings, the over-power protection apparatus used in a power supply for programming an over-current threshold provides a peak power adjusted according to a load requirement. The circuit according to a first preferred embodiment of the present invention comprises an oscillator for outputting a pulse signal. A control unit generates a clear signal once the current sense signal exceeds a maximum power threshold. A driving unit outputs a driving signal for controlling the driving unit to periodically disable the driving signal in response to the clear signal. A threshold unit generates a current limit signal in response to the driving signal is in high-level. An over-power comparative unit outputs a protection signal once the current sense signal is higher than the current limit signal. An accumulating trigger unit accumulates and counts the protection signal, and further generates a first off-signal as the protection signal is enabled and the count of the protection signal reaches a predetermined value. A latch unit generates a latch signal to latch and stop outputting the driving signal in response to the first off-signal, so as to achieve the over-power protection.

Compared with the first preferred embodiment of the present invention, the second preferred embodiment further comprises an over-temperature protection unit and a connecting unit. The over-temperature protection unit generates a second off-signal for indicating an over-temperature status in response to the low-level of the driving signal. The connecting unit is used to latch the driving signal for the power converter in response to the second off-signal or the first off-signal.

The foregoing aspects and many of the attendant advantages of this invention will be more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:

FIG. 1 shows a circuit diagram of a conventional power converter;

FIG. 2 shows a first preferred embodiment of a schematic diagram of the power converter according to the present invention;

FIG. 3 shows a second preferred embodiment of a schematic diagram of the power converter according to the present invention;

FIG. 4 shows the circuit waveforms of the power converter according to the present invention; and

FIG. 5 shows a preferred embodiment of an accumulating trigger unit according to the present invention.

FIG. 2 shows a first preferred embodiment of a schematic diagram of a power converter according to the present invention. The first preferred embodiment comprises an oscillator 22 for outputting a pulse signal CLK. A control unit 25 receives a current sense signal V CS , a voltage feedback signal V FB , and a maximum power signal V T2 for generating a clear signal CLR in a low-level once the current sense signal V CS is higher than the maximum power signal V T2 or the voltage feedback signal V FB . A driving unit 10 is connected to an oscillator 22 and a control unit 25 for receiving the pulse signal CLK to output a driving signal V PWM , and adjusting a pulse width of the driving signal V PWM once the clear signal CLR in low-level is produced.

A threshold unit 30 is connected to the driving unit 10 for outputting a current limit signal V T1 in response to the driving signal V PWM is in high-level. The threshold unit 30 comprises a programming resistor 303 connected to a first controlled switch 302 through a constant current source I OCP wherein the first controlled switch 302 is controlled by the driving signal V PWM in high-level. The current limit signal V T1 is generated by the voltage across the programming resistor 303 through the constant current source I OCP . The programming resistor 303 can be adjusted to create the current limit signal V T1 in response to the different load requirement.

An over-power comparative unit 23 is connected to a threshold unit 30 for receiving the current limit signal V T1 and the current sense signal V CS . The over-power comparative unit 23 generates a logic low state at a protection signal S PT once the current sense signal V CS is higher than the current limit signal V T1 . An accumulating trigger unit 28 is connected to the over-power comparative unit 23 and the oscillator 22 for receiving the protection signal S PT and the pulse signal CLK, further accumulates and counts the protection signal S PT . The accumulating trigger unit 28 generates a first off-signal S OFF1 as the protection signal S PT is enabled and the count of the protection signal S PT reaches a predetermined value.

A latch unit 21 is connected to the accumulating trigger unit 28 and the driving unit 10 for outputting a latch signal LATCH to the driving unit 10 in response to the first off-signal S OFF1 The driving unit 10 will stop outputting the driving signal V PWM to the power switch Q 1 to achieve the latch protection once the latch signal LATCH is enabled at the input of the driving unit 10 . An electronic device coupled to the output terminal of the power converter cannot be operated properly as the power supply is latched and protected. The way of the latch unit 21 to carry out the latch protection is a prior art, and thus will not be described here. Since the first off-signal S OFF1 is produced as the protection signal is enabled and the count of the protection signal reaches a predetermined, therefore the first preferred embodiment could provide an appropriate protection when the load requires a larger output power at a specific period.

FIG. 3 shows a second preferred embodiment of a schematic diagram of a power converter according to the present invention. The second preferred embodiment provides a current limit signal V T1 as a current limit threshold under a logic high state at a driving signal V PWM to achieve an over-power protection and provides a thermal limit signal V T3 as a thermal limit threshold under a logic low state at a driving signal V PWM to achieve an over-temperature protection. When the second preferred embodiment of the present invention is used in a power converter, the power converter can achieve the over-power and over-temperature protection under the normal operation.

Referring to FIGS. 2 and 3 , the second preferred embodiment compared with the first preferred embodiment adds an over-temperature protection unit 32 , a connecting unit 40 and a threshold unit 30 . The operating principle and characteristics of the other circuits are the same as the first preferred embodiment. The differences from the first preferred embodiment are described as follows:

The over-temperature protection unit 32 includes a thermal sensor 322 , a threshold diode 323 , an over-temperature current source I OTP , a second controlled switch 324 , an inverter 321 , a third controlled switch 326 , and an over-temperature comparator 325 . The thermal sensor 322 is connected to the driving unit 10 through the threshold diode 323 and connected to a ground terminal GND through the programming resistor 303 . The over-temperature current source I OTP is connected between the programming resistor 303 and the thermal sensor 322 through the second controlled switch 324 . In the meantime, the second controlled switch 324 is connected to the driving unit 10 through the inverter 321 . An input terminal of the over-temperature comparator 325 is connected to the programming resistor 303 and the thermal sensor 322 and a connecting point of the second controlled switch 324 . Another input terminal of the over-temperature comparator 325 receives an over-temperature threshold V RT , and an output terminal of the over-temperature comparator 325 is connected to the connecting unit 40 through the third controlled switch 326 . The third controlled switch 326 is connected to the driving unit 10 through the inverter 321 .

When the driving unit 10 outputs a logic low at the driving signal V PWM , the threshold diode 323 , the second controlled switch 324 , and the third controlled switch 326 are turned on, and a thermal limit signal V T3 across the programming resistor 303 is produced by the over-temperature current source I OTP . The over-temperature comparator 325 outputs a second off-signal S OFF2 in high-level once the thermal limit signal V T3 is lower than the over-temperature threshold V RT . The thermal sensor 322 with a negative resistance is connected in parallel with the programming resistor 303 as the thermal sensor 322 senses a temperature rise, such that the thermal limit signal V T3 across the programming resistor 303 is reduced to achieve the over-temperature protection.

The connecting unit 40 is connected to the over-temperature protection unit 32 and the accumulating trigger unit 28 for executing an or-gate operation and generating a third off-signal S OFF3 in response to the second off-signal S OFF2 and the first off-signal S OFF1 .

Referring to FIG. 3 for the second preferred embodiment of the present invention, the threshold unit 30 includes a constant current source I OCP , a fourth controlled switch 304 and the programming resistor 303 . The constant current source I OCP is connected to the fourth controlled switch 304 and the programming resistor 303 through the first controlled switch 302 . The first controlled switch 302 and the fourth controlled switch 304 are controlled by the driving signal V PWM in high-level, such that a current limit signal V T1 across the programming resistor 303 is generated by the constant current source I OCP .

Referring to FIGS. 2 and 3 , FIG. 4 shows the circuit waveforms of an over-power protection of the present invention. When the driving unit 10 outputs a logic high at the driving signal V PWM , the power switch Q 1 is on state, and the current sense signal V CS will be increased from the time T 1 . At the time T 2 , the current sense signal V CS reaches the current limit signal V T1 , and the over-power comparative unit 23 outputs a protection signal S PT in low-level to the accumulating trigger unit 28 . The accumulating trigger unit 28 starts accumulating and counting the protection signal S PT and prepares to latch the driving unit 10 . At the time T 3 , the current sense signal V CS reaches a maximum power signal V T2 , and the control unit 25 produces a logic low at a clear signal CLR to the driving unit 10 , such that the driving signal V PWM is switched to a low-level (Time T 3 ˜T 4 ) and further the driving signal of the power switch Q 1 is periodically disabled to achieve the protection purposes.

Referring to FIGS. 2 and 3 , FIG. 5 shows a preferred embodiment of the accumulating trigger unit according to the present invention. The accumulating trigger unit 28 comprises a holding unit 284 , a programmable capacitor 285 , a switch 283 , a charging current source 288 , a discharging current source 289 , and a delay comparator 287 . To prevent the noise interference from the ground bounce or the switching spike, the holding unit 284 associated with the pulse signal CLK of the oscillator 22 are utilized to delay the state of the protection signal S PT for generating an up-down signal in high-level as the holding unit 284 receives the protection signal S PT in low-level produced by the over-power comparative unit 23 , so that the switch 283 is on state.

The switch 283 is connected to the holding unit 284 for generating on/off state in response to the up-down signal outputted from the holding unit 284 and enabling of the protection signal S PT . The programmable capacitor 285 is connected to a charging current source 288 through the switch 283 for generating a charging current I CH and a charging voltage V CH in response to the on state of the switch 283 . A delay comparator 287 is coupled to the programmable capacitor 285 and a fourth threshold signal V T4 , which compare the charging voltage V CH with the fourth threshold signal V T4 for generating the first off-signal S OFF1 in high-level once the charging voltage V CH is higher than the fourth threshold signal V T4 .

On the contrary, the switch 283 can change the on state to the off state in response to the over-power comparative unit 23 stops producing the protection signal S PT , and the holding unit 284 will down count and output a logic low at the up-down signal. Meanwhile, the charging voltage V CH across the programmable capacitor 285 starts to discharge via the discharging current source 289 . The delay comparator 287 stops generating the first off-signal S OFF1 once the charging voltage V CH is smaller than the fourth threshold signal V T4 . Therefore, the duration of the accumulating and counting, and the period of fault conditions are changed by adjusting the capacitance of the programmable capacitor 285 , so as to prevent an inappropriate protection when the load requires a larger rated power in a specific period.

Referring to FIG. 2 , the over-power protection apparatus for programming an over-current threshold at least comprises: a voltage feedback terminal (FB), a current sense terminal (SENSE), a voltage input terminal (VDD), a driving terminal (GATE), an over-power/over-temperature protection terminal (OCP/RT), and an adjustable delay time terminal (CT). Therefore, the current sense signal V CS , voltage feedback signal V FB , and supplied voltage V DD can be received by the current sense terminal, voltage feedback terminal, and power input terminal respectively. The programming resistor 303 and the programmable capacitor 285 are connected to the over-power/over-temperature protection terminal and the adjustable delay time terminal respectively.

While the invention has been described by means of a specification with accompanying drawings of specific embodiments, numerous modifications and variations could be made thereto by those skilled in the art without departing from the scope and spirit of the invention set forth in the claims.